Commit Graph

1359 Commits

Author SHA1 Message Date
Squall Leonhart 8eecb0c823
Extend mempak Index Table to the intended 256 bytes, so that the default checksum is actually correct, and include the backup of that data. (#2304)
* just a test to see what happens

* duplicate the full 256 bytes.

* Didn't need to duplicate it after all.

The index table wasn't actually 256 bytes as intended, so the checksum was invalid.

Cruis'n'USA 1.0 didn't like this one bit.

* fully duplicate it after all just in case of a rare case

where a game breaks without the backup of the checksum and table.

* this looks properly duplicated now.

perhaps
2022-11-24 07:49:48 +10:30
zilmar e3aa2514c1 Core: Fix bug in CX86RecompilerOps::SPECIAL_DIV 2022-11-23 20:16:38 +10:30
zilmar 8e94b3086b Core: Change recompiler to use asmjit 2022-11-23 14:46:55 +10:30
zilmar 2a6d3cd519 Core: remove #ifdef toremove block in CX86RecompilerOps::SPECIAL_DMULTU() 2022-11-21 08:55:51 +10:30
zilmar 9743f12b1d Core: Remvoe #ifdef LinkBlocks code block 2022-11-21 08:52:19 +10:30
zilmar 989827cb77 Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram 2022-11-14 21:20:28 +10:30
zilmar 97e3f50007 Core: Update mask of registers in CRegisters::Cop0_MT 2022-11-14 20:56:21 +10:30
zilmar cabcd2cc95 Core: Handle masking of random in CSystemTimer::UpdateTimers 2022-11-14 11:19:02 +10:30
zilmar 48da86bea1 Core: if Rom is larger than ISViewerHandler, then use rom handler 2022-11-08 10:54:01 +10:30
zilmar 529812fdca Core: Switch to use asmjit registers in recompiler 2022-11-07 21:03:32 +10:30
zilmar a4c49a3567 Core: rearrange XorVariableToX86reg parameters 2022-11-07 16:30:09 +10:30
zilmar 2fcce6cdd5 Cote: TestVariable rearrange parameters 2022-11-07 16:25:54 +10:30
zilmar fe1f99ae1c Core: rearrange TestConstToX86Reg parameters 2022-11-07 16:22:51 +10:30
zilmar ce939100c5 Core: rearrange OrVariableToX86Reg parameters 2022-11-07 16:18:54 +10:30
zilmar 697397f1dd Core: Rearrange OrConstToX86Reg parameters 2022-11-07 16:03:45 +10:30
zilmar 40259d01ca Core: rearrange OrConstToVariable parameters 2022-11-07 15:55:19 +10:30
zilmar c95aae8e38 Core: rearrange MoveZxVariableToX86regHalf parameters 2022-11-07 15:48:39 +10:30
zilmar 96eed54a1d Core: rearrange MoveZxVariableToX86regByte parameters 2022-11-07 15:44:10 +10:30
zilmar 4570d9eab5 Core: rearrange MoveZxHalfX86regPointerToX86reg variables 2022-11-07 15:40:01 +10:30
zilmar 8a2197707b Core: rearrange MoveZxByteX86regPointerToX86reg parameters 2022-11-07 15:38:36 +10:30
zilmar 59892a266b Core: rearrange MoveX86regToVariable parameters 2022-11-07 15:30:25 +10:30
zilmar 91a192cead Core: rearrange MoveX86regToMemory parameters 2022-11-07 14:40:28 +10:30
zilmar 891d487fdd Core: rearrange MoveX86regPointerToX86regDisp8 parameters 2022-11-07 14:38:34 +10:30
zilmar d74694d16f Core: rearrange MoveX86regPointerToX86reg parameters 2022-11-07 14:36:11 +10:30
zilmar ebca0854d7 Core: rearrange MoveX86regHalfToX86regPointer parameters 2022-11-07 14:29:33 +10:30
zilmar efac334136 Rearrange MoveX86regHalfToVariable parameters 2022-11-07 14:26:06 +10:30
zilmar 1966b842f3 Core: rearrange MoveX86regByteToX86regPointer parameters 2022-11-07 14:24:22 +10:30
zilmar bb51c3d11d Core: rearrange MoveX86regByteToVariable parameters 2022-11-07 14:23:09 +10:30
zilmar d19fc10f0c Core: remove MoveVariableToX86regByte, MoveVariableToX86regHalf, MoveX86regByteToN64Mem 2022-11-07 14:21:26 +10:30
zilmar 8702e6b67c core: Rearrange MoveVariableDispToX86Reg parmeters 2022-11-07 14:18:15 +10:30
zilmar 10dd2c662a Core: rearrange MoveSxVariableToX86regHalf parameters 2022-11-07 14:08:23 +10:30
zilmar eb5d0ce363 Core: rearrange MoveSxVariableToX86regByte parameters 2022-11-07 14:05:08 +10:30
zilmar 1584d25cd9 Core: Rearrange MoveSxHalfX86regPointerToX86reg parameters 2022-11-07 13:41:49 +10:30
zilmar fe7b8afa92 Core: Rearrange MoveSxByteX86regPointerToX86reg parameters 2022-11-07 13:37:29 +10:30
zilmar 288fe4d222 Core: reorder MoveConstToX86regPointer parameters 2022-11-07 11:35:11 +10:30
zilmar b68caed6c4 Core: reorder MoveConstByteToX86regPointer parameters 2022-11-07 11:32:46 +10:30
zilmar eb0aa05a48 Core: remove x86 functions referencing n64mem 2022-11-07 11:30:51 +10:30
zilmar 40456f12db Core: Change order of MoveConstToVariable 2022-11-07 11:26:17 +10:30
zilmar 5c7390324a Core: reorder MoveConstToMemoryDisp parameters 2022-11-07 10:45:28 +10:30
zilmar 8272d18aa6 Reorder MoveConstHalfToX86regPointer parameters 2022-11-07 10:43:27 +10:30
zilmar 0123100233 Core: reorder MoveConstHalfToVariable parameters 2022-11-07 10:37:29 +10:30
zilmar bdb2d040f9 Core: reorder MoveConstByteToVariable parameters 2022-11-07 10:34:25 +10:30
zilmar eb8b36603b Core: remove MoveConstByteToN64Mem, MoveConstHalfToN64Mem, MoveConstToN64Mem, MoveConstToN64MemDisp 2022-11-07 10:27:22 +10:30
zilmar 9dd2df36d4 Core: remove CX86Ops::CompVariableToX86reg 2022-11-07 10:18:55 +10:30
zilmar 09fb90117e Core: reorder CompConstToVariable parameters 2022-11-07 10:11:55 +10:30
zilmar ade6787e6d Core: Reorder AndVariableToX86Reg parameters 2022-11-07 10:00:35 +10:30
zilmar 513ca57f46 Core: Reorder parameters for AndVariableDispToX86Reg 2022-11-07 09:51:41 +10:30
zilmar 897fd39a0e Core: reorder AndConstToVariable parameters 2022-11-07 09:40:12 +10:30
zilmar c13080d7c3 Core: Reorder AddX86regToVariable parameters 2022-11-07 09:34:34 +10:30
zilmar c7ac150b91 Core: Capitalize Reg in x86ops 2022-11-07 09:31:37 +10:30
zilmar dbd20dd993 Core: Reorder AddConstToVariable parameters 2022-11-07 09:29:06 +10:30
zilmar 6a69e2e86a Core: remove CX86Ops::AdcX86regToVariable 2022-11-07 09:25:31 +10:30
zilmar b3c6858b69 Core: Change COP0 registers to use an enum 2022-11-07 09:24:58 +10:30
zilmar fd71b2dfcb Core: Handle branch/jump in a delay slot in the Interpreter 2022-11-01 08:59:15 +10:30
zilmar 94247ce1a6 Core: handle better CX86RecompilerOps::ResetMemoryStack 2022-10-28 16:41:24 +10:30
zilmar 6c9237f603 Core: Get recompiler to handle RESERVED31 2022-10-24 16:50:12 +10:30
zilmar d06d1526d9 Core: Change the order of MoveVariableToX86reg parameters 2022-10-24 16:05:19 +10:30
zilmar af3c31b0ff Core: Change the order of MoveConstToX86Pointer 2022-10-24 15:09:24 +10:30
zilmar 538933e0a5 Core: reoder MoveConstToX86reg parameters 2022-10-24 15:05:31 +10:30
zilmar dd61a4351d Core: Reorder the order of MoveX86regToX86regPointer 2022-10-24 12:56:38 +10:30
zilmar fdbc31961f Core: Change the order of MoveX86RegToX86Reg 2022-10-24 12:48:51 +10:30
zilmar 8713878994 Core: Change order of MoveX86regToX86Pointer parameters 2022-10-24 12:13:48 +10:30
zilmar ef8067cf12 Android: Make a skeleton for arm to start over arm recompiler 2022-10-24 11:15:46 +10:30
zilmar ae6157427f Recompiler: Handle stack if it is in IMEM/DMEM 2022-10-21 10:03:33 +10:30
zilmar 4525e8b6f3 Core: Move IMEM/DMEM into SPRegistersHandler 2022-10-17 17:29:05 +10:30
zilmar 96244cd6fd Core: Update NonMemory Access to pifram 2022-10-17 11:31:54 +10:30
zilmar 53e00b8023 Core: Clean up masking of COP0 registers 2022-10-17 09:06:22 +10:30
zilmar 9186dcab39 Core: Allow reading from ISViewerHandler 2022-10-17 08:59:26 +10:30
zilmar 305648f02f Core: Do not allow byte aligned blocks after the first block 2022-10-17 08:53:41 +10:30
zilmar 60969607c8 Core: Ignore EverDrive - 64 X7 Serial Registers in PI_DMA_READ 2022-10-17 08:48:30 +10:30
zilmar 65bbc375b9 Core: Fix R4300iOp::LWC1 to have 64bit address 2022-10-17 08:36:17 +10:30
zilmar c16307ec0f Core: Move Pifram code into PifRamHandler 2022-10-17 08:27:52 +10:30
zilmar 315231d439 Core: Writing to 0x0410000C was not calling AfterCallDirect() 2022-10-11 17:31:28 +10:30
zilmar 2199c9cd1f Core: Inherit STATE_CONST_64 in CX86RecompilerOps::InheritParentInfo 2022-10-11 17:24:06 +10:30
zilmar 801a3e29fc Core: Handle more with LW and invalid addresses 2022-10-10 20:25:16 +10:30
zilmar 082ec9c22e Core: Handle unaligned LH 2022-10-10 17:17:56 +10:30
zilmar ca037abf2b Core: Update counters when updating wired 2022-10-10 15:44:52 +10:30
zilmar 29e1468338 Core: Ignore next targeting branch if last op in block 2022-10-10 14:30:20 +10:30
zilmar 0848bab003 Core: do not predefine temp reg 2022-10-10 13:57:10 +10:30
zilmar 46dcf967e1 Core: Change StackPos to be a reference 2022-10-10 13:42:52 +10:30
zilmar 6044222be0 Core: Remove temp usage of Name 2022-10-10 13:38:43 +10:30
zilmar 0ffaf43418 Core: fix CX86RecompilerOps::LD when rt==base 2022-10-10 12:41:12 +10:30
zilmar 96cece6cd9 Core: Update timing around exception in DADD/DSUB 2022-10-10 12:34:11 +10:30
zilmar 3a87c3c5ad Core: Update timing around exception in ADD/SUB 2022-10-10 12:28:06 +10:30
zilmar 3b57424b86 Core: DMTC/MT should not be updating registers 2022-10-10 12:16:27 +10:30
zilmar 481f1c50c8 Core: Add break op to recompiler 2022-10-10 12:07:04 +10:30
zilmar fc247fd953 Core: Get recompiler to handle DADDI/DADDIU 2022-10-10 11:53:30 +10:30
zilmar a8add093d1 Core: Add CPO_DMF/CPO_DMT to recompiler 2022-10-10 11:38:55 +10:30
zilmar 761a1ee52a Code clean up 2022-10-10 10:52:17 +10:30
zilmar 0d7f25138c Core: Do not check sign extension in 32bit core 2022-10-04 09:47:45 +10:30
zilmar 8391cdafde Core: Fix masking of context 2022-10-03 21:48:09 +10:30
zilmar da138bf38b Project64: Exception when address not sign extended 2022-10-03 18:35:50 +10:30
zilmar 82d9027374 Core: Fix up XContext 2022-10-03 11:29:21 +10:30
zilmar 42cc34964b Core: Sign extend cop0 2022-10-03 09:34:13 +10:30
zilmar 0c078049c0 Android: Update android build 2022-09-26 12:53:14 +09:30
zilmar 179282043f Project64: Code cleanup 2022-09-26 12:01:54 +09:30
zilmar a2981ff4d8 Core: Make Load/Store use 64bit vaddr 2022-09-19 21:36:36 +09:30
zilmar 1c77f6f0fd Core: Make Cop0 64bit 2022-09-19 16:36:44 +09:30
zilmar 21b193152a Core: Fix CMipsMemoryVM::MemoryValue64 for sdl/sdr 2022-09-19 12:13:19 +09:30
zilmar 05d46c9487 Core: Handle reserve instruction 31 2022-09-19 12:12:08 +09:30
zilmar a79a8a9276 Core: Clean up arm recompiler changes 2022-09-12 22:44:42 +09:30
zilmar 457937f039 Core: Map temp pass in flag for 8 bit register 2022-09-12 06:01:43 +09:30
zilmar a640ecfbc0 Core: CMipsMemoryVM::SB_NonMemory should return false just on exception 2022-09-05 21:20:07 +09:30
zilmar 479e2e518c Core: Syscall should increment cycle count 2022-09-05 20:00:28 +09:30
zilmar 43c89a517b Core: Execute CPU should not trigger Loaded game state 2022-09-05 19:56:23 +09:30
zilmar c380571d8b Core: Update when branch goes to the opcode after the delay slot 2022-09-05 19:42:22 +09:30
zilmar 17b78bc705 Core: Clean up CExitInfo::EXIT_REASON enum 2022-09-05 17:42:41 +09:30
zilmar 524f56eda7 Core: fix srav in the interpter 2022-09-05 17:42:15 +09:30
zilmar e171adfef6 Core: Clean up formatting of register names 2022-09-05 16:47:51 +09:30
zilmar 29526583a6 Core: Give cop0 registers names 2022-09-05 16:38:30 +09:30
zilmar 18b9892bc7 Core: Add handling of overflow exception 2022-09-05 16:35:13 +09:30
zilmar 0371c20d32 Core: Use BreakOnUnhandledMemory in SPRegistersHandler when breaking 2022-09-05 11:00:15 +09:30
zilmar 7d55fdca37 Core: Fix bug in CX86RegInfo::FreeX86Reg where x86RegIndex_Size was introduced 2022-09-05 10:42:49 +09:30
zilmar a5c6f25ee3 Core: CX86RecompilerOps::BaseOffsetAddress should not unprotect unless it actually protected 2022-09-05 10:41:18 +09:30
zilmar e8adf78e84 Core: Fix up that x64 files only build in x64 2022-08-29 20:52:15 +09:30
zilmar f7b1891c91 Core: Add base 64bit Recompiler classes 2022-08-29 17:57:17 +09:30
zilmar d82a370e59 Core: Create a x86RegIndex enum 2022-08-29 11:49:20 +09:30
zilmar b88a1ccc1e Core: Fix bug in div for recompiler 2022-08-29 08:33:13 +09:30
zilmar 6782599687 Core: Create a x86 call for calling this functions 2022-08-29 08:32:02 +09:30
zilmar 4218cbad23 Core: R4300iInstruction::DecodeSpecialName - Fix up SLL param 2022-08-29 08:27:47 +09:30
zilmar 52a30b78fb Core: Handle div/0 better 2022-08-22 22:13:53 +09:30
zilmar 9e1d69bcb5 Core: Move m_DMAUsed into PeripheralInterfaceHandler 2022-08-22 13:11:20 +09:30
zilmar f3a392489a Core: Do not fail on checking delay slot, if it is invalid memory 2022-08-22 13:02:25 +09:30
zilmar 9b16d29792 Core: Add rom write decay and some code clean up 2022-08-22 12:47:44 +09:30
zilmar 4b0966a264 Core: RomMemoryHandler Set PI_STATUS_IO_BUSY when write to rom 2022-08-22 12:09:42 +09:30
zilmar 3e198d04a8 core: change CX86RecompilerOps to have a variable for CX86Ops instead of inheriting it 2022-08-15 12:39:34 +09:30
zilmar 71ddfd885d Core: Add BGEZALL to interrupter 2022-08-15 10:18:51 +09:30
zilmar e724595ac2 Core: Add DADDI 2022-08-15 10:05:16 +09:30
zilmar 51c9867e76 Core: Get the recompiler to be use globals less 2022-08-08 20:22:51 +09:30
zilmar 5ea06d958e Core: have SB/SH be able to write to rom handler 2022-08-08 19:33:16 +09:30
zilmar 18870634a5 Core: Clean up some 64bit warnings 2022-08-01 13:15:52 +09:30
zilmar 0419ba232e Core: Add option to step code at break opcode 2022-08-01 11:43:17 +09:30
zilmar b987a1693c Core: Do not end emulation by default on perm loop 2022-08-01 10:59:16 +09:30
zilmar 10d23486c6 Core: Add option to break on address exception 2022-08-01 10:38:12 +09:30
zilmar cffeceef70 Core: Handle rom written to better 2022-08-01 10:15:56 +09:30
zilmar d6a217ca86 Core: fix issue with R4300iOp::SPECIAL_SRA 2022-08-01 10:03:06 +09:30
zilmar d37d0dc7a5 Core: Dissasm of DMFC0 was showing the wrong reg 2022-08-01 10:02:07 +09:30
zilmar d1a938d280 ISViewerHandler: Stop copying data at null 2022-08-01 10:00:57 +09:30
zilmar 7b851e6b6e Core: Break on unhandled memory 2022-08-01 10:00:07 +09:30
zilmar 63051df71e Core: Another fix at 64dd 2022-07-25 22:00:41 +09:30
zilmar ba0ac0ebe5 Core: try to fix 64dd 2022-07-25 21:25:56 +09:30
zilmar f117b5d93a Android: Fix CArmRecompilerOps::Compile_Branch 2022-07-25 17:52:44 +09:30
zilmar c59a0efcab Core: fix LB_KnownAddress for reading rom 2022-07-25 17:22:47 +09:30
zilmar efb2c39a9d Core: Fix DelaySlotEffectsCompare in arm 2022-07-25 17:22:13 +09:30
zilmar 09b535551d Core: Move DelaySlotEffectsCompare into R4300iInstruction 2022-07-25 16:35:42 +09:30
zilmar 0abc7ccaa4 Core: Move OpHasDelaySlot into R4300iInstruction 2022-07-25 14:23:12 +09:30
zilmar 15466b6a9b Core: Fix unaligned rom access with LH/LB 2022-07-25 14:08:09 +09:30
zilmar c3cae358a1 Core: Open debugger on unknown opcode 2022-07-25 14:07:12 +09:30
zilmar 1a8a4dd50f Core: Fix some bugs added to R4300iInstruction Param 2022-07-25 11:57:19 +09:30
zilmar 35c2da49b1 Android: Clean up getting input plugin working 2022-07-18 22:26:29 +09:30
zilmar 763cba7b8a Android: Do not use std::make_unique 2022-07-18 20:31:45 +09:30
zilmar acd5f8ecd5 Core: Add ISViewerHandler 2022-07-18 19:06:34 +09:30
zilmar f0ee90990a Merge branch 'develop' of https://github.com/project64/project64 into develop 2022-07-18 18:57:41 +09:30
zilmar f62f8207ec Core: Initiate PREVID 2022-07-18 18:56:52 +09:30
zilmar 62a245cfc8 Android: Fix changes with R4300iInstruction 2022-07-18 18:55:52 +09:30
zilmar 7f3b8e3601 Core: Start to add R4300iInstruction to do analysis of an opcode 2022-07-18 18:01:00 +09:30
zilmar 47e27b591c Android: Fix some compile issues 2022-07-11 13:39:57 +09:30
zilmar 079e493728 Core: Improve PI Dma 2022-07-04 17:14:27 +09:30
zilmar 8b2c66cc07 Core: Move plugin specs to a central location 2022-06-27 19:32:38 +09:30
zilmar 3913fb5c28 Core: Improve accuracy of SP_DMA_READ and SP_DMA_WRITE 2022-06-20 14:21:32 +09:30
zilmar 837e93d775 Core: Move PI_DMA_READ & PI_DMA_WRITE into PeripheralInterfaceHandler 2022-06-20 09:10:01 +09:30
zilmar cec55c7fd9 Core: clean up some read/writes to SP register for recompiler 2022-06-13 15:44:07 +09:30
zilmar 81b52143ca Core: CX86RecompilerOps::CompileLoadMemoryValue should not minus count any more 2022-06-13 14:23:31 +09:30
zilmar f0760ff1cf Core: Move SP_DMA_WRITE into SPRegistersHandler 2022-06-13 11:46:06 +09:30
zilmar 86aa483a38 Core: Move memory exceptions out of interrupter ops and in to Memory Manager 2022-06-13 11:24:36 +09:30
zilmar b557dcf187 Android: Do some work to try to get it to build 2022-06-06 19:49:44 +09:30
zilmar d83f90f2d2 Core: Have store/load use non memory functions 2022-06-06 12:01:47 +09:30
zilmar 8f1f7e9cf3 core: move add opcode count from pre to post op for recompiler 2022-06-06 11:53:31 +09:30
zilmar dc106c0df8 Core: Start to add store instruction self mod 2022-06-06 11:41:09 +09:30
zilmar c8defc4dca Core: Fix logging in RDRAMRegistersHandler 2022-06-06 11:36:25 +09:30
zilmar 8e5efea6f7 Core: AudioInterfaceHandler::m_Status not being reset on game load/reset 2022-06-01 11:21:34 +09:30
zilmar fae1de846a Core: Fix audio issue with save states 2022-05-31 23:13:19 +09:30
zilmar 603ed853bc Core: Some code clean up for load/store non memory 2022-05-30 20:20:25 +09:30
zilmar 535de2ad49 Core: Modularize Load Memory Value 2022-05-23 16:20:13 +09:30
zilmar 17a7f31bc2 Core: allow CompileStoreMemoryValue to generate address 2022-05-23 07:14:26 +09:30
zilmar 068fad47e5 Core: remove Compile_StoreInstructClean 2022-05-23 06:52:31 +09:30
zilmar 9cc35bbe0e Version: Have year in copyright use the current time at building 2022-05-23 06:37:30 +09:30
zilmar cc0c139f7e Core: modularize store memory values using CompileStoreMemoryValue 2022-05-23 06:24:56 +09:30
zilmar f95c0f7ef1 Core: Fix bug in SDC1 2022-05-20 10:32:15 +09:30
zilmar 1b871fcb15 Core: x86RecompilerOps rename m_TempValue to m_TempValue32 2022-05-16 15:51:37 +09:30
zilmar 487ed8b54d Core: If SMM_PIDMA, clear physical memory code before doing the dma 2022-05-16 15:33:36 +09:30
zilmar 1617e63b84 Core: make memory reads/write to go through new CMipsMemoryVM::MemoryPtr 2022-05-16 15:26:20 +09:30
zilmar 7fb67450a1 Core: X86 recompile modularize loading address in store/load ops 2022-05-16 11:01:18 +09:30
zilmar 1fe8fd1299 Core: have MemoryValue32 be able to read from rom 2022-05-16 11:00:20 +09:30
zilmar 718d7e0359 [Core] Clean up load/store usage in MemoryVirtualMem 2022-05-09 10:06:10 +09:30
zilmar de366db6c1 [Core] Clean up some warnings 2022-05-03 22:46:12 +09:30
zilmar 5a49331c0b Core: Direct tlb method to read and write to memory 2022-05-02 20:22:31 +09:30
zilmar bac3517c86 [Core] Change tlb empty to be -1 and remove rdram from tlb value 2022-05-02 19:10:35 +09:30
zilmar b74a2dc69f [Core] Change TranslateVaddr to VAddrToPAddr 2022-05-02 07:36:50 +09:30
zilmar 4f07f52fed Core: Fix the dma write length 2022-04-27 09:20:33 +09:30
zilmar 2f1074a287 Core: Add handler for cartridge domains 2022-04-25 17:12:07 +09:30
zilmar 016ded2b56 Core: Move Save types 2022-04-19 11:17:43 +09:30
zilmar e9d2b9793f Core: Add Pif Ram Handler 2022-04-19 09:37:57 +09:30
zilmar 653e15a296 Core: Add RomMemoryHandler 2022-04-18 20:57:59 +09:30
zilmar d976aaf22b [Core] Better updating of controller in sync core 2022-04-11 09:26:11 +09:30
zilmar 075e3ab3c2 Core: reduce using global Plugins variable usage in CN64System and use member instead 2022-04-11 09:25:09 +09:30
zilmar f683d080ed [Core] CX86RecompilerOps::SW always update counters on unknown addresses 2022-04-11 09:07:47 +09:30
zilmar fbf65bce12 Core: Add a look up table for Memory Reads or Writes 2022-04-04 10:30:27 +09:30
zilmar a249705bce Core: Add CartridgeDomain2Address1Handler 2022-03-21 20:57:57 +10:30
zilmar 2b646677ac Core: remove Write32SerialInterface 2022-03-21 15:22:42 +10:30