ShuriZma
/
project64
mirror of https://github.com/project64/project64.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

core: change CX86RecompilerOps to have a variable for CX86Ops instead of inheriting it

This commit is contained in:
zilmar 2022-08-15 12:39:34 +09:30
parent 71ddfd885d
commit 3e198d04a8
13 changed files with 2671 additions and 2859 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

62
Source/Project64-core/N64System/Recompiler/CodeSection.cpp
View File

@ -27,7 +27,7 @@ CCodeSection::CCodeSection(CCodeBlock & CodeBlock, uint32_t EnterPC, uint32_t ID
m_InLoop(false),
m_DelaySlot(false),
m_RecompilerOps(CodeBlock.RecompilerOps()),
m_RegEnter(CodeBlock),
m_RegEnter(CodeBlock, CodeBlock.RecompilerOps()->Assembler()),
m_Jump(CodeBlock),
m_Cont(CodeBlock)
{
@ -383,12 +383,12 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
case R4300i_SPECIAL_DSLL32: m_RecompilerOps->SPECIAL_DSLL32(); break;
case R4300i_SPECIAL_DSRL32: m_RecompilerOps->SPECIAL_DSRL32(); break;
case R4300i_SPECIAL_DSRA32: m_RecompilerOps->SPECIAL_DSRA32(); break;
case R4300i_SPECIAL_TEQ: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTEQ); break;
case R4300i_SPECIAL_TNE: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTNE); break;
case R4300i_SPECIAL_TGE: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTGE); break;
case R4300i_SPECIAL_TGEU: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTGEU); break;
case R4300i_SPECIAL_TLT: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTLT); break;
case R4300i_SPECIAL_TLTU: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTLTU); break;
case R4300i_SPECIAL_TEQ: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TEQ); break;
case R4300i_SPECIAL_TNE: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TNE); break;
case R4300i_SPECIAL_TGE: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TGE); break;
case R4300i_SPECIAL_TGEU: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TGEU); break;
case R4300i_SPECIAL_TLT: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TLT); break;
case R4300i_SPECIAL_TLTU: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TLTU); break;
break;
default:
m_RecompilerOps->UnknownOpcode(); break;
@ -397,26 +397,26 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
case R4300i_REGIMM:
switch (Opcode.rt)
{
case R4300i_REGIMM_BLTZ: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBLTZ, false); break;
case R4300i_REGIMM_BGEZ: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBGEZ, false); break;
case R4300i_REGIMM_BLTZL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeBLTZ, false); break;
case R4300i_REGIMM_BGEZL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeBGEZ, false); break;
case R4300i_REGIMM_BLTZAL: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBLTZ, true); break;
case R4300i_REGIMM_BGEZAL: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBGEZ, true); break;
case R4300i_REGIMM_TEQI: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTEQI); break;
case R4300i_REGIMM_TNEI: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTNEI); break;
case R4300i_REGIMM_TGEI: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTGEI); break;
case R4300i_REGIMM_TGEIU: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTGEIU); break;
case R4300i_REGIMM_TLTI: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTLTI); break;
case R4300i_REGIMM_TLTIU: m_RecompilerOps->Compile_TrapCompare(CRecompilerOps::TRAP_COMPARE::CompareTypeTLTIU); break;
case R4300i_REGIMM_BLTZ: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BLTZ, false); break;
case R4300i_REGIMM_BGEZ: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BGEZ, false); break;
case R4300i_REGIMM_BLTZL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_BLTZ, false); break;
case R4300i_REGIMM_BGEZL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_BGEZ, false); break;
case R4300i_REGIMM_BLTZAL: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BLTZ, true); break;
case R4300i_REGIMM_BGEZAL: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BGEZ, true); break;
case R4300i_REGIMM_TEQI: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TEQI); break;
case R4300i_REGIMM_TNEI: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TNEI); break;
case R4300i_REGIMM_TGEI: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TGEI); break;
case R4300i_REGIMM_TGEIU: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TGEIU); break;
case R4300i_REGIMM_TLTI: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TLTI); break;
case R4300i_REGIMM_TLTIU: m_RecompilerOps->Compile_TrapCompare(RecompilerTrapCompare_TLTIU); break;
default:
m_RecompilerOps->UnknownOpcode(); break;
}
break;
case R4300i_BEQ: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBEQ, false); break;
case R4300i_BNE: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBNE, false); break;
case R4300i_BGTZ: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBGTZ, false); break;
case R4300i_BLEZ: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeBLEZ, false); break;
case R4300i_BEQ: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BEQ, false); break;
case R4300i_BNE: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BNE, false); break;
case R4300i_BGTZ: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BGTZ, false); break;
case R4300i_BLEZ: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_BLEZ, false); break;
case R4300i_J: m_RecompilerOps->J(); break;
case R4300i_JAL: m_RecompilerOps->JAL(); break;
case R4300i_ADDI: m_RecompilerOps->ADDI(); break;
@ -463,10 +463,10 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
case R4300i_COP1_BC:
switch (Opcode.ft)
{
case R4300i_COP1_BC_BCF: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeCOP1BCF, false); break;
case R4300i_COP1_BC_BCT: m_RecompilerOps->Compile_Branch(CRecompilerOps::CompareTypeCOP1BCT, false); break;
case R4300i_COP1_BC_BCFL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeCOP1BCF, false); break;
case R4300i_COP1_BC_BCTL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeCOP1BCT, false); break;
case R4300i_COP1_BC_BCF: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_COP1BCF, false); break;
case R4300i_COP1_BC_BCT: m_RecompilerOps->Compile_Branch(RecompilerBranchCompare_COP1BCT, false); break;
case R4300i_COP1_BC_BCFL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_COP1BCF, false); break;
case R4300i_COP1_BC_BCTL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_COP1BCT, false); break;
default:
m_RecompilerOps->UnknownOpcode(); break;
}
@ -563,10 +563,10 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
m_RecompilerOps->UnknownOpcode(); break;
}
break;
case R4300i_BEQL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeBEQ, false); break;
case R4300i_BNEL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeBNE, false); break;
case R4300i_BGTZL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeBGTZ, false); break;
case R4300i_BLEZL: m_RecompilerOps->Compile_BranchLikely(CRecompilerOps::CompareTypeBLEZ, false); break;
case R4300i_BEQL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_BEQ, false); break;
case R4300i_BNEL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_BNE, false); break;
case R4300i_BGTZL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_BGTZ, false); break;
case R4300i_BLEZL: m_RecompilerOps->Compile_BranchLikely(RecompilerBranchCompare_BLEZ, false); break;
case R4300i_DADDI: m_RecompilerOps->DADDI(); break;
case R4300i_DADDIU: m_RecompilerOps->DADDIU(); break;
case R4300i_LDL: m_RecompilerOps->LDL(); break;

3
Source/Project64-core/N64System/Recompiler/ExitInfo.cpp
View File

@ -1,10 +1,11 @@
#include "stdafx.h"
#include <Project64-core\N64System\Recompiler\ExitInfo.h>
#include <Project64-core\N64System\Recompiler\CodeBlock.h>
CExitInfo::CExitInfo(CCodeBlock & CodeBlock) :
ID(0),
TargetPC(0),
JumpLoc(nullptr),
ExitRegSet(CodeBlock)
ExitRegSet(CodeBlock, CodeBlock.RecompilerOps()->Assembler())
{
}

3
Source/Project64-core/N64System/Recompiler/SectionInfo.cpp → Source/Project64-core/N64System/Recompiler/JumpInfo.cpp
View File

@ -1,9 +1,10 @@
#include "stdafx.h"
#include <Project64-core\N64System\Recompiler\CodeBlock.h>
#include "SectionInfo.h"
#include "JumpInfo.h"
CJumpInfo::CJumpInfo(CCodeBlock & CodeBlock) :
RegSet(CodeBlock)
RegSet(CodeBlock, CodeBlock.RecompilerOps()->Assembler())
{
TargetPC = (uint32_t)-1;
JumpPC = (uint32_t)-1;

4
Source/Project64-core/N64System/Recompiler/LoopAnalysis.cpp
View File

@ -18,7 +18,7 @@ LoopAnalysis::LoopAnalysis(CCodeBlock & CodeBlock, CCodeSection * Section) :
m_PC((uint32_t)-1),
m_PipelineStage(PIPELINE_STAGE_NORMAL),
m_Test(CodeBlock.NextTest()),
m_Reg(CodeBlock)
m_Reg(CodeBlock, CodeBlock.RecompilerOps()->Assembler())
{
memset(&m_Command, 0, sizeof(m_Command));
}
@ -74,7 +74,7 @@ bool LoopAnalysis::SetupEnterSection(CCodeSection * Section, bool & bChanged, bo
m_CodeBlock.Log("%s: Block EnterPC: %X Section ID %d Test: %X Section Test: %X CompiledLocation: %X", __FUNCTION__, m_CodeBlock.VAddrEnter(), Section->m_SectionID, m_Test, Section->m_Test, Section->m_CompiledLocation);
bool bFirstParent = true;
CRegInfo RegEnter(m_CodeBlock);
CRegInfo RegEnter(m_CodeBlock, m_CodeBlock.RecompilerOps()->Assembler());
for (CCodeSection::SECTION_LIST::iterator iter = Section->m_ParentSection.begin(); iter != Section->m_ParentSection.end(); iter++)
{
CCodeSection * Parent = *iter;

271
Source/Project64-core/N64System/Recompiler/RecompilerOps.h
View File

@ -1,236 +1,43 @@
#pragma once
#include <Project64-core/N64System/Recompiler/RegInfo.h>
#include <Project64-core/N64System/Recompiler/JumpInfo.h>
#include <Project64-core/N64System/Mips/R4300iOpcode.h>
class CCodeSection;
class CRecompilerOps
enum RecompilerBranchType
{
public:
enum BRANCH_TYPE
{
BranchTypeCop1,
BranchTypeRs,
BranchTypeRsRt
};
enum BRANCH_COMPARE
{
CompareTypeBEQ,
CompareTypeBNE,
CompareTypeBLTZ,
CompareTypeBLEZ,
CompareTypeBGTZ,
CompareTypeBGEZ,
CompareTypeCOP1BCF,
CompareTypeCOP1BCT,
};
enum TRAP_COMPARE
{
CompareTypeTEQ,
CompareTypeTNE,
CompareTypeTGE,
CompareTypeTGEU,
CompareTypeTLT,
CompareTypeTLTU,
CompareTypeTEQI,
CompareTypeTNEI,
CompareTypeTGEI,
CompareTypeTGEIU,
CompareTypeTLTI,
CompareTypeTLTIU,
};
// Trap functions
virtual void Compile_TrapCompare(TRAP_COMPARE CompareType) = 0;
// Branch functions
virtual void Compile_Branch(BRANCH_COMPARE CompareType, bool Link) = 0;
virtual void Compile_BranchLikely(BRANCH_COMPARE CompareType, bool Link) = 0;
// Opcode functions
virtual void J() = 0;
virtual void JAL() = 0;
virtual void ADDI() = 0;
virtual void ADDIU() = 0;
virtual void SLTI() = 0;
virtual void SLTIU() = 0;
virtual void ANDI() = 0;
virtual void ORI() = 0;
virtual void XORI() = 0;
virtual void LUI() = 0;
virtual void DADDI() = 0;
virtual void DADDIU() = 0;
virtual void LDL() = 0;
virtual void LDR() = 0;
virtual void LB() = 0;
virtual void LH() = 0;
virtual void LWL() = 0;
virtual void LW() = 0;
virtual void LBU() = 0;
virtual void LHU() = 0;
virtual void LWR() = 0;
virtual void LWU() = 0;
virtual void SB() = 0;
virtual void SH() = 0;
virtual void SWL() = 0;
virtual void SW() = 0;
virtual void SWR() = 0;
virtual void SDL() = 0;
virtual void SDR() = 0;
virtual void CACHE() = 0;
virtual void LL() = 0;
virtual void LWC1() = 0;
virtual void LDC1() = 0;
virtual void LD() = 0;
virtual void SC() = 0;
virtual void SWC1() = 0;
virtual void SDC1() = 0;
virtual void SD() = 0;
// R4300i opcodes: Special
virtual void SPECIAL_SLL() = 0;
virtual void SPECIAL_SRL() = 0;
virtual void SPECIAL_SRA() = 0;
virtual void SPECIAL_SLLV() = 0;
virtual void SPECIAL_SRLV() = 0;
virtual void SPECIAL_SRAV() = 0;
virtual void SPECIAL_JR() = 0;
virtual void SPECIAL_JALR() = 0;
virtual void SPECIAL_SYSCALL() = 0;
virtual void SPECIAL_MFLO() = 0;
virtual void SPECIAL_MTLO() = 0;
virtual void SPECIAL_MFHI() = 0;
virtual void SPECIAL_MTHI() = 0;
virtual void SPECIAL_DSLLV() = 0;
virtual void SPECIAL_DSRLV() = 0;
virtual void SPECIAL_DSRAV() = 0;
virtual void SPECIAL_MULT() = 0;
virtual void SPECIAL_MULTU() = 0;
virtual void SPECIAL_DIV() = 0;
virtual void SPECIAL_DIVU() = 0;
virtual void SPECIAL_DMULT() = 0;
virtual void SPECIAL_DMULTU() = 0;
virtual void SPECIAL_DDIV() = 0;
virtual void SPECIAL_DDIVU() = 0;
virtual void SPECIAL_ADD() = 0;
virtual void SPECIAL_ADDU() = 0;
virtual void SPECIAL_SUB() = 0;
virtual void SPECIAL_SUBU() = 0;
virtual void SPECIAL_AND() = 0;
virtual void SPECIAL_OR() = 0;
virtual void SPECIAL_XOR() = 0;
virtual void SPECIAL_NOR() = 0;
virtual void SPECIAL_SLT() = 0;
virtual void SPECIAL_SLTU() = 0;
virtual void SPECIAL_DADD() = 0;
virtual void SPECIAL_DADDU() = 0;
virtual void SPECIAL_DSUB() = 0;
virtual void SPECIAL_DSUBU() = 0;
virtual void SPECIAL_DSLL() = 0;
virtual void SPECIAL_DSRL() = 0;
virtual void SPECIAL_DSRA() = 0;
virtual void SPECIAL_DSLL32() = 0;
virtual void SPECIAL_DSRL32() = 0;
virtual void SPECIAL_DSRA32() = 0;
// COP0 functions
virtual void COP0_MF() = 0;
virtual void COP0_MT() = 0;
// COP0 CO functions
virtual void COP0_CO_TLBR() = 0;
virtual void COP0_CO_TLBWI() = 0;
virtual void COP0_CO_TLBWR() = 0;
virtual void COP0_CO_TLBP() = 0;
virtual void COP0_CO_ERET() = 0;
// COP1 functions
virtual void COP1_MF() = 0;
virtual void COP1_DMF() = 0;
virtual void COP1_CF() = 0;
virtual void COP1_MT() = 0;
virtual void COP1_DMT() = 0;
virtual void COP1_CT() = 0;
// COP1: S functions
virtual void COP1_S_ADD() = 0;
virtual void COP1_S_SUB() = 0;
virtual void COP1_S_MUL() = 0;
virtual void COP1_S_DIV() = 0;
virtual void COP1_S_ABS() = 0;
virtual void COP1_S_NEG() = 0;
virtual void COP1_S_SQRT() = 0;
virtual void COP1_S_MOV() = 0;
virtual void COP1_S_ROUND_L() = 0;
virtual void COP1_S_TRUNC_L() = 0;
virtual void COP1_S_CEIL_L() = 0;
virtual void COP1_S_FLOOR_L() = 0;
virtual void COP1_S_ROUND_W() = 0;
virtual void COP1_S_TRUNC_W() = 0;
virtual void COP1_S_CEIL_W() = 0;
virtual void COP1_S_FLOOR_W() = 0;
virtual void COP1_S_CVT_D() = 0;
virtual void COP1_S_CVT_W() = 0;
virtual void COP1_S_CVT_L() = 0;
virtual void COP1_S_CMP() = 0;
// COP1: D functions
virtual void COP1_D_ADD() = 0;
virtual void COP1_D_SUB() = 0;
virtual void COP1_D_MUL() = 0;
virtual void COP1_D_DIV() = 0;
virtual void COP1_D_ABS() = 0;
virtual void COP1_D_NEG() = 0;
virtual void COP1_D_SQRT() = 0;
virtual void COP1_D_MOV() = 0;
virtual void COP1_D_ROUND_L() = 0;
virtual void COP1_D_TRUNC_L() = 0;
virtual void COP1_D_CEIL_L() = 0;
virtual void COP1_D_FLOOR_L() = 0;
virtual void COP1_D_ROUND_W() = 0;
virtual void COP1_D_TRUNC_W() = 0;
virtual void COP1_D_CEIL_W() = 0;
virtual void COP1_D_FLOOR_W() = 0;
virtual void COP1_D_CVT_S() = 0;
virtual void COP1_D_CVT_W() = 0;
virtual void COP1_D_CVT_L() = 0;
virtual void COP1_D_CMP() = 0;
// COP1: W functions
virtual void COP1_W_CVT_S() = 0;
virtual void COP1_W_CVT_D() = 0;
// COP1: L functions
virtual void COP1_L_CVT_S() = 0;
virtual void COP1_L_CVT_D() = 0;
// Other functions
virtual void UnknownOpcode() = 0;
virtual void EnterCodeBlock() = 0;
virtual void ExitCodeBlock() = 0;
virtual void CompileExitCode() = 0;
virtual void CompileCop1Test() = 0;
virtual void CompileInPermLoop(CRegInfo & RegSet, uint32_t ProgramCounter) = 0;
virtual void SyncRegState(const CRegInfo & SyncTo) = 0;
virtual void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason) = 0;
virtual void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet) = 0;
virtual CRegInfo & GetRegWorkingSet(void) = 0;
virtual void SetRegWorkingSet(const CRegInfo & RegInfo) = 0;
virtual bool InheritParentInfo() = 0;
virtual void LinkJump(CJumpInfo & JumpInfo, uint32_t SectionID = -1, uint32_t FromSectionID = -1) = 0;
virtual void JumpToSection(CCodeSection * Section) = 0;
virtual void JumpToUnknown(CJumpInfo * JumpInfo) = 0;
virtual void SetCurrentPC(uint32_t ProgramCounter) = 0;
virtual uint32_t GetCurrentPC(void) = 0;
virtual void SetCurrentSection(CCodeSection * section) = 0;
virtual void SetNextStepType(PIPELINE_STAGE StepType) = 0;
virtual PIPELINE_STAGE GetNextStepType(void) = 0;
virtual const R4300iOpcode & GetOpcode(void) const = 0;
virtual void PreCompileOpcode(void) = 0;
virtual void PostCompileOpcode(void) = 0;
virtual void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true) = 0;
virtual void CompileExecuteBP(void) = 0;
virtual void CompileExecuteDelaySlotBP(void) = 0;
RecompilerBranchType_Cop1,
RecompilerBranchType_Rs,
RecompilerBranchType_RsRt
};
enum RecompilerBranchCompare
{
RecompilerBranchCompare_BEQ,
RecompilerBranchCompare_BNE,
RecompilerBranchCompare_BLTZ,
RecompilerBranchCompare_BLEZ,
RecompilerBranchCompare_BGTZ,
RecompilerBranchCompare_BGEZ,
RecompilerBranchCompare_COP1BCF,
RecompilerBranchCompare_COP1BCT,
};
enum RecompilerTrapCompare
{
RecompilerTrapCompare_TEQ,
RecompilerTrapCompare_TNE,
RecompilerTrapCompare_TGE,
RecompilerTrapCompare_TGEU,
RecompilerTrapCompare_TLT,
RecompilerTrapCompare_TLTU,
RecompilerTrapCompare_TEQI,
RecompilerTrapCompare_TNEI,
RecompilerTrapCompare_TGEI,
RecompilerTrapCompare_TGEIU,
RecompilerTrapCompare_TLTI,
RecompilerTrapCompare_TLTIU,
};
#if defined(__i386__) || defined(_M_IX86)
#include <Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h>
typedef CX86RecompilerOps CRecompilerOps;
#endif

4526
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

File diff suppressed because it is too large Load Diff

49
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
View File

@ -11,15 +11,13 @@
#include <Project64-core/N64System/Interpreter/InterpreterOps.h>
#include <Project64-core/Settings/N64SystemSettings.h>
#include <Project64-core/Settings/RecompilerSettings.h>
#include <Project64-core\Settings\GameSettings.h>
#include <Project64-core/Settings/GameSettings.h>
class CCodeBlock;
class CCodeSection;
class CX86RecompilerOps :
public CRecompilerOps,
protected R4300iOp,
protected CX86Ops,
protected CN64SystemSettings,
protected CRecompilerSettings,
private CGameSettings
@ -29,12 +27,12 @@ public:
~CX86RecompilerOps();
// Trap functions
void Compile_TrapCompare(TRAP_COMPARE CompareType);
void Compile_TrapCompare(RecompilerTrapCompare CompareType);
// Branch functions
void Compile_BranchCompare(BRANCH_COMPARE CompareType);
void Compile_Branch(BRANCH_COMPARE CompareType, bool Link);
void Compile_BranchLikely(BRANCH_COMPARE CompareType, bool Link);
void Compile_BranchCompare(RecompilerBranchCompare CompareType);
void Compile_Branch(RecompilerBranchCompare CompareType, bool Link);
void Compile_BranchLikely(RecompilerBranchCompare CompareType, bool Link);
void BNE_Compare();
void BEQ_Compare();
void BGTZ_Compare();
@ -208,9 +206,9 @@ public:
void FoundMemoryBreakpoint();
void PreReadInstruction();
void PreWriteInstruction();
void TestWriteBreakpoint(x86Reg AddressReg, void * FunctAddress, const char * FunctName);
void TestReadBreakpoint(x86Reg AddressReg, void * FunctAddress, const char * FunctName);
void TestBreakpoint(x86Reg AddressReg, void * FunctAddress, const char * FunctName);
void TestWriteBreakpoint(CX86Ops::x86Reg AddressReg, void * FunctAddress, const char * FunctName);
void TestReadBreakpoint(CX86Ops::x86Reg AddressReg, void * FunctAddress, const char * FunctName);
void TestBreakpoint(CX86Ops::x86Reg AddressReg, void * FunctAddress, const char * FunctName);
void EnterCodeBlock();
void ExitCodeBlock();
void CompileExitCode();
@ -234,9 +232,9 @@ public:
void PostCompileOpcode(void);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason);
void CompileReadTLBMiss(uint32_t VirtualAddress, x86Reg LookUpReg);
void CompileReadTLBMiss(x86Reg AddressReg, x86Reg LookUpReg);
void CompileWriteTLBMiss(x86Reg AddressReg, x86Reg LookUpReg);
void CompileReadTLBMiss(uint32_t VirtualAddress, CX86Ops::x86Reg LookUpReg);
void CompileReadTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg);
void CompileWriteTLBMiss(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg LookUpReg);
void UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles);
void UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool ClearValues = false, bool UpdateTimer = true);
void CompileSystemCheck(uint32_t TargetPC, const CRegInfo & RegSet);
@ -245,6 +243,8 @@ public:
static void ChangeDefaultRoundingModel();
void OverflowDelaySlot(bool TestTimer);
CX86Ops & Assembler() { return m_Assembler; }
// Helper functions
typedef CRegInfo::REG_STATE REG_STATE;
@ -273,23 +273,23 @@ public:
void ChangeFPURegFormat(int32_t Reg, CRegInfo::FPU_STATE OldFormat, CRegInfo::FPU_STATE NewFormat, CRegInfo::FPU_ROUND RoundingModel) { m_RegWorkingSet.ChangeFPURegFormat(Reg, OldFormat, NewFormat, RoundingModel); }
void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, CRegInfo::FPU_STATE Format) { m_RegWorkingSet.Load_FPR_ToTop(Reg, RegToLoad, Format); }
bool RegInStack(int32_t Reg, CRegInfo::FPU_STATE Format) { return m_RegWorkingSet.RegInStack(Reg, Format); }
x86FpuValues StackPosition(int32_t Reg) { return m_RegWorkingSet.StackPosition(Reg); }
CX86Ops::x86FpuValues StackPosition(int32_t Reg) { return m_RegWorkingSet.StackPosition(Reg); }
void UnMap_AllFPRs() { m_RegWorkingSet.UnMap_AllFPRs(); }
void UnMap_FPR(uint32_t Reg, bool WriteBackValue) { m_RegWorkingSet.UnMap_FPR(Reg, WriteBackValue); }
x86Reg FreeX86Reg() { return m_RegWorkingSet.FreeX86Reg(); }
x86Reg Free8BitX86Reg() { return m_RegWorkingSet.Free8BitX86Reg(); }
CX86Ops::x86Reg FreeX86Reg() { return m_RegWorkingSet.FreeX86Reg(); }
CX86Ops::x86Reg Free8BitX86Reg() { return m_RegWorkingSet.Free8BitX86Reg(); }
void Map_GPR_32bit(int32_t Reg, bool SignValue, int32_t MipsRegToLoad) { m_RegWorkingSet.Map_GPR_32bit(Reg, SignValue, MipsRegToLoad); }
void Map_GPR_64bit(int32_t Reg, int32_t MipsRegToLoad) { m_RegWorkingSet.Map_GPR_64bit(Reg, MipsRegToLoad); }
x86Reg Get_MemoryStack() { return m_RegWorkingSet.Get_MemoryStack(); }
x86Reg Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue = true) { return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue); }
x86Reg Map_TempReg(x86Reg Reg, int32_t MipsReg, bool LoadHiWord) { return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord); }
CX86Ops::x86Reg Get_MemoryStack() { return m_RegWorkingSet.Get_MemoryStack(); }
CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true) { return m_RegWorkingSet.Map_MemoryStack(Reg, bMapRegister, LoadValue); }
CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord) { return m_RegWorkingSet.Map_TempReg(Reg, MipsReg, LoadHiWord); }
void ProtectGPR(uint32_t Reg) { m_RegWorkingSet.ProtectGPR(Reg); }
void UnProtectGPR(uint32_t Reg) { m_RegWorkingSet.UnProtectGPR(Reg); }
void ResetX86Protection() { m_RegWorkingSet.ResetX86Protection(); }
x86Reg UnMap_TempReg() { return m_RegWorkingSet.UnMap_TempReg(); }
CX86Ops::x86Reg UnMap_TempReg() { return m_RegWorkingSet.UnMap_TempReg(); }
void UnMap_GPR(uint32_t Reg, bool WriteBackValue) { m_RegWorkingSet.UnMap_GPR(Reg, WriteBackValue); }
bool UnMap_X86reg(x86Reg Reg) { return m_RegWorkingSet.UnMap_X86reg(Reg); }
bool UnMap_X86reg(CX86Ops::x86Reg Reg) { return m_RegWorkingSet.UnMap_X86reg(Reg); }
public:
uint32_t CompilePC() { return m_CompilePC; }
@ -308,9 +308,9 @@ private:
void SH_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
void SW_Const(uint32_t Value, uint32_t Addr);
void SW_Register(CX86Ops::x86Reg Reg, uint32_t Addr);
void LB_KnownAddress(x86Reg Reg, uint32_t VAddr, bool SignExtend);
void LH_KnownAddress(x86Reg Reg, uint32_t VAddr, bool SignExtend);
void LW_KnownAddress(x86Reg Reg, uint32_t VAddr);
void LB_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend);
void LH_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr, bool SignExtend);
void LW_KnownAddress(CX86Ops::x86Reg Reg, uint32_t VAddr);
void LW(bool ResultSigned, bool bRecordLLBit);
void SW(bool bCheckLLbit);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void(CX86Ops::*x86Jmp)(const char * Label, uint32_t Value));
@ -319,6 +319,7 @@ private:
EXIT_LIST m_ExitInfo;
CMipsMemoryVM & m_MMU;
CCodeBlock & m_CodeBlock;
CX86Ops m_Assembler;
PIPELINE_STAGE m_PipelineStage;
uint32_t m_CompilePC;
R4300iOpcode m_Opcode;

480
Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
View File

File diff suppressed because it is too large Load Diff

68
Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h
View File

@ -9,7 +9,6 @@
class CX86RegInfo :
public CRegBase,
private CDebugSettings,
private CX86Ops,
private CSystemRegisters
{
public:
@ -33,7 +32,7 @@ public:
};
public:
CX86RegInfo(CCodeBlock & CodeBlock);
CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler);
CX86RegInfo(const CX86RegInfo&);
~CX86RegInfo();
@ -47,42 +46,42 @@ public:
void BeforeCallDirect(void);
void AfterCallDirect(void);
void FixRoundModel(FPU_ROUND RoundMethod);
void ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel);
void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format);
bool RegInStack(int32_t Reg, FPU_STATE Format);
void UnMap_AllFPRs();
void UnMap_FPR(int32_t Reg, bool WriteBackValue);
x86FpuValues StackPosition(int32_t Reg);
void FixRoundModel(FPU_ROUND RoundMethod);
void ChangeFPURegFormat(int32_t Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel);
void Load_FPR_ToTop(int32_t Reg, int32_t RegToLoad, FPU_STATE Format);
bool RegInStack(int32_t Reg, FPU_STATE Format);
void UnMap_AllFPRs();
void UnMap_FPR(int32_t Reg, bool WriteBackValue);
CX86Ops::x86FpuValues StackPosition(int32_t Reg);
x86Reg FreeX86Reg();
x86Reg Free8BitX86Reg();
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
x86Reg Get_MemoryStack() const;
x86Reg Map_MemoryStack(x86Reg Reg, bool bMapRegister, bool LoadValue = true);
x86Reg Map_TempReg(x86Reg Reg, int32_t MipsReg, bool LoadHiWord);
void ProtectGPR(uint32_t Reg);
void UnProtectGPR(uint32_t Reg);
void ResetX86Protection();
x86Reg UnMap_TempReg();
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
bool UnMap_X86reg(x86Reg Reg);
void WriteBackRegisters();
CX86Ops::x86Reg FreeX86Reg();
CX86Ops::x86Reg Free8BitX86Reg();
void Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsRegToLoad);
void Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad);
CX86Ops::x86Reg Get_MemoryStack() const;
CX86Ops::x86Reg Map_MemoryStack(CX86Ops::x86Reg Reg, bool bMapRegister, bool LoadValue = true);
CX86Ops::x86Reg Map_TempReg(CX86Ops::x86Reg Reg, int32_t MipsReg, bool LoadHiWord);
void ProtectGPR(uint32_t Reg);
void UnProtectGPR(uint32_t Reg);
void ResetX86Protection();
CX86Ops::x86Reg UnMap_TempReg();
void UnMap_GPR(uint32_t Reg, bool WriteBackValue);
bool UnMap_X86reg(CX86Ops::x86Reg Reg);
void WriteBackRegisters();
CX86Ops::x86Reg GetMipsRegMapLo(int32_t Reg) const { return m_RegMapLo[Reg]; }
CX86Ops::x86Reg GetMipsRegMapHi(int32_t Reg) const { return m_RegMapHi[Reg]; }
uint32_t GetX86MapOrder(x86Reg Reg) const { return m_x86reg_MapOrder[Reg]; }
bool GetX86Protected(x86Reg Reg) const { return m_x86reg_Protected[Reg]; }
REG_MAPPED GetX86Mapped(x86Reg Reg) const { return m_x86reg_MappedTo[Reg]; }
uint32_t GetX86MapOrder(CX86Ops::x86Reg Reg) const { return m_x86reg_MapOrder[Reg]; }
bool GetX86Protected(CX86Ops::x86Reg Reg) const { return m_x86reg_Protected[Reg]; }
REG_MAPPED GetX86Mapped(CX86Ops::x86Reg Reg) const { return m_x86reg_MappedTo[Reg]; }
void SetMipsRegMapLo(int32_t GetMipsReg, x86Reg Reg) { m_RegMapLo[GetMipsReg] = Reg; }
void SetMipsRegMapHi(int32_t GetMipsReg, x86Reg Reg) { m_RegMapHi[GetMipsReg] = Reg; }
void SetMipsRegMapLo(int32_t GetMipsReg, CX86Ops::x86Reg Reg) { m_RegMapLo[GetMipsReg] = Reg; }
void SetMipsRegMapHi(int32_t GetMipsReg, CX86Ops::x86Reg Reg) { m_RegMapHi[GetMipsReg] = Reg; }
void SetX86MapOrder(x86Reg Reg, uint32_t Order) { m_x86reg_MapOrder[Reg] = Order; }
void SetX86Protected(x86Reg Reg, bool Protected) { m_x86reg_Protected[Reg] = Protected; }
void SetX86Mapped(x86Reg Reg, REG_MAPPED Mapping) { m_x86reg_MappedTo[Reg] = Mapping; }
void SetX86MapOrder(CX86Ops::x86Reg Reg, uint32_t Order) { m_x86reg_MapOrder[Reg] = Order; }
void SetX86Protected(CX86Ops::x86Reg Reg, bool Protected) { m_x86reg_Protected[Reg] = Protected; }
void SetX86Mapped(CX86Ops::x86Reg Reg, REG_MAPPED Mapping) { m_x86reg_MappedTo[Reg] = Mapping; }
int32_t & StackTopPos() { return m_Stack_TopPos; }
int32_t & FpuMappedTo(int32_t Reg) { return m_x86fpu_MappedTo[Reg]; }
@ -93,11 +92,12 @@ private:
CX86RegInfo();
CCodeBlock & m_CodeBlock;
x86Reg UnMap_8BitTempReg();
CX86Ops & m_Assembler;
CX86Ops::x86Reg UnMap_8BitTempReg();
// r4k
x86Reg m_RegMapHi[32];
x86Reg m_RegMapLo[32];
CX86Ops::x86Reg m_RegMapHi[32];
CX86Ops::x86Reg m_RegMapLo[32];
REG_MAPPED m_x86reg_MappedTo[10];
uint32_t m_x86reg_MapOrder[10];

52
Source/Project64-core/N64System/Recompiler/x86/x86ops.cpp
View File

@ -195,7 +195,7 @@ void CX86Ops::X86HardBreakPoint()
AddCode8(0xCC);
}
void CX86Ops::X86BreakPoint(const char * FileName, int LineNumber)
void CX86Ops::X86BreakPoint(const char * FileName, int32_t LineNumber)
{
Pushad();
PushImm32(stdstr_f("%d", LineNumber).c_str(), LineNumber);
@ -671,7 +671,7 @@ void CX86Ops::LeaRegReg2(x86Reg RegDest, x86Reg RegSrc, x86Reg RegSrc2, Multiple
AddCode8((uint8_t)(0x05 + (RegSrc * 0x8) + RegSrc2 + CalcMultiplyCode(multiplier)));
}
void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int offset)
void CX86Ops::LeaSourceAndOffset(x86Reg x86DestReg, x86Reg x86SourceReg, int32_t offset)
{
uint16_t x86Command = 0;
@ -1370,7 +1370,7 @@ void CX86Ops::MoveVariableToX86reg(void *Variable, const char * VariableName, x8
AddCode32((uint32_t)Variable);
}
void CX86Ops::MoveVariableDispToX86Reg(void *Variable, const char * VariableName, x86Reg reg, x86Reg AddrReg, int Multiplier)
void CX86Ops::MoveVariableDispToX86Reg(void *Variable, const char * VariableName, x86Reg reg, x86Reg AddrReg, int32_t Multiplier)
{
int x = 0;
CodeLog(" mov %s, dword ptr [%s+%s*%i]", x86_Name(reg), VariableName, x86_Name(AddrReg), Multiplier);
@ -3367,7 +3367,7 @@ void CX86Ops::fpuAddReg(x86FpuValues x86reg)
}
}
void CX86Ops::fpuAddRegPop(int * StackPos, x86FpuValues reg)
void CX86Ops::fpuAddRegPop(int32_t * StackPos, x86FpuValues reg)
{
CodeLog(" faddp ST(0), %s", fpu_Name(reg));
*StackPos = (*StackPos + 1) & 7;
@ -3596,14 +3596,14 @@ void CX86Ops::fpuFree(x86FpuValues Reg)
}
}
void CX86Ops::fpuDecStack(int * StackPos)
void CX86Ops::fpuDecStack(int32_t * StackPos)
{
CodeLog(" fdecstp");
*StackPos = (*StackPos - 1) & 7;
AddCode16(0xF6D9);
}
void CX86Ops::fpuIncStack(int * StackPos)
void CX86Ops::fpuIncStack(int32_t * StackPos)
{
CodeLog(" fincstp");
*StackPos = (*StackPos + 1) & 7;
@ -3617,7 +3617,7 @@ void CX86Ops::fpuLoadControl(void *Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuLoadDword(int * StackPos, void *Variable, const char * VariableName)
void CX86Ops::fpuLoadDword(int32_t * StackPos, void *Variable, const char * VariableName)
{
CodeLog(" fld dword ptr [%s]", VariableName);
*StackPos = (*StackPos - 1) & 7;
@ -3625,7 +3625,7 @@ void CX86Ops::fpuLoadDword(int * StackPos, void *Variable, const char * Variable
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuLoadDwordFromX86Reg(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fld dword ptr [%s]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3643,7 +3643,7 @@ void CX86Ops::fpuLoadDwordFromX86Reg(int * StackPos, x86Reg x86reg)
}
}
void CX86Ops::fpuLoadDwordFromN64Mem(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadDwordFromN64Mem(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fld dword ptr [%s+N64mem]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3662,7 +3662,7 @@ void CX86Ops::fpuLoadDwordFromN64Mem(int * StackPos, x86Reg x86reg)
AddCode32((uint32_t)g_MMU->Rdram());
}
void CX86Ops::fpuLoadInt32bFromN64Mem(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadInt32bFromN64Mem(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fild dword ptr [%s+N64mem]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3681,7 +3681,7 @@ void CX86Ops::fpuLoadInt32bFromN64Mem(int * StackPos, x86Reg x86reg)
AddCode32((uint32_t)g_MMU->Rdram());
}
void CX86Ops::fpuLoadIntegerDword(int * StackPos, void *Variable, const char * VariableName)
void CX86Ops::fpuLoadIntegerDword(int32_t * StackPos, void *Variable, const char * VariableName)
{
CodeLog(" fild dword ptr [%s]", VariableName);
*StackPos = (*StackPos - 1) & 7;
@ -3689,7 +3689,7 @@ void CX86Ops::fpuLoadIntegerDword(int * StackPos, void *Variable, const char * V
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fild dword ptr [%s]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3707,7 +3707,7 @@ void CX86Ops::fpuLoadIntegerDwordFromX86Reg(int * StackPos, x86Reg x86reg)
}
}
void CX86Ops::fpuLoadIntegerQword(int * StackPos, void *Variable, const char * VariableName)
void CX86Ops::fpuLoadIntegerQword(int32_t * StackPos, void *Variable, const char * VariableName)
{
CodeLog(" fild qword ptr [%s]", VariableName);
*StackPos = (*StackPos - 1) & 7;
@ -3715,7 +3715,7 @@ void CX86Ops::fpuLoadIntegerQword(int * StackPos, void *Variable, const char * V
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fild qword ptr [%s]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3733,7 +3733,7 @@ void CX86Ops::fpuLoadIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg)
}
}
void CX86Ops::fpuLoadQword(int * StackPos, void *Variable, const char * VariableName)
void CX86Ops::fpuLoadQword(int32_t * StackPos, void *Variable, const char * VariableName)
{
CodeLog(" fld qword ptr [%s]", VariableName);
*StackPos = (*StackPos - 1) & 7;
@ -3741,7 +3741,7 @@ void CX86Ops::fpuLoadQword(int * StackPos, void *Variable, const char * Variable
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuLoadQwordFromX86Reg(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fld qword ptr [%s]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3759,7 +3759,7 @@ void CX86Ops::fpuLoadQwordFromX86Reg(int * StackPos, x86Reg x86reg)
}
}
void CX86Ops::fpuLoadQwordFromN64Mem(int * StackPos, x86Reg x86reg)
void CX86Ops::fpuLoadQwordFromN64Mem(int32_t * StackPos, x86Reg x86reg)
{
CodeLog(" fld qword ptr [%s+N64mem]", x86_Name(x86reg));
*StackPos = (*StackPos - 1) & 7;
@ -3778,7 +3778,7 @@ void CX86Ops::fpuLoadQwordFromN64Mem(int * StackPos, x86Reg x86reg)
AddCode32((uint32_t)g_MMU->Rdram());
}
void CX86Ops::fpuLoadReg(int * StackPos, x86FpuValues Reg)
void CX86Ops::fpuLoadReg(int32_t * StackPos, x86FpuValues Reg)
{
CodeLog(" fld ST(0), %s", fpu_Name(Reg));
*StackPos = (*StackPos - 1) & 7;
@ -3909,7 +3909,7 @@ void CX86Ops::fpuStoreControl(void *Variable, const char * VariableName)
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuStoreDword(int * StackPos, void *Variable, const char * VariableName, bool pop)
void CX86Ops::fpuStoreDword(int32_t * StackPos, void *Variable, const char * VariableName, bool pop)
{
CodeLog(" fst%s dword ptr [%s]", m_fpupop[pop], VariableName);
@ -3922,7 +3922,7 @@ void CX86Ops::fpuStoreDword(int * StackPos, void *Variable, const char * Variabl
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop)
void CX86Ops::fpuStoreDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
{
uint8_t Command = 0;
@ -3950,7 +3950,7 @@ void CX86Ops::fpuStoreDwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop)
AddCode8(pop ? (Command + 0x8) : Command);
}
void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos, x86Reg x86reg, bool Pop)
void CX86Ops::fpuStoreDwordToN64Mem(int32_t * StackPos, x86Reg x86reg, bool Pop)
{
int s = Pop ? 0x0800 : 0;
@ -3977,7 +3977,7 @@ void CX86Ops::fpuStoreDwordToN64Mem(int * StackPos, x86Reg x86reg, bool Pop)
AddCode32((uint32_t)g_MMU->Rdram());
}
void CX86Ops::fpuStoreIntegerDword(int * StackPos, void *Variable, const char * VariableName, bool pop)
void CX86Ops::fpuStoreIntegerDword(int32_t * StackPos, void *Variable, const char * VariableName, bool pop)
{
CodeLog(" fist%s dword ptr [%s]", m_fpupop[pop], VariableName);
@ -3989,7 +3989,7 @@ void CX86Ops::fpuStoreIntegerDword(int * StackPos, void *Variable, const char *
AddCode32((uint32_t)Variable);
}
void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop)
void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
{
uint8_t Command = 0;
@ -4017,7 +4017,7 @@ void CX86Ops::fpuStoreIntegerDwordFromX86Reg(int * StackPos, x86Reg x86reg, bool
AddCode8(pop ? (Command + 0x8) : Command);
}
void CX86Ops::fpuStoreIntegerQword(int * StackPos, void *Variable, const char * VariableName, bool pop)
void CX86Ops::fpuStoreIntegerQword(int32_t * StackPos, void *Variable, const char * VariableName, bool pop)
{
CodeLog(" fist%s qword ptr [%s]", m_fpupop[pop], VariableName);
@ -4035,7 +4035,7 @@ void CX86Ops::fpuStoreIntegerQword(int * StackPos, void *Variable, const char *
}
}
void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop)
void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
{
uint8_t Command = 0;
@ -4062,7 +4062,7 @@ void CX86Ops::fpuStoreIntegerQwordFromX86Reg(int * StackPos, x86Reg x86reg, bool
AddCode8(pop ? (Command + 0x8) : Command);
}
void CX86Ops::fpuStoreQwordFromX86Reg(int * StackPos, x86Reg x86reg, bool pop)
void CX86Ops::fpuStoreQwordFromX86Reg(int32_t * StackPos, x86Reg x86reg, bool pop)
{
uint8_t Command = 0;

4
Source/Project64-core/N64System/Recompiler/x86/x86ops.h
View File

@ -286,13 +286,15 @@ public:
static bool Is8BitReg(x86Reg Reg);
static uint8_t CalcMultiplyCode(Multipler Multiply);
static void * GetAddressOf(int32_t value, ...);
void * GetAddressOf(int32_t value, ...);
void SetJump32(uint32_t * Loc, uint32_t * JumpLoc);
void SetJump8(uint8_t * Loc, uint8_t * JumpLoc);
private:
CX86Ops(void);
CX86Ops(const CX86Ops&);
CX86Ops& operator=(const CX86Ops&);
void CodeLog(_Printf_format_string_ const char * Text, ...);

2
Source/Project64-core/Project64-core.vcxproj
View File

@ -96,11 +96,11 @@
<ClCompile Include="N64System\Recompiler\ExitInfo.cpp" />
<ClCompile Include="N64System\Recompiler\FunctionInfo.cpp" />
<ClCompile Include="N64System\Recompiler\FunctionMap.cpp" />
<ClCompile Include="N64System\Recompiler\JumpInfo.cpp" />
<ClCompile Include="N64System\Recompiler\LoopAnalysis.cpp" />
<ClCompile Include="N64System\Recompiler\Recompiler.cpp" />
<ClCompile Include="N64System\Recompiler\RecompilerMemory.cpp" />
<ClCompile Include="N64System\Recompiler\RegBase.cpp" />
<ClCompile Include="N64System\Recompiler\SectionInfo.cpp" />
<ClCompile Include="N64System\Recompiler\x86\x86ops.cpp" />
<ClCompile Include="N64System\Recompiler\x86\x86RecompilerOps.cpp" />
<ClCompile Include="N64System\Recompiler\x86\x86RegInfo.cpp" />

6
Source/Project64-core/Project64-core.vcxproj.filters
View File

@ -249,9 +249,6 @@
<ClCompile Include="N64System\Recompiler\RecompilerMemory.cpp">
<Filter>Source Files\N64 System\Recompiler</Filter>
</ClCompile>
<ClCompile Include="N64System\Recompiler\SectionInfo.cpp">
<Filter>Source Files\N64 System\Recompiler</Filter>
</ClCompile>
<ClCompile Include="N64System\Mips\MemoryVirtualMem.cpp">
<Filter>Source Files\N64 System\Mips</Filter>
</ClCompile>
@ -408,6 +405,9 @@
<ClCompile Include="N64System\Recompiler\ExitInfo.cpp">
<Filter>Source Files\N64 System\Recompiler</Filter>
</ClCompile>
<ClCompile Include="N64System\Recompiler\JumpInfo.cpp">
<Filter>Source Files\N64 System\Recompiler</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="stdafx.h">