Core: allow CompileStoreMemoryValue to generate address
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068fad47e5
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17a7f31bc2
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@ -3584,9 +3584,7 @@ void CX86RecompilerOps::SB()
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ValueReg = Map_TempReg(x86_Any8Bit, m_Opcode.rt, false);
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}
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}
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x86Reg AddressReg = BaseOffsetAddress(false);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint8, "x86TestWriteBreakpoint8");
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CompileStoreMemoryValue(AddressReg, ValueReg, x86_Unknown, GetMipsRegLo(m_Opcode.rt), 8);
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CompileStoreMemoryValue(x86_Unknown, ValueReg, x86_Unknown, GetMipsRegLo(m_Opcode.rt), 8);
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}
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void CX86RecompilerOps::SH()
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@ -3626,9 +3624,7 @@ void CX86RecompilerOps::SH()
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}
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ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(x86_Any, m_Opcode.rt, false) : GetMipsRegMapLo(m_Opcode.rt);
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}
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x86Reg AddressReg = BaseOffsetAddress(false);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint16, "x86TestWriteBreakpoint16");
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CompileStoreMemoryValue(AddressReg, ValueReg, x86_Unknown, GetMipsRegLo(m_Opcode.rt), 16);
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CompileStoreMemoryValue(x86_Unknown, ValueReg, x86_Unknown, GetMipsRegLo(m_Opcode.rt), 16);
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}
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void CX86RecompilerOps::SWL()
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@ -3787,9 +3783,7 @@ void CX86RecompilerOps::SW(bool bCheckLLbit)
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}
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ValueReg = IsUnknown(m_Opcode.rt) ? Map_TempReg(x86_Any, m_Opcode.rt, false) : GetMipsRegMapLo(m_Opcode.rt);
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}
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x86Reg AddressReg = BaseOffsetAddress(true);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
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CompileStoreMemoryValue(AddressReg, ValueReg, x86_Unknown, GetMipsRegLo(m_Opcode.rt), 32);
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CompileStoreMemoryValue(x86_Unknown, ValueReg, x86_Unknown, GetMipsRegLo(m_Opcode.rt), 32);
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if (bCheckLLbit)
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{
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CPU_Message(" ");
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@ -3916,8 +3910,6 @@ void CX86RecompilerOps::LL()
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void CX86RecompilerOps::LWC1()
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{
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char Name[50];
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CompileCop1Test();
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if ((m_Opcode.ft & 1) != 0)
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{
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@ -3946,8 +3938,7 @@ void CX86RecompilerOps::LWC1()
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LW_KnownAddress(TempReg1, Address);
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x86Reg TempReg2 = Map_TempReg(x86_Any, -1, false);
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sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg2);
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str(), TempReg2);
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MoveX86regToX86Pointer(TempReg1, TempReg2);
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return;
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}
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@ -3972,8 +3963,7 @@ void CX86RecompilerOps::LWC1()
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SetJump8(JumpFound, *g_RecompPos);
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MoveX86regPointerToX86reg(AddrReg, TempReg2, TempReg3);
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sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg2);
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str(), TempReg2);
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MoveX86regToX86Pointer(TempReg3, TempReg2);
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}
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@ -4104,8 +4094,6 @@ void CX86RecompilerOps::SC()
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void CX86RecompilerOps::SWC1()
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{
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char Name[50];
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CompileCop1Test();
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if (IsConst(m_Opcode.base))
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@ -4119,9 +4107,7 @@ void CX86RecompilerOps::SWC1()
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UnMap_FPR(m_Opcode.ft, true);
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x86Reg TempReg1 = Map_TempReg(x86_Any, -1, false);
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sprintf(Name, "_FPR_S[%d]", m_Opcode.ft);
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], Name, TempReg1);
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str(), TempReg1);
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MoveX86PointerToX86reg(TempReg1, TempReg1);
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SW_Register(TempReg1, Address);
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return;
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@ -4132,9 +4118,7 @@ void CX86RecompilerOps::SWC1()
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MoveVariableToX86reg(&_FPR_S[m_Opcode.ft], stdstr_f("_FPR_S[%d]", m_Opcode.ft).c_str() , ValueReg);
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MoveX86PointerToX86reg(ValueReg, ValueReg);
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x86Reg AddressReg = BaseOffsetAddress(false);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint64, "x86TestWriteBreakpoint32");
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CompileStoreMemoryValue(AddressReg, ValueReg, x86_Unknown, 0, 32);
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CompileStoreMemoryValue(x86_Unknown, ValueReg, x86_Unknown, 0, 32);
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}
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void CX86RecompilerOps::SDC1()
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@ -9813,6 +9797,33 @@ CX86Ops::x86Reg CX86RecompilerOps::BaseOffsetAddress(bool UseBaseRegister)
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void CX86RecompilerOps::CompileStoreMemoryValue(CX86Ops::x86Reg AddressReg, CX86Ops::x86Reg ValueReg, CX86Ops::x86Reg ValueRegHi, uint64_t Value, uint8_t ValueSize)
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{
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if (AddressReg == x86_Unknown)
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{
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if (ValueSize == 8)
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{
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AddressReg = BaseOffsetAddress(false);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint8, "x86TestWriteBreakpoint8");
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}
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else if (ValueSize == 16)
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{
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AddressReg = BaseOffsetAddress(false);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint16, "x86TestWriteBreakpoint16");
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}
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else if (ValueSize == 32)
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{
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AddressReg = BaseOffsetAddress(true);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint32, "x86TestWriteBreakpoint32");
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}
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else if (ValueSize == 64)
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{
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AddressReg = BaseOffsetAddress(false);
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TestWriteBreakpoint(AddressReg, (void *)x86TestWriteBreakpoint64, "x86TestWriteBreakpoint64");
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}
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else
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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x86Reg TempReg = Map_TempReg(x86_Any, -1, false);
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MoveX86RegToX86Reg(AddressReg, TempReg);
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ShiftRightUnsignImmed(TempReg, 12);
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