Core: Fix R4300iOp::LWC1 to have 64bit address
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@ -1260,7 +1260,7 @@ void R4300iOp::LL()
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void R4300iOp::LWC1()
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{
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TEST_COP1_USABLE_EXCEPTION();
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uint32_t Address = _GPR[m_Opcode.base].UW[0] + (uint32_t)((int16_t)m_Opcode.offset);
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uint64_t Address = _GPR[m_Opcode.base].DW + (int16_t)m_Opcode.offset;
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g_MMU->LW_Memory(Address, *(uint32_t *)_FPR_S[m_Opcode.ft]);
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}
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