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Core: Fix the dma write length

This commit is contained in:
zilmar 2022-04-27 09:20:33 +09:30
parent 2f1074a287
commit 4f07f52fed
1 changed files with 33 additions and 22 deletions
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55
Source/Project64-core/N64System/MemoryHandler/CartridgeDomain2Address2Handler.cpp
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@ -13,16 +13,17 @@ CartridgeDomain2Address2Handler::CartridgeDomain2Address2Handler(CN64System & Sy
bool CartridgeDomain2Address2Handler::Read32(uint32_t Address, uint32_t & Value)
{
if (m_System.m_SaveUsing == SaveChip_Auto)
{
m_System.m_SaveUsing = SaveChip_FlashRam;
}
uint32_t offset = (Address & 0x1FFFFFFF) - 0x08000000;
if (offset > 0x88000)
{
Value = ((offset & 0xFFFF) << 16) | (offset & 0xFFFF);
return true;
}
if (m_System.m_SaveUsing == SaveChip_Auto)
{
m_System.m_SaveUsing = SaveChip_FlashRam;
}
if (m_System.m_SaveUsing == SaveChip_Sram)
{
// Load SRAM
@ -30,7 +31,11 @@ bool CartridgeDomain2Address2Handler::Read32(uint32_t Address, uint32_t & Value)
m_Sram.DmaFromSram(tmp, offset, 4);
Value = tmp[3] << 24 | tmp[2] << 16 | tmp[1] << 8 | tmp[0];
}
else if (m_System.m_SaveUsing != SaveChip_FlashRam)
else if (m_System.m_SaveUsing == SaveChip_FlashRam)
{
Value = m_FlashRam.ReadFromFlashStatus(Address & 0x1FFFFFFF);
}
else
{
if (HaveDebugger())
{
@ -38,16 +43,21 @@ bool CartridgeDomain2Address2Handler::Read32(uint32_t Address, uint32_t & Value)
}
Value = ((Address & 0xFFFF) << 16) | (Address & 0xFFFF);
}
else
{
Value = m_FlashRam.ReadFromFlashStatus(Address & 0x1FFFFFFF);
}
return true;
}
bool CartridgeDomain2Address2Handler::Write32(uint32_t Address, uint32_t Value, uint32_t /*Mask*/)
{
if (m_System.m_SaveUsing == SaveChip_Auto)
{
m_System.m_SaveUsing = SaveChip_FlashRam;
}
uint32_t offset = (Address & 0x1FFFFFFF) - 0x08000000;
if (offset > 0x10000)
{
return true;
}
if (m_System.m_SaveUsing == SaveChip_Sram && offset < 0x88000)
{
// Store SRAM
@ -59,15 +69,7 @@ bool CartridgeDomain2Address2Handler::Write32(uint32_t Address, uint32_t Value,
m_Sram.DmaToSram(tmp, (Address & 0x1FFFFFFF) - 0x08000000, 4);
return true;
}
if (offset > 0x10000)
{
return true;
}
if (m_System.m_SaveUsing == SaveChip_Auto)
{
m_System.m_SaveUsing = SaveChip_FlashRam;
}
if (m_System.m_SaveUsing == SaveChip_FlashRam)
else if (m_System.m_SaveUsing == SaveChip_FlashRam)
{
m_FlashRam.WriteToFlashCommand(Value);
}
@ -76,13 +78,20 @@ bool CartridgeDomain2Address2Handler::Write32(uint32_t Address, uint32_t Value,
bool CartridgeDomain2Address2Handler::DMARead()
{
uint32_t PI_RD_LEN_REG = ((m_Reg.PI_RD_LEN_REG) & 0x00FFFFFFul) + 1;
if ((PI_RD_LEN_REG & 1) != 0)
{
PI_RD_LEN_REG += 1;
}
if (m_System.m_SaveUsing == SaveChip_Auto)
{
m_System.m_SaveUsing = SaveChip_Sram;
}
if (m_System.m_SaveUsing == SaveChip_Sram)
{
m_Sram.DmaToSram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG,m_Reg.PI_CART_ADDR_REG - 0x08000000, m_Reg.PI_RD_LEN_REG);
m_Sram.DmaToSram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG,m_Reg.PI_CART_ADDR_REG - 0x08000000, PI_RD_LEN_REG);
m_Reg.PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
m_Reg.MI_INTR_REG |= MI_INTR_PI;
m_Reg.CheckInterrupts();
@ -90,7 +99,7 @@ bool CartridgeDomain2Address2Handler::DMARead()
}
else if (m_System.m_SaveUsing == SaveChip_FlashRam)
{
m_FlashRam.DmaToFlashram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG, m_Reg.PI_CART_ADDR_REG - 0x08000000, m_Reg.PI_RD_LEN_REG);
m_FlashRam.DmaToFlashram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG, m_Reg.PI_CART_ADDR_REG - 0x08000000, PI_RD_LEN_REG);
m_Reg.PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
m_Reg.MI_INTR_REG |= MI_INTR_PI;
m_Reg.CheckInterrupts();
@ -101,20 +110,22 @@ bool CartridgeDomain2Address2Handler::DMARead()
void CartridgeDomain2Address2Handler::DMAWrite()
{
uint32_t PI_WR_LEN_REG = ((m_Reg.PI_WR_LEN_REG) & 0x00FFFFFEul) + 2;
if (m_System.m_SaveUsing == SaveChip_Auto)
{
m_System.m_SaveUsing = SaveChip_Sram;
}
if (m_System.m_SaveUsing == SaveChip_Sram)
{
m_Sram.DmaFromSram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG, m_Reg.PI_CART_ADDR_REG - 0x08000000, m_Reg.PI_WR_LEN_REG);
m_Sram.DmaFromSram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG, m_Reg.PI_CART_ADDR_REG - 0x08000000, PI_WR_LEN_REG);
m_Reg.PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
m_Reg.MI_INTR_REG |= MI_INTR_PI;
m_Reg.CheckInterrupts();
}
else if (m_System.m_SaveUsing == SaveChip_FlashRam)
{
m_FlashRam.DmaFromFlashram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG, m_Reg.PI_CART_ADDR_REG - 0x08000000, m_Reg.PI_WR_LEN_REG);
m_FlashRam.DmaFromFlashram(m_MMU.Rdram() + m_Reg.PI_DRAM_ADDR_REG, m_Reg.PI_CART_ADDR_REG - 0x08000000, PI_WR_LEN_REG);
m_Reg.PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY;
m_Reg.MI_INTR_REG |= MI_INTR_PI;
m_Reg.CheckInterrupts();