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3.0.1-5664-2df3434
AndroidRelease7
Project64-3.0.0-5632-f83bee9
v2.2
v2.3
v2.3.1
v2.3.2
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3.0.1-5664-2df3434
AndroidRelease7
Project64-3.0.0-5632-f83bee9
v2.2
v2.3
v2.3.1
v2.3.2
-
caf8420dfa
f16e31970b
into7e74b98d5b
Derek "Turtle" Roe2024-12-22 14:42:02 +1030 -
f16e31970b
Upgrade from Duktape 2.6.0 to 2.7.0 which fixes several bugs and increases portability
Derek "Turtle" Roe
2024-12-21 22:05:14 -0600 -
4b2e0d5aaa
fb1b8c07ec
into7e74b98d5b
Fanatic-642024-12-21 04:05:16 -0600 -
fb1b8c07ec
Upgrade zlib to version 1.3.1
Fanatic-64
2024-12-21 10:02:00 +0000 -
85919e76d4
4d74330673
into7e74b98d5b
Julio César Rocha2024-12-19 10:47:25 -0800 -
7e74b98d5b
Core: Fix up labels in CX86RecompilerOps::COP1_S_CVT
develop
zilmar
2024-12-19 21:59:42 +1030 -
57f278416e
core: better handling of fpu registers with COP1_S_Opcode
zilmar
2024-12-19 19:09:31 +1030 -
13a974e687
Core: in CX86RecompilerOps::COP1_CT ignore write to other registers
zilmar
2024-12-19 09:58:30 +1030 -
fba1c4bc3b
Core: Fix up bug in CX86RecompilerOps::SPECIAL_AND
zilmar
2024-12-19 09:57:25 +1030 -
8a09fd33bc
ef30fc7fb8
into473aeba2cf
CEnnis912024-12-17 01:53:09 +0000 -
1cde619b46
ada6800c67
into473aeba2cf
oddMLan2024-12-14 12:11:27 -0500 -
351cf00654
5c2c1f9185
into473aeba2cf
greenshark642024-12-13 12:07:55 +0530 -
0acd80f807
feb39db90c
into473aeba2cf
Denis Kopyrin2024-12-12 17:13:16 -0300 -
473aeba2cf
Core: Fix order of value in call to CMipsMemoryVM::SD_VAddr32 in recompiler
zilmar
2024-12-12 21:22:32 +1030 -
5d64b3d920
Core: Better handling of Storing non 32bit values to non memory
zilmar
2024-12-12 16:50:36 +1030 -
b8ee9f8728
RSP: Add #include <intrin.h> to RSPInfo.cpp for 64bit
zilmar
2024-12-12 14:17:07 +1030 -
3164caf2d0
Core: allow Store/load ops be forced to 32bit version
zilmar
2024-12-08 11:15:39 +1030 -
5a5ea92f3f
fix resource issues
zilmar
2024-12-07 08:52:01 +1030 -
b9fe8e3657
Fix compile issues
zilmar
2024-12-07 07:04:22 +1030 -
8392ea5c0f
Core fix up load states
zilmar
2024-12-06 21:50:31 +1030 -
a045a4fcd4
Core: fix accidental changes to UIResources.rc
zilmar
2024-12-06 11:37:42 +1030 -
c6b41da926
Add Overclock modifier to Defaults panel
zilmar
2024-12-05 17:30:59 +1030 -
77cd679756
Core: Fix a bug in CX86RecompilerOps::SPECIAL_DIV
zilmar
2024-12-05 17:05:52 +1030 -
fc1210aac5
Core: Do not allow CX86RecompilerOps::SPECIAL_DSRL32 and CX86RecompilerOps::SPECIAL_DSRA32 to write to R0
zilmar
2024-12-05 11:25:20 +1030 -
1e4ab04121
Core: Fix up CX86RecompilerOps::SPECIAL_DSUB when rd == rt
zilmar
2024-12-05 11:06:42 +1030 -
04c1c3d024
Core: Fix up CX86RecompilerOps::SPECIAL_DADD
zilmar
2024-12-05 10:03:45 +1030 -
59108268d1
664fe532f4
into4366703f28
Summate2024-11-29 01:19:00 -0600 -
20046ae523
84308ef54f
into4366703f28
oddMLan2024-11-29 01:17:44 -0600 -
4366703f28
Try to fix appveyor.yml
zilmar
2024-11-28 16:56:04 +1030 -
1f3ef6d505
Core: CX86RecompilerOps::SPECIAL_NOR Ignore write to r0
zilmar
2024-11-28 15:54:36 +1030 -
95015302d6
Core: Have CX86RecompilerOps::SPECIAL_XOR treat R0 as 64bit constant
zilmar
2024-11-28 15:38:54 +1030 -
a3c777ed84
Core: Have CX86RecompilerOps::SPECIAL_AND unmap the register on const write
zilmar
2024-11-28 15:14:26 +1030 -
0de0bea07a
Core: Ignore write in CX86RecompilerOps::SPECIAL_OR
zilmar
2024-11-28 12:37:42 +1030 -
8d69671e93
Core: CX86RecompilerOps::ADDIU should not ignore when not 32bit mapped
zilmar
2024-11-28 12:29:35 +1030 -
52d904702f
Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct
zilmar
2024-11-28 11:39:41 +1030 -
d5367d9291
Core: Better handling of SW with address not sign extended
zilmar
2024-11-28 11:02:38 +1030 -
46f60cc991
b966b088e5
into2ec9ed08a4
gabjc2024-11-25 21:00:16 +0000 -
31c06d5ba3
5cd9a941e1
into2ec9ed08a4
Squall Leonhart2024-11-25 20:59:59 +0000 -
fd05d9f42f
core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt
zilmar
2024-11-21 21:33:42 +1030 -
315d5b9e66
Core: When running as recompiler in 32bit mode, if LW/SW are in delay slots on block boundaries use 32bit interpter functions
zilmar
2024-11-21 19:13:56 +1030 -
5e1a40fffb
Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1
zilmar
2024-11-21 11:10:01 +1030 -
48b3e5a9a2
Core: Zip load in CN64System::LoadState uses utf16 path
zilmar
2024-11-21 10:48:16 +1030 -
58a13b8e28
Core: Get Zip files to use utf16 paths
zilmar
2024-11-21 10:43:56 +1030 -
2ec9ed08a4
Core: Improve LW with address not sign extended test in recompiler
zilmar
2024-11-14 17:02:18 +1030 -
944dd0917a
Core: Fix up logging id for label symbols
zilmar
2024-11-14 09:31:45 +1030 -
61aa53f1a5
Core: In jump ops, Only add label symbol if logging
zilmar
2024-11-14 07:30:39 +1030 -
feb39db90c
Core: Fixed race condition deadlock in Enhancements
aglab2
2024-11-07 21:46:05 +0800 -
97b2579b4b
Core: Have the recompiler just deal with the Program Counter as 32bit
zilmar
2024-11-07 17:05:16 +1030 -
f63244cfa4
Core: Handle duplicate symbols in AddLabelSymbol
zilmar
2024-11-07 13:37:10 +1030 -
72e6ee1a2b
Core: Normalize RomDatabase, VideoRDB, AudioRdb file paths
zilmar
2024-11-07 13:24:45 +1030 -
e419508c2b
Core: On ExitReason_CheckPCAlignment make sure CompileSystemCheck is called
zilmar
2024-11-07 12:13:28 +1030 -
a46ac9f38d
Core: in CX86Ops::_log better handle label symbols
zilmar
2024-11-07 12:12:44 +1030 -
d06212e766
Core: CX86RecompilerOps::JAL stop double call to UpdateCounters
zilmar
2024-11-07 11:05:55 +1030 -
bfd181f33e
Core: Fix up recompiler log including 0x in number symbols
zilmar
2024-11-07 09:22:56 +1030 -
f3a3d56c13
Gliden64: Fix up x64 build with including UI
zilmar
2024-10-31 08:12:52 +1030 -
246934c0ab
Core: Fix up default x64/Release config file
zilmar
2024-10-31 07:06:00 +1030 -
24d5a6bd65
Core: fix up clang formatting
zilmar
2024-10-31 07:01:32 +1030 -
905254615d
Core: Change the handling of symbols inside asmjit usage
zilmar
2024-10-31 06:50:17 +1030 -
17c501fa08
Core: clean up some code related to CompileStoreMemoryValue, like the exit method being an exception
zilmar
2024-10-24 13:32:02 +1030 -
a8c8e751fc
Core: log the block code to the asm log file
zilmar
2024-10-24 12:11:15 +1030 -
885d31f275
Core: Update Map_MemoryStack to pass gp by reference
zilmar
2024-10-24 12:01:14 +1030 -
440894992a
Core: remove the BreakPoint in handling ExitReason_CheckPCAlignment
zilmar
2024-10-24 11:58:53 +1030 -
65ede5e3e8
Core: If jumping to an unaligned address then generate an exception
zilmar
2024-10-24 10:31:48 +1030 -
4a42466559
Core: In compiling a block be able to trace the time to compile
zilmar
2024-10-24 10:04:45 +1030 -
5750d3df80
Core: Have only one function to do what R4300iOp::ExecuteOps and R4300iOp::ExecuteCPU was doing
zilmar
2024-10-24 09:59:41 +1030 -
c39582b9ed
Core: Make sure CX86RecompilerOps::SPECIAL_AND can not write to R0
zilmar
2024-10-17 18:42:45 +1030 -
a38467cc19
Core: Reset Memory Stack Pos In recompiler after running interpter code at non rdram location
zilmar
2024-10-17 18:40:37 +1030 -
f708e5c0b2
Core: Check recompiler memory based on the function size
zilmar
2024-10-17 15:05:48 +1030 -
45e52e1d2a
Core: in SPECIAL_SYSCALL, SPECIAL_BREAK only exit the block is the stage is PIPELINE_STAGE_NORMAL
zilmar
2024-10-17 14:12:46 +1030 -
ccf708751f
Core: Fix up clang error
zilmar
2024-10-11 07:09:03 +1030 -
0d95a0cd7f
2024-10-10 18:34:31 +1100 -
a2e479a705
Core: Handle paths with non-ASCII characters
zilmar
2024-10-10 18:01:10 +1030 -
7aa77a3840
Merge branch 'develop' of https://github.com/project64/project64 into develop
zilmar
2024-10-10 18:00:12 +1030 -
c176f61aac
Core: Normalize Plugin dir
zilmar
2024-10-10 10:12:53 +1030 -
dcf537a84e
2024-10-09 19:13:04 +1100 -
fc23fca43e
2024-10-03 22:50:51 +1000 -
3f915bf3c2
2024-10-03 22:21:57 +1000 -
edc54c425f
2024-10-03 08:10:53 -0400 -
30090e5db7
Core: in CX86Ops::CX86Ops set setLogger to nullptr if not logging
zilmar
2024-10-03 16:22:42 +0930 -
9e53b161a4
Cote Update PeripheralInterfaceHandler::PI_DMA_WRITE to handle misaligned, end of page test
zilmar
2024-10-03 14:38:04 +0930 -
eddd58d81d
2024-09-30 10:30:54 -0400 -
da6703fa15
Fix spelling and clarity issues in CONTRIBUTING.md
Tomas Mejia
2024-09-29 21:16:29 -0400 -
08e1b3b39b
fix up clang formatting
zilmar
2024-09-26 18:54:54 +0930 -
62bf10e505
Core: Have fpu ops check the input of fs and ft at the same time
zilmar
2024-09-26 16:38:25 +0930 -
dc4fa211b0
Core: Clean up RDRAM/RI Registers
zilmar
2024-09-26 12:59:32 +0930 -
544d6ba1b9
Core: Normalize Path for RomList_RomListCache
zilmar
2024-09-26 07:30:26 +0930 -
cd9fc5984a
RSP: Make sure m_SyncSystem is valid before checking m_SyncSystem->m_BaseSystem on shutdown
zilmar
2024-09-26 06:50:48 +0930 -
7cb0c258a1
GLideN64: Slight clean up of project file
zilmar
2024-09-19 12:16:46 +0930 -
c098a6a464
RSP: Be able to compile sections based off tasks
zilmar
2024-09-19 12:15:11 +0930 -
3340c032c3
RSP: Move CompilePC into RspRecompilerCPU
zilmar
2024-09-19 08:31:28 +0930 -
df9b04bb5b
RSP: Change RunInterpreterCPU to ExecuteOps
zilmar
2024-09-12 15:13:45 +0930 -
07e8f8b830
Gliden64: Get the new GlideN64 submodule to build as part of the normal build process
zilmar
2024-09-12 09:44:38 +0930 -
02e816b9d4
Update package_zip.cmd to deal with platform in path
zilmar
2024-09-05 19:22:25 +0930 -
ea199c5546
Update installer to have new binary path
zilmar
2024-09-05 18:50:47 +0930 -
aaa6fc8082
Core: Add $(Platform) to the output directory
zilmar
2024-09-05 17:54:58 +0930 -
00a92871c0
Gliden64: Add as a submodule
zilmar
2024-09-05 11:17:26 +0930 -
9888e5ef09
a1c465baaf
intoeb985de132
Daniel Simpkins2024-08-31 06:24:00 +0800 -
eb985de132
RSP: Start to add CPU style HLE
zilmar
2024-08-29 15:37:52 +0930 -
5eac210197
RSP: Start to have a RSP Settings class
zilmar
2024-08-29 11:26:53 +0930 -
96080bfdd2
RSP: change CRSPSystem::m_Recompiler from a pointer to a member and initialize it at creation of system
zilmar
2024-08-29 07:49:40 +0930