Core: Move OpHasDelaySlot into R4300iInstruction

This commit is contained in:
zilmar 2022-07-25 14:23:12 +09:30
parent 15466b6a9b
commit 0abc7ccaa4
4 changed files with 49 additions and 46 deletions

View File

@ -33,6 +33,50 @@ std::string R4300iInstruction::NameAndParam()
return stdstr_f("%s %s", Name(), Param());
}
bool R4300iInstruction::HasDelaySlot(void) const
{
if (m_Instruction.op == R4300i_J ||
m_Instruction.op == R4300i_JAL ||
m_Instruction.op == R4300i_BEQ ||
m_Instruction.op == R4300i_BNE ||
m_Instruction.op == R4300i_BLEZ ||
m_Instruction.op == R4300i_BGTZ ||
m_Instruction.op == R4300i_BEQL ||
m_Instruction.op == R4300i_BNEL ||
m_Instruction.op == R4300i_BLEZL ||
m_Instruction.op == R4300i_BGTZL)
{
return true;
}
else if (m_Instruction.op == R4300i_SPECIAL)
{
if (m_Instruction.funct == R4300i_SPECIAL_JR ||
m_Instruction.funct == R4300i_SPECIAL_JALR)
{
return true;
}
}
else if (m_Instruction.op == R4300i_REGIMM)
{
if (m_Instruction.rt == R4300i_REGIMM_BLTZ ||
m_Instruction.rt == R4300i_REGIMM_BGEZ ||
m_Instruction.rt == R4300i_REGIMM_BLTZL ||
m_Instruction.rt == R4300i_REGIMM_BGEZL ||
m_Instruction.rt == R4300i_REGIMM_BLTZAL ||
m_Instruction.rt == R4300i_REGIMM_BGEZAL ||
m_Instruction.rt == R4300i_REGIMM_BLTZALL ||
m_Instruction.rt == R4300i_REGIMM_BGEZALL)
{
return true;
}
}
else if (m_Instruction.op == R4300i_CP1 && m_Instruction.fmt == R4300i_COP1_BC)
{
return true;
}
return false;
}
const char * R4300iInstruction::FPR_Type(uint32_t COP1OpCode)
{
if (COP1OpCode == R4300i_COP1_S) { return "S"; };

View File

@ -11,6 +11,8 @@ public:
const char * Param();
std::string NameAndParam();
bool HasDelaySlot(void) const;
private:
R4300iInstruction(void);
R4300iInstruction(const R4300iInstruction&);

View File

@ -5886,7 +5886,6 @@ PIPELINE_STAGE CArmRecompilerOps::GetNextStepType(void)
const R4300iOpcode &CArmRecompilerOps::GetOpcode(void) const
{
return m_Opcode;
g_Notify->BreakPoint(__FILE__, __LINE__);
}
void CArmRecompilerOps::UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles)

View File

@ -1,6 +1,7 @@
#include "stdafx.h"
#include <Project64-core/N64System/Recompiler/CodeSection.h>
#include <Project64-core/N64System/Mips/R4300iOpcode.h>
#include <Project64-core/N64System/Mips/R4300iInstruction.h>
#include <Project64-core/N64System/SystemGlobals.h>
#include <Project64-core/N64System/Mips/MemoryVirtualMem.h>
#include <Project64-core/N64System/Recompiler/RecompilerCodeLog.h>
@ -16,50 +17,6 @@ void InPermLoop();
bool DelaySlotEffectsCompare(uint32_t PC, uint32_t Reg1, uint32_t Reg2);
static bool OpHasDelaySlot(const R4300iOpcode & Opcode)
{
if (Opcode.op == R4300i_J ||
Opcode.op == R4300i_JAL ||
Opcode.op == R4300i_BEQ ||
Opcode.op == R4300i_BNE ||
Opcode.op == R4300i_BLEZ ||
Opcode.op == R4300i_BGTZ ||
Opcode.op == R4300i_BEQL ||
Opcode.op == R4300i_BNEL ||
Opcode.op == R4300i_BLEZL ||
Opcode.op == R4300i_BGTZL)
{
return true;
}
else if (Opcode.op == R4300i_SPECIAL)
{
if (Opcode.funct == R4300i_SPECIAL_JR ||
Opcode.funct == R4300i_SPECIAL_JALR)
{
return true;
}
}
else if (Opcode.op == R4300i_REGIMM)
{
if (Opcode.rt == R4300i_REGIMM_BLTZ ||
Opcode.rt == R4300i_REGIMM_BGEZ ||
Opcode.rt == R4300i_REGIMM_BLTZL ||
Opcode.rt == R4300i_REGIMM_BGEZL ||
Opcode.rt == R4300i_REGIMM_BLTZAL ||
Opcode.rt == R4300i_REGIMM_BGEZAL ||
Opcode.rt == R4300i_REGIMM_BLTZALL ||
Opcode.rt == R4300i_REGIMM_BGEZALL)
{
return true;
}
}
else if (Opcode.op == R4300i_CP1 && Opcode.fmt == R4300i_COP1_BC)
{
return true;
}
return false;
}
static bool DelaySlotEffectsJump(uint32_t JumpPC)
{
R4300iOpcode Command;
@ -438,6 +395,7 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
uint32_t ContinueSectionPC = m_ContinueSection ? m_ContinueSection->m_EnterPC : (uint32_t)-1;
const R4300iOpcode & Opcode = m_RecompilerOps->GetOpcode();
R4300iInstruction Instruction(m_RecompilerOps->GetCurrentPC(), Opcode.Value);
do
{
if (m_RecompilerOps->GetCurrentPC() > m_BlockInfo->VAddrLast())
@ -445,7 +403,7 @@ bool CCodeSection::GenerateNativeCode(uint32_t Test)
m_BlockInfo->SetVAddrLast(m_RecompilerOps->GetCurrentPC());
}
if (isDebugging() && HaveExecutionBP() && OpHasDelaySlot(Opcode) && g_Debugger->ExecutionBP(m_RecompilerOps->GetCurrentPC() + 4))
if (isDebugging() && HaveExecutionBP() && Instruction.HasDelaySlot() && g_Debugger->ExecutionBP(m_RecompilerOps->GetCurrentPC() + 4))
{
m_RecompilerOps->CompileExecuteDelaySlotBP();
break;