Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram
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97e3f50007
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@ -1019,11 +1019,17 @@ void CMipsMemoryVM::TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, boo
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for (uint32_t Address = VAddr; Address < VEnd; Address += 0x1000)
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{
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size_t Index = Address >> 12;
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m_MemoryReadMap[Index] = (size_t)((m_RDRAM + (Address - VAddr + PAddr)) - Address);
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if ((Address - VAddr + PAddr) < m_AllocatedRdramSize)
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{
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m_MemoryReadMap[Index] = (size_t)((m_RDRAM + (Address - VAddr + PAddr)) - Address);
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}
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m_TLB_ReadMap[Index] = ((size_t)(Address - VAddr + PAddr)) - Address;
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if (!bReadOnly)
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{
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m_MemoryWriteMap[Index] = (size_t)((m_RDRAM + (Address - VAddr + PAddr)) - Address);
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if ((Address - VAddr + PAddr) < m_AllocatedRdramSize)
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{
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m_MemoryWriteMap[Index] = (size_t)((m_RDRAM + (Address - VAddr + PAddr)) - Address);
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}
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m_TLB_WriteMap[Index] = ((size_t)(Address - VAddr + PAddr)) - Address;
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}
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}
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