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1584 Commits

Author SHA1 Message Date
Ty Lamontagne 15d8b891d6 Core: Replace old include guard with pragma once 2022-06-26 12:42:10 +02:00
lightningterror cf568d2782 iR5900: Cleanup variable scope. 
Codacy.
 2022-06-25 11:20:53 +02:00
lightningterror ba07e46cf8 iR3000A: Cleanup variable scope. 
Codacy.
 2022-06-25 11:20:53 +02:00
lightningterror f19ba1b0db iFPUd: Cleanup variable scope. 
Codacy.
 2022-06-25 11:20:53 +02:00
lightningterror 51887f1cbc BaseBlockEx: Cleanup variable scope. 
Codacy.
 2022-06-25 11:20:53 +02:00
lightningterror b54521de51 iR5900: Cleanup variable scope. 
Codacy.
 2022-06-24 23:32:30 +02:00
lightningterror d7e09167fa iMMI: Cleanup variable scope. 
Codacy.
 2022-06-24 23:32:30 +02:00
lightningterror 26d20e458c iFPU: Cleanup variable scope. 
Codacy.
 2022-06-24 23:32:30 +02:00
Connor McLaughlin aa47018197 Qt: Apply patches on entry point compile 
Fixes WRC4's entrypoint patch not being used.
 2022-05-24 18:00:59 +01:00
Connor McLaughlin ea051c6d5f Everything: Get rid of wx entirely from the Qt build 2022-05-22 13:58:56 +01:00
Connor McLaughlin 893b3c629d Everything: Remove a **lot** of wx, and px nonsense 
- common has no wx left except for Path.
 - pcsx2core only has it in a few places (memory cards and path related
   stuff).
 2022-05-22 13:58:56 +01:00
Connor McLaughlin d535331b4b Misc: Remove __fastcall, __fc, __concall and friends 
These have no meaning in x64 (apart from throwing compiler warnings),
and we don't do 32-bit anymore. Also saves needing to include
`Pcsx2Defs.h` in files which don't otherwise need it.
 2022-05-12 14:58:03 +01:00
Connor McLaughlin d2347d9972 Common/Threading: Replace TLS macros with standard thread_local 2022-05-09 16:06:33 +01:00
Connor McLaughlin f8dcff9fc4 Common: Remove references to pthreads4w 
It's only needed for wx now.
 2022-05-09 16:06:33 +01:00
Connor McLaughlin 756cd1ee47 System: Move old SysThread junk to gui 2022-05-08 05:40:59 +01:00
Connor McLaughlin 599626b709 MTVU: Purge pxThread 2022-05-07 15:43:03 +01:00
Mrlinkwii c86dd7397d microVU : correct logging and remove not needed comments 2022-05-05 23:13:33 +01:00
arcum42@gmail.com d45f34ee8b Remove iMisc.cpp, and move the code to System.cpp/h. 2022-05-01 11:43:14 +01:00
Connor McLaughlin 2634134481 microVU: Remove unused VSync() callback 2022-05-01 11:36:37 +01:00
refractionpcsx2 68c2a68087 microVU: Clean up warnings 2022-04-16 03:20:54 +01:00
kenshen112 fdabc82342 Remove IopCommon.h added proper includes to files. Removing circle includes in several files that sometimes was several layers deep 2022-04-11 21:25:20 +01:00
Connor McLaughlin 3801825793 R3000A/R5900: Refactor interpreter/recompiler exits 
Now, IOP breakpoints work nice and reliably in both interpreter and
recompiler, exiting as soon as possible, without leaving the event state
indeterminate.
 2022-04-06 15:27:15 +01:00
Connor McLaughlin 5ac9419703 R5900: Make CPU exits consistent and safe 
Previously, we would either throw an exception (ints), or longjmp out of
the recompiler when the execution state was checked. Unfortunately for
our stability, this happened at the end of the frame, just before it was
pushed to the GS, and in the middle of processing EE events (!).

Doing so not only meant that we executed a bunch of event
testing/exception code twice (once after we paused, again when we
resumed), but it also could potentially leave things in an inconsistent
state.

So instead, let's do it safely with a flag, replacing the old
iopBreakpoint flag, so there's no additional overhead on the hot path.
 2022-04-06 15:27:15 +01:00
Connor McLaughlin e6c8354ec8 EERec: Purge PCSX2_SEH define 
No longer needed since we don't have 32-bit.
 2022-04-03 07:57:02 +01:00
Connor McLaughlin a1e77002c3 iR5900: Exit on NeedsReset not IsReset 
This is an edge case which can be hit in Goemon, but also when changing
settings in Qt, as they will be applied at guest vsync time, which is
called within the JIT.

Also, do the reset before entering JIT code, rather than when the first
block is compiled.
 2022-04-03 07:57:02 +01:00
lightningterror 0d4394a749 core: Clean up 32bit code. 2022-03-21 20:21:36 +01:00
arcum42@gmail.com 33e0ac729e Core: Remove memcmp_mmx. 2022-03-20 12:54:58 +00:00
Christian Kenny 26561261bc Core: Remove unused code 2022-03-20 04:00:27 +00:00
refractionpcsx2 ccd86a242c EE/VU JIT: Remove 32bit code 2022-03-20 00:39:39 +00:00
refractionpcsx2 fd4a5acc40 MTVU: Try to make T-Bit more reliable. 
Add MTVUSpeedHack option to GameDB so it can be forcefully disabled
 2022-03-11 10:25:15 +00:00
refractionpcsx2 b4e6a715fc EE/JIT: Flush const on LDL/LDR instructions 2022-03-03 16:18:16 +00:00
refractionpcsx2 e833a67bb7 VU: Rework VUKickstart in to VUSync, swap behaviour 2022-02-28 19:29:53 +00:00
refractionpcsx2 6dc5087cbd VU: Run sync ahead on small blocks 2022-02-28 19:29:53 +00:00
Connor McLaughlin 845e7930d7 microVU: Move VU0 micro flag instance setup to program start 
They're only used in micro mode, so no point updating them in a cop2
chain.
 2022-02-28 15:07:15 +00:00
Connor McLaughlin d20bfa240d EE: Add COP2 flag hack 2022-02-28 15:07:15 +00:00
Ty Lamontagne 6ab77be8fc COP2: Move COP2 timing messages to release builds. 2022-02-14 01:52:44 +00:00
C.W. Betts 9b7e87c043 Mark static functions in headers as static inline: 
This quiets unused function warnings (-Wunused-function) which is on by default on Xcode.
 2022-02-07 02:32:56 +00:00
Ty Lamontagne a632f3c5cb Core: Lighten IOP breakpoint load 
standardizeBreakpintAddress calls on the IOP just return the address unmodified. Considering this is called at least once every load / store instruction when there is an IOP OR EE memcheck enabled, it's pretty hot.
 2022-02-04 16:52:27 +00:00
refractionpcsx2 bcade5bb9d mVU: Clean up branch chain handling 2022-01-23 20:31:08 +00:00
refractionpcsx2 59ab303c5c mVU: Rework multiple branch chaining 2022-01-23 20:31:08 +00:00
refractionpcsx2 e5a4f27e79 VU: Adjust path for conditional evil blocks 
Add patch for Pac-man World Rally
 2022-01-22 21:43:45 +00:00
Connor McLaughlin 08ecf3f582 iR5900: Use unsigned math for constant prop of add/sub 
Signed overflow is undefined.
 2022-01-17 20:08:11 +01:00
Connor McLaughlin 252562db90 Misc: #ifdef out last bits of wx-dependent code 2021-12-28 05:22:45 +00:00
Connor McLaughlin 9166218d07 EERec: Remove zero-distance jmp in full fpu mode 2021-12-13 00:56:50 +00:00
refractionpcsx2 0a79892923 microVU: Preserve XGKIck cycles in delay slot 
Also added handling for xgkick sync on single instructions
 2021-11-21 17:18:34 +00:00
TellowKrinkle f7476dfb63 Core: Replace alignment macros with alignas 2021-11-14 13:52:20 -06:00
TellowKrinkle 2351431d71 Misc: Remove custom countof macros in favor of std::size 2021-11-14 13:52:20 -06:00
refractionpcsx2 6a8287ea9f EE JIT: Backup shift on LDR/L if rs==rt 2021-11-03 18:03:09 +00:00
lightningterror 667f98334a iR5900: Fix Wodr warnings. 2021-10-27 01:00:38 +02:00
refractionpcsx2 bfbe86a3d5 COP2: Tighten LQC2/SQC2 sync 
Fixes some small glitches with the R&C games
 2021-10-26 00:05:46 +01:00
refractionpcsx2 24e73b3134
Savestates: Add missing things from Savestates (#4917) 
Savestates: Add missing variables from Savestates
 2021-10-20 10:41:50 +01:00
refractionpcsx2 5011b9ead5 EE: Cyclerate > 1 caused some cycles to be lost 2021-10-19 20:09:07 +01:00
refractionpcsx2 6746578120 VU JIT: Include ADDi in flag calculations 
Fixes #4916
 2021-10-18 12:32:44 +01:00
Connor McLaughlin 44bc273590 microVU: Use uncached reg when clamping for FMAC instructions 2021-10-17 15:54:58 +01:00
TellowKrinkle f22ba886d9 Fix unparenthesized macro input 2021-10-17 04:17:58 +01:00
refractionpcsx2 a96f900760 COP2: Simplify reg allocation 2021-10-14 10:06:13 +01:00
Ziemas 45bb57a38c IOP Recompiler: Fix BIOS trace logging on 64bit 2021-10-13 22:42:51 +02:00
refractionpcsx2 ae1f1599f6 COP2: Fix reg allocation issue 
Really fixes Devil May Cry which was a bug hidden by clamping hidden by a bug, yeah i think that covers it all...
 2021-10-07 23:29:04 +01:00
Connor McLaughlin ca523edf0e Config: Move folders to their own namespace 
Don't duplicate in EmuOptions.
 2021-10-01 23:46:52 -04:00
Connor McLaughlin 4d8905abd6 Config: Swap out wxString for std::string 
Also in CDVD.
 2021-10-01 23:46:52 -04:00
Connor McLaughlin 77a890ff4a Config: Move Folders/BaseFilenames to base config 2021-10-01 23:46:52 -04:00
Connor McLaughlin 8e1470f637 iR5900: Use fastjmp instead of longjmp 2021-10-01 23:30:39 +01:00
Connor McLaughlin 91627b28b4 R5900: Get rid of ScopedBools 2021-10-01 23:30:39 +01:00
lightningterror a25dc9c38c ICore: Cleanup Wsign-compare warnings. 2021-09-30 01:07:59 +02:00
refractionpcsx2 7faa5db9e5 VU/GameDB: Move Mac/Status overflow flag checks to a gamefix 
We can't really do this reliably on x86 without soft floats, but superman still needs it, but it breaks other games.
 2021-09-29 17:33:13 +01:00
Ty Lamontagne aef731fdbe MicroVU: Fix branch type detection 
amendment of 589aba
 2021-09-26 05:13:28 +01:00
refractionpcsx2 f5f44286bf EE: 64bit compare for 64bit mode, not 32bit 2021-09-22 19:57:40 +01:00
TellowKrinkle 65e57a8230 iR5900: Use 64-bit math on x86-64 2021-09-22 12:47:49 +01:00
TellowKrinkle e74ba82093 iR5900: Move repeated code into functions 2021-09-22 12:47:49 +01:00
TellowKrinkle 0d7f141279 EERec: Don't load in skip case of SW[LR] 2021-09-21 22:57:41 +01:00
TellowKrinkle 23578e963f EERec: Don't load in skip case of SD[LR] 2021-09-21 22:57:41 +01:00
TellowKrinkle e9518f78c7 vtlb: Switch read64 and read128 handlers to return in sse regs 2021-09-21 22:57:41 +01:00
TellowKrinkle 7563f54e83 EERec: Clean up [LS]D[LR] a bit 2021-09-21 22:57:41 +01:00
refractionpcsx2 e127ca0cd1 COP2: Set correct number of XMM's per COP2 OP + Fix some hidden bugs 
Corrects XMM count for COP2 ops (some might be wrong, keep an eye out in the logs)
Fixes a hidden microVU bug with a SUB shortcut + some reg allocation bugs in QMFC/QMTC hidden by flushes.
 2021-09-21 22:46:33 +01:00
refractionpcsx2 752957604e COP2: Flush only needed register slots 2021-09-21 22:46:33 +01:00
refractionpcsx2 fba9c6c04d COP2: never flush EE regs but back them up conditionally 2021-09-21 22:46:33 +01:00
refractionpcsx2 8fe0061751 VU: Sync tighter when VU Kickstart is disabled + Improved M-Bit Sync 2021-09-19 18:49:24 +01:00
Connor McLaughlin e2992cbc02 Remove gui/ directory from target-wide includes 2021-09-17 22:03:00 -04:00
refractionpcsx2 a546cb8f7f microVU: Use 16 xmm's in x64 2021-09-17 14:37:11 +01:00
refractionpcsx2 862d606514 EE Rec: Added LDR/LDL 
Also fixed slight optimisation bug in SDL
 2021-09-17 13:06:47 +01:00
refractionpcsx2 5f58c325ca EE JIT: Implement SDR/SDL instructions 2021-09-17 13:06:47 +01:00
refractionpcsx2 d9c4ace613 VU: Put XGKick 1 cycle behind to fix sync issues with Jaws Unleashed 
Also added Jaws unleashed xgkick gamefixes to the DB
 2021-09-17 13:04:26 +01:00
refractionpcsx2 59dfe52b52 microVU: Replace XGKick hack with synced XGKick option 
Fixes Tennis Court Smash and Love Smash games which previously couldn't be fixed.
WRC no longer requires a patch, just the xgkickhack option.

Note: it's not a hack anymore, it just has to be called that :P
 2021-09-17 13:04:26 +01:00
refractionpcsx2 73bb8e4fdf VU Int: Make XGKick flush on VU program end 
Some games like to write directly to VU memory once the program has finished and I have no easy way to update the kick without being super slow. so for now, we'll just flush it.
 2021-09-12 16:12:31 +01:00
refractionpcsx2 3f56414824 VIF/VU: Cleaned up VIF Stall behaviour, sync XGKick with Unpacks. 
Also cleaned up a bunch of bad/old code
Fixed branches on E-Bit and M-Bit (VU0)
Fixed up VU Int behaviour with VU Instant on/off

Savestate bump
 2021-09-12 16:12:31 +01:00
refractionpcsx2 b4eaf3722f VU: Adjust timings of VU calls 2021-09-12 16:12:31 +01:00
Ty Lamontagne ab64023e56 MicroVU: Cleanup stale comments and code 2021-09-11 01:33:02 +01:00
Ty Lamontagne 18311d6a4c MicroVU: Purge Min/Max speedhack 2021-09-06 21:36:10 +01:00
Ty Lamontagne 589aba3713 [MicroVU] Revert "bla" 
This reverts commit 6800753f09.
 2021-09-06 19:53:08 +01:00
Ty Lamontagne f91286dbf3 MicroVU: Skip VU1 instructions on VU0 2021-09-05 21:18:19 +01:00
refractionpcsx2 b919de9dd1 VU: Adjust sync timing for VU Kickstart 
Fixes Crash Twinsanity
 2021-09-05 18:14:53 +01:00
lightningterror c2dad218e5 microVU: Combine mVU0cacheReserve and mVU1cacheReserve. 2021-09-05 18:06:46 +02:00
refractionpcsx2 ddb300027c VU: Improve sync during interlock and Scratchpad VU mem writes 
Also added some setting of next block cycles to 0 in cases where we don't know ahead of compile time or the VU is ending.
 2021-09-05 16:37:43 +01:00
TellowKrinkle dae8e0d233 Core: Remove unused mmx stuff 2021-09-04 18:28:24 -04:00
TellowKrinkle 5260d63565 Core: Format recompilers 2021-09-04 18:28:24 -04:00
kojin 8fdaaa2eab common: reorganize 2021-09-04 18:28:07 -04:00
refractionpcsx2 bda80fc748 Clang Format VU files 2021-08-31 21:29:31 +01:00
refractionpcsx2 d8dfe0a1e9 VU: optimise entering VU JITs 
Keeps note on how many cycles it needs for the next block to save exiting the EE JIT and entering the microVU JIT for no reason
 2021-08-31 21:29:31 +01:00
Connor McLaughlin d7de81aaaa iR5900: Make const register write clearer 
This was apparently sign extending anyway, but using SD makes it clear
that the 32-bit assignment will sign extend to 64-bit.
 2021-08-17 14:43:24 -04:00
Connor McLaughlin a216f28c9d iR5900: Use a signed multiply for MULT1 const prop 2021-08-17 14:43:24 -04:00
Connor McLaughlin 6844849305 microVU: Don't emit add reg, 0 in a few instructions 2021-08-15 08:02:34 +01:00
refractionpcsx2 8f82cd11b9 microVU: avoid half completed program loading null block 2021-08-03 11:52:15 +01:00
lightningterror ea759d7b68 microVU: Clean up a few warnings. 2021-07-28 22:10:47 +02:00
refractionpcsx2 7584571fbc GameDB: Removed Ratchet Dynamic patch. 2021-07-18 01:24:29 +01:00
refractionpcsx2 03b0d2eb00 RatchetDynaHack: Actually enable it when enabling the gamefix 2021-07-17 16:54:59 +01:00
refractionpcsx2 56372cc46d GameDB: Rename VU0Kickstart -> VUKickstart 
Clean up a couple of bits in microVU
 2021-07-15 13:58:34 +01:00
refractionpcsx2 c31d6b9ca3 GameDB: Add dynamic patching for Ratchet & Clank games 
Removed IPUWait hack as it is no longer required
 2021-07-15 13:43:16 +01:00
refractionpcsx2 6d9ace148e VU: Improve sync with VU Kickstart, loosen without kickstart 2021-07-15 13:42:52 +01:00
refractionpcsx2 45c1579a15 Debug: ignore perfectly timed DIV's, cycle count is off by one 2021-07-13 10:26:42 +01:00
refractionpcsx2 14be2649cf Debug: Detect bad COP2 DIV Unit Timing in Devel Builds 2021-07-12 20:45:50 +01:00
refractionpcsx2 c77e0a3a56 microVU: Enable T-Bit to work with MTVU 2021-07-05 10:26:50 +01:00
refractionpcsx2 973ebd153d microVU: Consolidate I-bit hacks in to one generic one 2021-07-05 10:26:09 +01:00
Gauvain 'GovanifY' Roussel-Tarbouriech fa9b30fa9e pcsx2: remove relative imports 
gosh that was a pain, please don't make me do that again
 2021-07-03 18:16:11 -04:00
TellowKrinkle f3b17cf021 iR5900: Move recConstBuf memory near recompiler memory 2021-06-18 00:44:02 +01:00
Ty Lamontagne 1097e246a4 Differentiate Impossible block clearing message from IOP & EE 2021-05-26 10:14:20 +01:00
kozarovv 0ad5680597 FPU: Remove FPU Compare Hack 
FULL clamping mode fix games where hack was used, so is no longer required.
This commit remove hack, adjust GameDB according to that change, and rename fpuFloat4 function to fpuFloat3.
Last change is because fpuFloat3 was just wrapper for fpuFloat4 with added check for compare hack.
Additionally fpuFloat2 was only function that called fpuFloat4 directly, so that one call was changed to fpuFloat3 to respect previous changes.
 2021-05-08 17:04:09 +02:00
refractionpcsx2 6f7890b709 microVU: Fix mistake when setting Status Flag bits for Signed/Zero 2021-04-19 10:55:33 +01:00
Gauvain 'GovanifY' Roussel-Tarbouriech 8a9ec4c706 core: purge sse2 2021-04-10 19:16:42 +02:00
refractionpcsx2 951cce7543 microVU: move the overflow flags to the correct position... 2021-02-28 05:21:18 +00:00
refractionpcsx2 f9d96f55a5 microVU: Remove SSE4 op from Overflow flag checks + clean up the code 2021-02-28 01:20:38 +00:00
ty b088ee69cd COP0: Preserve read only fields IC and DC in the config register 2021-02-24 17:44:14 +00:00
Christian Kenny e9e7974b15 Common: Remove obsolete/unused code 2021-02-23 00:28:53 +00:00
tellowkrinkle 1470315356 Fix compile of eeProfiler 2021-02-03 20:44:03 -06:00
kozarovv 983f6e28f5 microVU: Fix Esin opcode 
Fix X2 - Wolverine's Revenge
 2021-01-31 18:33:01 +00:00
refractionpcsx2 89991594de Vif: Clean up some old (incorrect) code. 2021-01-10 11:02:19 +00:00
Maxim Nikitin 7dbf01b024
Implements IOP breakpoints (#3011) 
IOP: Implement IOP Breakpoints
 2021-01-08 23:34:08 +00:00
refractionpcsx2 0f7044a90f mVU: Removed full flag optimisations 
They were unused, broken and cluttering up the code, so gotten rid.
 2021-01-03 16:17:19 +00:00
refractionpcsx2 c9bc6eac69 mVU: Fix P flag instance on Ebit 
Also small fix for flag statuses on M-Bit on Branch
 2021-01-03 12:03:55 +00:00
refractionpcsx2 413fd004da mVU: Fix jump caching when using doJumpAsSameProgram. This is by default 2021-01-02 08:35:32 +00:00
refractionpcsx2 ee07f860fc microVU: Implement Overflow checks. Fixes Superman Returns 
Removed patches for Superman Returns
 2021-01-01 20:55:11 +00:00
refractionpcsx2 155cf385bd microVU: Flush running VU1 program when toggling MTVU on 2020-12-18 20:55:02 +00:00
Tellow Krinkle 096bb8bf74 x86emitter: Remove virtual methods from register types 
Allows methods to generate variable-sized registers
 2020-12-16 20:31:19 -06:00
Tyler Wilding 9fa484dbab GameDB/MSVC: renamed _Target_ to _InstrucTarget_ to avoid collisions 2020-12-16 09:31:58 +00:00
refractionpcsx2 03445d0b55 microVU: Add sanity check when loading quick block from program. 
Sometimes (CoD Finest Hour) can somehow end up with blocks missing from a program, not sure how, but it still finds the current program, so we check if the block exists, if not, recompile new ones.
 2020-12-15 20:26:41 +00:00
refractionpcsx2 7138769182 VU: Synchronise VU1, added speedhack for old behaviour 2020-12-13 22:02:37 +00:00
refractionpcsx2 16d33f8960 VIF/MTVU: Correctly increment tag addr on VIF when using MTVU 
Fixes Def Jam Fight for NY when using MTVU
 2020-12-06 07:06:51 +00:00
refractionpcsx2 4595aae0de mVU: Keep start PC, modify prog search to avoid recompilation 
Also fix some M-Bit stuff
 2020-12-06 07:06:51 +00:00
GovanifY a3695f1cfd JIT: fix FPU IEEE float conversion on x64 2020-10-30 00:25:03 +00:00
refractionpcsx2 3dc44bafb3 microVU: Fix program range wrapping 2020-10-26 22:44:52 +00:00
refractionpcsx2 9ebcb3b141 microVU: Sort out when the Status flag is de/normalized 
Properly clear non-stick invalid/zero flags on DIV/SQRT/RSQRT COP2 instructions
 2020-10-26 22:44:36 +00:00
refractionpcsx2 4b0dc9c0df microVU: properly normalise Status flags when exiting a VU program 
Fixes shadows in Ratchet Gladiator
 2020-10-26 22:44:36 +00:00
refractionpcsx2 f25e7ff004 microVU: Save valid flag instances at the end of a VU0 program. 
Fixes State of Emergency 2 black screens and BIOS reboot in Driving Emotion Type-S
 2020-10-26 22:44:36 +00:00
refractionpcsx2 0448b4902c microVU: Fixed bug in E-bit conditional branches. Fixes DT Racer 
GameDB: Added VU0 Kickstart hack for DT Racer
 2020-10-25 21:41:29 +00:00
refractionpcsx2 2409486c2d VIF: Fixed undefined behaviour of Unpack V3-16 in final QW write. 
Fixes Homerun
 2020-10-18 17:24:43 +01:00
refractionpcsx2 cf05f6ca40
Cop2: Make sure the status flag gets updated on DIV/SQRT/RSQRT (#3813) 
Fixes Yanya Caballista (patches removed)
Fixes Disney's Treasure Plantet's crazy camera (that flies off) and ground displacement. Fixes #3441
 2020-10-16 09:47:23 +01:00
refractionpcsx2 bec587164b
microVU: Make sure flags are exact on M-bit (#3797) 
* microVU: Don't break on M-Bit if previous instruction was M-Bit

Fixes Gungrave
 2020-10-05 21:49:15 +01:00
kozarovv 491b6e12f7
Core: Fix recLUT_SetPage in recResetIOP for ROM1, and ROM2 (#3753) 2020-09-30 11:44:20 +01:00
refractionpcsx2 197eaf3899 VU: Also update Status/Mac instances after COP2, just in case 2020-09-10 12:25:52 +01:00
refractionpcsx2 19ab48c280 VU: Copy CLIP flag instance back to VU0 int and microVU when COP2 modifies it 
Fixes Soul Calibur 3 hair
 2020-09-10 11:52:47 +01:00
refractionpcsx2 4629c8363c microVU: Fix state saving when m-bit is reached 
microVU: Fix range merging to encompass whole ranges of programs
 2020-09-01 20:49:07 +01:00
refractionpcsx2 87dc885a4a VU: Improved EE Cycle Skipping hack to work better with the new VU0 sync changes 2020-08-30 17:15:18 +01:00
TellowKrinkle 56f2d307bc microVU: Fix empty register use 2020-08-30 04:31:10 +01:00
refractionpcsx2 ecebaca3f0 VU: Fix x64 crash introduced with VU Sync PR 
Thanks to TellowKrinkle for helping me debug this one
 2020-08-30 04:08:23 +01:00
kozarovv df79a17baa VU: Improve VU0/EE sync, Implement better M-Bit Handling, Fix VU program handing on VIF 2020-08-29 21:56:26 +01:00
Tellow Krinkle cd813edb1b x86emitter: Remove deprecated codegen functions 
Successfully moved off of all of them
 2020-08-24 16:20:09 -05:00
Tellow Krinkle 0711e0cd52 recompiler: Add comments to recLUT_SetPage 
It's kind of confusing
 2020-08-24 16:20:09 -05:00
Tellow Krinkle dc57270fb8 EE/IOP/VU: x86-64 recompiler support 2020-08-24 16:20:09 -05:00
tellowkrinkle 850efdc690
Move VTLB manipulation to class (#3524) 
Another small piece of #3451

Moves all VTLB pointer manipulation into dedicated classes for the purpose, which should allow the algorithm to be changed much more easily in the future (only have to change the class and recVTLB.cpp assembly since it obviously can't use the class)

Also some of the functions that manipulated the VTLB previously used POINTER_SIGN_BIT (which 1 << 63 on 64-bit) while others used a sign-extended 0x80000000. Now they all use the same one (POINTER_SIGN_BIT)

Note: recVTLB.cpp was updated to keep it compiling but the rest of the x86-64 compatibility changes were left out

Also, Cache.cpp seems to assume VTLB entries are both sides of the union at the same time, which is impossible. Does anyone know how this actually worked (and if this patch breaks it) or if it never worked properly in the first place?
 2020-08-19 09:37:23 +01:00
tellowkrinkle 75aac90452
Allocate memory in an x86-64-compatible way (#3523) 
Allocate memory in an x86-64-compatible way

Another part of #3451

Note: While this shouldn't change how anything works, it's been the #1 source of breakage of 32-bit builds in #3451 (it was the cause for the failure of win32 to allocate memory and the failure of linux-32 afterward) so we should definitely make sure it gets tested

see #3523 for more information
 2020-08-19 09:20:48 +01:00
kozarovv 6794bbbd6a
Add rom2: support (Fix Chinese Bios) (#3439) 
* Add rom2 support

* Add rom2 support on IOP

* Valid memory range for rom2

* Add rom2 support to IopMem.cpp
 2020-08-08 20:59:46 +01:00
refractionpcsx2 54f47572af EE REC: Prevent crash when DI instruction is in branch delay slot 2020-07-16 20:09:12 +01:00
arcum42 2b115d031e
Remove superVU. (#3386) 
* Remove superVU, as well as the VUClipFlagHack, which was SuperVU only.
 2020-05-24 19:08:12 -07:00
water111 94e1635882
Make recLUT not hardcoded to 32 MB. (#3095) 
This change makes the EE recompiler not hardcoded to working with 32 MB of RAM, and instead work with the amount of RAM set in Ps2MemSize::MainRam. The rest of PCSX2 seems to work fine with more than 32 MB of RAM - it is only the EE recompiler that has trouble. If the Ps2MemSize::MainRam value is not changed from the default 32 MB, there should be no change: 32 MB / 0x10000 = 0x200, the value that was there previously.

This may be helpful if anybody else in the future wants to emulate a PS2 dev kit with 128 MB or RAM, or maybe the PSX dvr thing which I think has 64 MB of RAM. I've confirmed that with the change, you could set Ps2MemSize::MainRam to 128 MB, and execute code with the recompiler that's above the first 32 MB of RAM, and do VIF and scratchpad DMA transfers from this upper memory as well.
 2020-05-12 23:03:38 -07:00
refractionpcsx2 184f0df2c5
Modify VU PC addressing so it only multiplies by 8 before entering the p… (#3362) 
* Modify VU addressing so it only multiplies by 8 before entering the program
Fixes issues with VU1 TPC being read multiplied by 8 (bad)

* Removed assert on SuperVU which no longer makes sense
 2020-05-12 23:59:42 +01:00
refractionpcsx2 4ce3fdfcb2 Fix up debugger stepping 2020-05-02 04:53:03 +01:00
refractionpcsx2 10dd9412a1 Fix CMSAR1 execution to use correct multiplier 
Fix ILW/ISW/LQ/SQ on microVU for reading VU1 regs

Marvel Nemesis - Rise of the Imperfects goes ingame now, but it's quite messy
 2019-12-30 15:26:44 +00:00
refractionpcsx2 908049a0fb pcsx2: DI execution is delayed by one instruction. 
Fixes booting issues in the following games:
Jak X, Namco 50th anniversary, Spongebob the Movie, Spongebob Battle for Bikini Bottom,
The Incredibles, The Incredibles rize of the underminer, Soukou kihei armodyne, Garfield Saving Arlene, Tales of Fandom Vol. 2.

The games will no longer require a patch to boot.
 2019-12-22 20:58:29 +01:00
gibbed b739e9187d pcsx2: Fix microVU debug logging. 2019-07-12 06:25:12 +02:00
arcum42 cc1a320c61 Remove sVU_Compare.h and iVU1micro.cpp, both of which appear unused. 2019-07-06 15:47:26 -07:00
Shanoah Alkire cc6a58da18 Remove sVU_Debug.h, as nothing in it is actually used anywhere. 2019-06-16 19:31:02 -07:00
hibye8313 56a976e277 microVU: Add gamefix for Crash Tag Team Racing. Fixes constant recompilation problems. 2019-04-30 22:57:11 +01:00
FlatOutPS2 17ac536116 pcsx2: Fix stall on branch .. in delay slot. 
Fixes stall when loading a stage in WRC 3.

Original pr https://github.com/PCSX2/pcsx2/pull/1783

Collaborator: lightningterror
 2019-04-10 04:06:18 +02:00
lightningterror 6905d4d883 x86emitter: Purge empty file sse_helpers.h. 
Code was removed in
60a9463e7a
Right now it's useless.
Update VS/cmake project files to remove any mentions of the file as
well.
 2019-02-18 11:51:06 +01:00
lightningterror ea38e2eba5 pcsx2: Remove/disable unused variables. 
Removed:
MC2_SIZE in MemoryCardFile.cpp,
length in microVU_Log.inl
VU_Neg_Infinity in sVU_Upper.cpp.

Commented out:
mc_sizeinfo_8mb in Sio.cpp
 2019-01-09 16:01:56 +01:00
Shanoah Alkire 51ceec74a3 A bit of cleanup. 2018-11-15 00:55:49 -08:00
Iritscen a3c6ad636b PCSX2: Add ability to pass launch arguments to games with CLI option '--gameargs="-arg1 -arg2 -etc (#2576) 
For more information please check the PR (#2576) since it's a bit detailed.
 2018-11-07 19:07:17 +01:00
Shanoah Alkire 122871654e Expand out a define to get rid of a warning. Get rid of other compiler warnings. Re-indent so that it doesn't look like a statement is part of an if statement when it isn't. 2018-10-27 02:49:03 -07:00
lightningterror d5700a8508 pcsx2: Update some redirect links. 2018-10-05 02:01:53 +02:00
refractionpcsx2 3c5fad7ef6 Reverted shift register stuff back to how it was, my changes made no difference now and it was slightly more optimal before. 
Also fixed spaces (blame PSI :P )
 2018-09-04 20:45:28 +01:00
refractionpcsx2 f7fb0f686b Fixed MFSA/MTSA, of course there's a game that abuses it (Rayman 3) 2018-09-04 20:26:36 +01:00
RedPanda4552 4dc4892588 Rename VU Cycle stealing to EE Cycle Skipping, and change tool tips for 
EE Cycle Stealing and EE Cycle Skipping
 2018-08-25 18:50:26 +02:00
refractionpcsx2 69888e5ab0 EE Rec/Int: Removed micro optimisation in QFSRV/MSTAB/MSTAH. Reverted functionality to match the documentation. There were some scenarios that weren't really accounted for, like developers doing what they're told not to do. 2018-07-15 13:14:46 +01:00
refractionpcsx2 9b82449542 Fixed optimisation problem on branch in branch delay slot. Fixes Dropship - United Peace Force. Props to MrCK1 for finding the issue. 2018-05-19 02:23:58 +01:00
Gregory Hainaut 02861fabc8 pcsx2|common: replace throw() by noexcept 2017-05-13 10:38:35 +02:00
Gregory Hainaut 47264dc350 core: use = default for trivial destructor 
Again not reported by clang-tidy and done with sed
 2017-05-13 10:38:35 +02:00
Gregory Hainaut 2ff43f2ed8 core: remove throw specifier on destructor 
It is the 'default' on C++11
 2017-05-13 10:38:35 +02:00
Jonathan Li 29eed182c2 pcsx2: Remove unnecessary aMax/aMin macros 2017-04-30 23:41:19 +01:00
Gregory Hainaut 0d3f02ee34 svu: cast variable to int to avoid unsigned vs int comparison 2017-04-30 21:20:23 +02:00
Volodymyr Kutsenko 6862106dee VU0: added a special case to the CFC2 instruction if it copies the value 
from the TPC register (fixes Street Fighter EX3 #954 and R Racing
Evolution the invisible cars issue)
 2017-02-23 04:38:26 +02:00
Gregory Hainaut bccc3ef253 Merge pull request #1770 from np511/gcc-cleanup 
Cleanup GCC warnings - still needs some work
 2017-01-30 15:28:33 +01:00
np511 15d66cf337 Properly format 2017-01-29 09:06:21 -05:00
Gregory Hainaut 5d119bec31 vif: init field in constructor + remove empty function 2017-01-22 16:23:40 +01:00
Gregory Hainaut ad7892bd15 svu: init all field of RANGE struct 2017-01-22 16:10:43 +01:00
Jonathan Li 285bcbcec0 vifUnpack: Report the correct number of bytes 
It now reports 6904 bytes instead of just less than 4GB.
 2017-01-07 14:49:33 +00:00
Gregory Hainaut 58e4076620 vif: update alignment constraint 
16B alignment is now useless for nVifBlock (no more SSE)
However update the alignment of bucket to 64B. It will reduce cache miss
probability in the find loop
 2016-12-18 22:51:23 +01:00
Gregory Hainaut d812222061 vif: use u32 code instead of u8/u16 
It avoids memory stalls and greatly reduces the overhead of the dVifUnpack function

Here a vtune summary of this branch (done on SotC init)

dVifUnpack<1> was 14.5% of effective VU thread time
dVifUnpack<1> is now 3.8% of effective VU thread time

I hope it will translate to better fps
 2016-12-18 22:44:24 +01:00
Gregory Hainaut ef75b36013 vif: move back the cache seach in the unpack function 
Avoid the various move to return the value (actually due to the pointer)
 2016-12-18 22:44:22 +01:00
Gregory Hainaut e4c2c53b19 vif: inline dVifsetVUptr function 
It avoid a double cmp/jmp on the dynarec/interpreter mode.
 2016-12-18 22:44:01 +01:00
Gregory Hainaut 6ae082dab2 vif: compute the length during the compilation stage 2016-12-18 22:44:00 +01:00
Gregory Hainaut 7a33cda122 vif: replace sse cmp code with standard cmp 
Standard instruction are faster to execute besides the CPU can optimize the cmp/jne

SSE

  e0:	add    ecx,0x10
  e3:	cmp    eax,0x7
  e6:	jg     1b0 <void dVifUnpack<0>(unsigned char const*, bool)+0x1b0>
enter_loop:
  ec:	vpcmpeqd xmm0,xmm1,XMMWORD PTR [ecx]
  f0:	vmovmskps eax,xmm0
  f4:	cmp    eax,0x7
  f7:	jne    e0 <void dVifUnpack<0>(unsigned char const*, bool)+0xe0>

Standard cmp

  d8:	add    eax,0x10
  db:	mov    esi,DWORD PTR [eax+0xc]
  de:	test   esi,esi
  e0:	je     190 <void dVifUnpack<0>(unsigned char const*, bool)+0x190>
enter_loop:
  e6:	cmp    ecx,DWORD PTR [eax+0x4]
  e9:	jne    d8 <void dVifUnpack<0>(unsigned char const*, bool)+0xd8>
  eb:	cmp    DWORD PTR [eax+0x8],ebx
  ee:	jne    d8 <void dVifUnpack<0>(unsigned char const*, bool)+0xd8>

v2: use reference instead of a pointer for find parameter
 2016-12-18 22:43:07 +01:00