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1584 Commits

Author SHA1 Message Date
Stenzek 7166c04ff2 R3000: Serialize IOP->EE ticks carry 
[SAVEVERSION+]
 2024-05-16 20:08:38 +10:00
refractionpcsx2 454d4c9fa0 IOP: Adjust cycle counts slightly more accurately in some situations 2024-05-15 20:14:08 +01:00
Benjamin Moir 9b03b236fe VMManager: Clear protected pages before changing extra memory mode 2024-05-10 22:33:01 +10:00
refractionpcsx2 052951fbb0 EE: Correct update of EE cycles on low cycle counts when overclocking 2024-05-10 01:39:00 +01:00
Benjamin Moir 5f7e97c27c [SAVEVERSION+] EE: Expose advanced option for extra memory 2024-05-09 13:45:06 +10:00
refractionpcsx2 e46d435d28 EE/JIT: Increase size of jump for FPU MUL 2024-04-30 09:56:15 +01:00
JordanTheToaster 418a97a02a R5900: Comment cleanup 2024-02-17 15:15:51 +00:00
Stenzek 6697e76be1 x86/iR5900: Fix signed/unsigned comparison in timeout loop 2024-01-14 12:51:51 +10:00
Stenzek fa00069068 Console: Remove WX rubbish and replace 2024-01-12 12:40:46 +10:00
Stenzek ef76666e5a Misc: Warning fixes 2024-01-08 23:33:43 +10:00
Stenzek 413ba09ee0 Config: Replace FpuNegDivHack with eeDivRoundMode 2024-01-07 21:42:18 +10:00
Stenzek 4ffbe0bbf9 x86/FPU: Always preserve sign in neg.s 2023-12-28 22:15:29 +10:00
Stenzek fb15893521 VMManager: Remove and merge System.cpp 2023-12-27 13:55:35 +10:00
Stenzek 308f8c5112 x86emitter: Abstract MXCSR into a general FPControlRegister type 2023-12-27 13:55:35 +10:00
Stenzek 86edc0dbe2 x86emitter: Make SSE_MXCSR not dependent on emitter 2023-12-27 13:55:35 +10:00
Stenzek f461bc9176 x86emitter: Purge x86caps 
We can use cpuinfo for querying AVX/AVX2.
 2023-12-27 13:55:35 +10:00
Stenzek 0d519a5f28 x86/FPU: Use SSE4 pminsd+pminud for sign clamping 2023-12-24 22:01:23 +10:00
Stenzek 0bc9c7ffa1 Common: Replace x86_intrin.h with generic Intrin.h 
For later Apple Silicon support.
 2023-12-24 14:03:14 +10:00
Stenzek d9abe10308 Misc: Remove explicit PCH include, switch to SPDX 2023-12-24 14:03:14 +10:00
Stenzek 47a65ce01e Misc: Slim down PCH 2023-12-24 14:03:14 +10:00
Stenzek dc859ca0a6 Misc: Simplify assertion macros 2023-12-24 14:03:14 +10:00
Stenzek 20e75b4057 GS: Replace ASSERT() with pxAssert() 2023-12-24 14:03:14 +10:00
Stenzek c8b051628f Misc: Replace likely/unlikely with C++20 equivalents 2023-12-24 14:03:14 +10:00
lightningterror f546ea1f8a iR5900: Correct some log links. 2023-12-10 16:34:40 +01:00
refractionpcsx2 a3eb1655c6 COP0: Correctly update performance counter cycles 2023-11-09 14:20:51 +00:00
refractionpcsx2 65d4baa944 EE/Int: Improve FPU emulation 2023-11-06 14:20:22 +00:00
refractionpcsx2 8b9af2c21b VU: Avoid overclocking when VUSync fix is enabled 2023-11-03 21:28:39 +00:00
refractionpcsx2 50872438e9 VU: scale VU0 cycle rate with EE 
Also fix cycle underflow issue
 2023-11-03 21:28:39 +00:00
Ty Lamontagne 46a0c2d5b6 Debugger: IOP Function Tree 
Co-authored-by: Ziemas <ziemas@ziemas.se>
 2023-10-31 15:42:56 +00:00
Ty Lamontagne be405eb705 Debugger: Visually show what CPU triggered a breakpoint 2023-10-26 19:26:43 +01:00
Stenzek 8e2af39c06 x86/R5900: EE rec doesn't need a stack frame 2023-10-10 18:01:30 +10:00
Stenzek 606cbb3883 System: Simplify memory allocation 2023-10-10 18:01:30 +10:00
Stenzek 377746f155 x86: Move dispatchers to recompiler code space 2023-10-10 18:01:30 +10:00
lightningterror a641d2a2de iR5900: Cleanup code. 
Variable scopes, constants, casts initializations.
 2023-09-16 18:46:45 +02:00
Ty Lamontagne 8dd866a35e iR5900 Recompiler: Emulate exception handler cycles on syscall skip 2023-09-14 18:51:47 +01:00
Ty Lamontagne b36e2eb5f4 iR5900 Recompiler: Skip exception handling for (i)FlushCache 2023-09-14 18:51:47 +01:00
Mrlinkwii 48549ff790 Misc : Fixed undefined behaviour warning 
Co-Authored-By: Ty <29295048+F0bes@users.noreply.github.com>
 2023-09-09 09:15:54 +01:00
Mrlinkwii e36cd7fe5c Build: remove -32 notation from core filenames 2023-08-01 16:09:09 +01:00
Stenzek 2b4c7d12b6 Common: Merge MathUtils.h into BitUtils.h 2023-07-23 21:52:36 +10:00
Stenzek 81236209db SaveState: Remove exceptions 2023-06-30 21:37:44 +10:00
Stenzek 7c9c8e197c Common: Replace MemsetFast routines with C memset 
And associated cleanup.

On most compilers these days, it'll either inline the memset with vector
fills or rep stosq, or outline with a call to memset.

I trust the compiler is probably going to make a better decision here,
than manual SSE intrinsics.

Ends up a couple of percent faster in FMV decoding.
 2023-06-22 19:11:57 +10:00
Stenzek 36c27188a4 VMManager: Refactor and improve boot process 
[SAVEVERSION+] VM struct changes.

 - Serial/title is now linked to disc, instead of running ELF.
 - Save states can be created during BIOS boot.
 - Patches now apply based on the executing CRC, and only after the
   entry point starts executing (fixes multi-game discs).
 - Add "Fast Forward Boot" option.
 - Split achievements download and activation, downloads occur on
   initialization, but are not activated until after the ELF loads.
 - Prevent HostFS access while in PS1 mode.
 - Remove multiple sources of truth for ELF/CRC/etc.
 - Move ELF state from global scope to VMManager.
 - Prevent game fixes and hw fixes being active while booting game.
 - Simplify game update.
 - Flush recompilers after ELF loads. No point keeping boot code around
   which gets overwritten.
 2023-06-17 17:38:43 +10:00
Stenzek 81da9fb5a4 Patch: Add new toggleable cheat and patch interface 2023-05-31 16:38:14 +01:00
Stenzek 512d24cea6 Misc: More build system cleanups 
Set UTF-8 source file format globally.
Set permissive/compliance mode globally.
Get rid of include of base 3rdparty directory, be explicit.
Get rid of duplicated properties.
Get rid of leftover plugin property files.
 2023-05-16 12:58:19 +01:00
Stenzek 5eacfe1afb x86/microVU: Reference StateEnd instead of inlining state 2023-05-16 01:20:22 +01:00
CharlesThobe 4671167a2c VIF: Fix assertion error not returning int value 2023-05-04 14:39:14 +01:00
refractionpcsx2 341f377e6d VIF: Improve IR setup for skipped unpack inputs/writes 2023-05-04 01:37:54 +01:00
refractionpcsx2 bf6a0a035a VIF-JIT: Ignore completely write protected vectors 2023-05-02 23:19:02 +01:00
refractionpcsx2 790447ecc9 VIF-JIT: Use non-reserved XMM for zero register 2023-05-02 21:27:53 +01:00
refractionpcsx2 dd2d4edffc VIF-JIT: Get rid of mem read for mask 2023-05-02 18:20:55 +01:00