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GameDB/MSVC: renamed _Target_ to _InstrucTarget_ to avoid collisions

This commit is contained in:
Tyler Wilding 2020-11-06 16:00:22 -05:00 committed by refractionpcsx2
parent b102134ae3
commit 9fa484dbab
12 changed files with 29 additions and 33 deletions
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1
pcsx2/CDVD/CDVD.cpp
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@ -29,7 +29,6 @@
#include "GS.h" // for gsVideoMode
#include "Elfheader.h"
#include "ps2/BiosTools.h"
#include "GameDatabase.h"
// This typically reflects the Sony-assigned serial code for the Disc, if one exists.
// (examples: SLUS-2113, etc).

6
pcsx2/DebugTools/DisR3000A.cpp
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@ -56,7 +56,7 @@ typedef char* (*TdisR3000AF)(u32 code, u32 pc);
#undef _Rs_
#undef _Sa_
#undef _Im_
#undef _Target_
#undef _InstrucTarget_
#define _Funct_ ((code ) & 0x3F) // The funct part of the instruction register
#define _Rd_ ((code >> 11) & 0x1F) // The rd part of the instruction register
@ -65,7 +65,7 @@ typedef char* (*TdisR3000AF)(u32 code, u32 pc);
#define _Sa_ ((code >> 6) & 0x1F) // The sa part of the instruction register
#define _Im_ ( code & 0xFFFF) // The immediate part of the instruction register
#define _Target_ ((pc & 0xf0000000) + ((code & 0x03ffffff) * 4))
#define _InstrucTarget_ ((pc & 0xf0000000) + ((code & 0x03ffffff) * 4))
#define _Branch_ (pc + 4 + ((short)_Im_ * 4))
#define _OfB_ _Im_, _nRs_
@ -75,7 +75,7 @@ typedef char* (*TdisR3000AF)(u32 code, u32 pc);
#define dHI() sprintf(ostr + strlen(ostr), " %8.8x (%s),", psxRegs.GPR.n.hi, "hi")
#define dLO() sprintf(ostr + strlen(ostr), " %8.8x (%s),", psxRegs.GPR.n.lo, "lo")
#define dImm() sprintf(ostr + strlen(ostr), " %4.4x (%d),", _Im_, _Im_)
#define dTarget() sprintf(ostr + strlen(ostr), " %8.8x,", _Target_)
#define dTarget() sprintf(ostr + strlen(ostr), " %8.8x,", _InstrucTarget_)
#define dSa() sprintf(ostr + strlen(ostr), " %2.2x (%d),", _Sa_, _Sa_)
#define dOfB() sprintf(ostr + strlen(ostr), " %4.4x (%8.8x (%s)),", _Im_, psxRegs.GPR.r[_Rs_], disRNameGPR[_Rs_])
#define dOffset() sprintf(ostr + strlen(ostr), " %8.8x,", _Branch_)

1
pcsx2/Patch.cpp
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@ -19,7 +19,6 @@
#include "IopCommon.h"
#include "Patch.h"
#include "GameDatabase.h"
#include <memory>
#include <vector>

2
pcsx2/Patch.h
View File

@ -37,7 +37,7 @@
#include "Pcsx2Defs.h"
#include "SysForwardDefs.h"
#include "GameDatabase.h"
#include "AppGameDatabase.h"
enum patch_cpu_type {
NO_CPU,

16
pcsx2/R3000A.h
View File

@ -135,13 +135,13 @@ extern s32 iopCycleEE; // tracks IOP's current sych status with the EE
/**** R3000A Instruction Macros ****/
#define _PC_ psxRegs.pc // The next PC to be executed
#define _Funct_ ((psxRegs.code ) & 0x3F) // The funct part of the instruction register
#define _Rd_ ((psxRegs.code >> 11) & 0x1F) // The rd part of the instruction register
#define _Rt_ ((psxRegs.code >> 16) & 0x1F) // The rt part of the instruction register
#define _Rs_ ((psxRegs.code >> 21) & 0x1F) // The rs part of the instruction register
#define _Sa_ ((psxRegs.code >> 6) & 0x1F) // The sa part of the instruction register
#define _Im_ ((u16)psxRegs.code) // The immediate part of the instruction register
#define _Target_ (psxRegs.code & 0x03ffffff) // The target part of the instruction register
#define _Funct_ ((psxRegs.code ) & 0x3F) // The funct part of the instruction register
#define _Rd_ ((psxRegs.code >> 11) & 0x1F) // The rd part of the instruction register
#define _Rt_ ((psxRegs.code >> 16) & 0x1F) // The rt part of the instruction register
#define _Rs_ ((psxRegs.code >> 21) & 0x1F) // The rs part of the instruction register
#define _Sa_ ((psxRegs.code >> 6) & 0x1F) // The sa part of the instruction register
#define _Im_ ((u16)psxRegs.code) // The immediate part of the instruction register
#define _InstrucTarget_ (psxRegs.code & 0x03ffffff) // The target part of the instruction register
#define _Imm_ ((short)psxRegs.code) // sign-extended immediate
#define _ImmU_ (psxRegs.code&0xffff) // zero-extended immediate
@ -160,7 +160,7 @@ extern s32 iopCycleEE; // tracks IOP's current sych status with the EE
#define _rHi_ psxRegs.GPR.n.hi // The HI register
#define _rLo_ psxRegs.GPR.n.lo // The LO register
#define _JumpTarget_ ((_Target_ << 2) + (_PC_ & 0xf0000000)) // Calculates the target during a jump instruction
#define _JumpTarget_ ((_InstrucTarget_ << 2) + (_PC_ & 0xf0000000)) // Calculates the target during a jump instruction
#define _BranchTarget_ (((s32)(s16)_Imm_ * 4) + _PC_) // Calculates the target during a branch instruction
#define _SetLink(x) psxRegs.GPR.r[x] = _PC_ + 4; // Sets the return address in the link register

16
pcsx2/R5900.h
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@ -231,13 +231,13 @@ struct tlbs
#define _PC_ cpuRegs.pc // The next PC to be executed - only used in this header and R3000A.h
#define _Funct_ ((cpuRegs.code ) & 0x3F) // The funct part of the instruction register
#define _Rd_ ((cpuRegs.code >> 11) & 0x1F) // The rd part of the instruction register
#define _Rt_ ((cpuRegs.code >> 16) & 0x1F) // The rt part of the instruction register
#define _Rs_ ((cpuRegs.code >> 21) & 0x1F) // The rs part of the instruction register
#define _Sa_ ((cpuRegs.code >> 6) & 0x1F) // The sa part of the instruction register
#define _Im_ ((u16)cpuRegs.code) // The immediate part of the instruction register
#define _Target_ (cpuRegs.code & 0x03ffffff) // The target part of the instruction register
#define _Funct_ ((cpuRegs.code ) & 0x3F) // The funct part of the instruction register
#define _Rd_ ((cpuRegs.code >> 11) & 0x1F) // The rd part of the instruction register
#define _Rt_ ((cpuRegs.code >> 16) & 0x1F) // The rt part of the instruction register
#define _Rs_ ((cpuRegs.code >> 21) & 0x1F) // The rs part of the instruction register
#define _Sa_ ((cpuRegs.code >> 6) & 0x1F) // The sa part of the instruction register
#define _Im_ ((u16)cpuRegs.code) // The immediate part of the instruction register
#define _InstrucTarget_ (cpuRegs.code & 0x03ffffff) // The target part of the instruction register
#define _Imm_ ((s16)cpuRegs.code) // sign-extended immediate
#define _ImmU_ (cpuRegs.code&0xffff) // zero-extended immediate
@ -245,7 +245,7 @@ struct tlbs
#define _Opcode_ (cpuRegs.code >> 26 )
#define _JumpTarget_ ((_Target_ << 2) + (_PC_ & 0xf0000000)) // Calculates the target during a jump instruction
#define _JumpTarget_ ((_InstrucTarget_ << 2) + (_PC_ & 0xf0000000)) // Calculates the target during a jump instruction
#define _BranchTarget_ (((s32)(s16)_Im_ * 4) + _PC_) // Calculates the target during a branch instruction
#define _TrapCode_ ((u16)cpuRegs.code >> 6) // error code for non-immediate trap instructions.

6
pcsx2/gui/AppGameDatabase.cpp
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@ -17,13 +17,10 @@
#include "App.h"
#include "AppGameDatabase.h"
#include "PrecompiledHeader.h"
#include "App.h"
#include "AppGameDatabase.h"
#include <wx/stdpaths.h>
#include "fmt/core.h"
// TODO - check that this is being threaded properly, remove from
AppGameDatabase& AppGameDatabase::LoadFromFile(const wxString& _file)
{
// TODO - config - kill this with fire with std::filesystem
@ -55,7 +52,6 @@ AppGameDatabase& AppGameDatabase::LoadFromFile(const wxString& _file)
u64 qpc_Start = GetCPUTicks();
YamlGameDatabaseImpl gameDb = YamlGameDatabaseImpl();
// TODO - thread the load!
if (!gameDb.initDatabase(std::string(file)))
{
Console.Error(L"(GameDB) Database could not be loaded successfully");

2
pcsx2/gui/AppGameDatabase.h
View File

@ -17,6 +17,8 @@
#include "GameDatabase.h"
#include "AppConfig.h"
class AppGameDatabase : public YamlGameDatabaseImpl
{
public:

2
pcsx2/x86/iR3000A.cpp
View File

@ -1182,7 +1182,7 @@ static void __fastcall iopRecRecompile( const u32 startpc )
case 2: // J
case 3: // JAL
s_branchTo = _Target_ << 2 | (i + 4) & 0xf0000000;
s_branchTo = _InstrucTarget_ << 2 | (i + 4) & 0xf0000000;
s_nEndBlock = i + 8;
goto StartRecomp;

4
pcsx2/x86/iR3000Atables.cpp
View File

@ -940,14 +940,14 @@ void rpsxMTLO()
void rpsxJ()
{
// j target
u32 newpc = _Target_ * 4 + (psxpc & 0xf0000000);
u32 newpc = _InstrucTarget_ * 4 + (psxpc & 0xf0000000);
psxRecompileNextInstruction(1);
psxSetBranchImm(newpc);
}
void rpsxJAL()
{
u32 newpc = (_Target_ << 2) + ( psxpc & 0xf0000000 );
u32 newpc = (_InstrucTarget_ << 2) + ( psxpc & 0xf0000000 );
_psxDeleteReg(31, 0);
PSX_SET_CONST(31);
g_psxConstRegs[31] = psxpc + 4;

2
pcsx2/x86/ix86-32/iR5900-32.cpp
View File

@ -1843,7 +1843,7 @@ static void __fastcall recRecompile( const u32 startpc )
case 2: // J
case 3: // JAL
s_branchTo = _Target_ << 2 | (i + 4) & 0xf0000000;
s_branchTo = _InstrucTarget_ << 2 | (i + 4) & 0xf0000000;
s_nEndBlock = i + 8;
goto StartRecomp;

4
pcsx2/x86/ix86-32/iR5900Jump.cpp
View File

@ -50,7 +50,7 @@ void recJ()
EE::Profiler.EmitOp(eeOpcode::J);
// SET_FPUSTATE;
u32 newpc = (_Target_ << 2) + ( pc & 0xf0000000 );
u32 newpc = (_InstrucTarget_ << 2) + ( pc & 0xf0000000 );
recompileNextInstruction(1);
if (EmuConfig.Gamefixes.GoemonTlbHack)
SetBranchImm(vtlb_V2P(newpc));
@ -63,7 +63,7 @@ void recJAL()
{
EE::Profiler.EmitOp(eeOpcode::JAL);
u32 newpc = (_Target_ << 2) + ( pc & 0xf0000000 );
u32 newpc = (_InstrucTarget_ << 2) + ( pc & 0xf0000000 );
_deleteEEreg(31, 0);
if(EE_CONST_PROP)
{