mirror of https://github.com/PCSX2/pcsx2.git
COP0: Preserve read only fields IC and DC in the config register
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@ -41,10 +41,14 @@ void __fastcall WriteCP0Status(u32 value) {
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//DMA_LOG("COP0 Status write = 0x%08x", value);
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cpuRegs.CP0.n.Status.val = value;
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cpuUpdateOperationMode();
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cpuSetNextEventDelta(4);
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}
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void __fastcall WriteCP0Config(u32 value) {
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// Protect the read-only ICacheSize (IC) and DataCacheSize (DC) bits
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cpuRegs.CP0.n.Config = value & ~0xFC0;
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cpuRegs.CP0.n.Config |= 0x440;
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}
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//////////////////////////////////////////////////////////////////////////////////////////
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// Performance Counters Update Stuff!
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@ -472,6 +476,10 @@ void MTC0()
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WriteCP0Status(cpuRegs.GPR.r[_Rt_].UL[0]);
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break;
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case 16:
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WriteCP0Config(cpuRegs.GPR.r[_Rt_].UL[0]);
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break;
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case 24:
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COP0_LOG("MTC0 Breakpoint debug Registers code = %x", cpuRegs.code & 0x3FF);
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break;
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@ -17,6 +17,7 @@
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#define __COP0_H__
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extern void __fastcall WriteCP0Status(u32 value);
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extern void __fastcall WriteCP0Config(u32 value);
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extern void cpuUpdateOperationMode();
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extern void WriteTLB(int i);
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extern void UnmapTLB(int i);
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@ -212,7 +212,12 @@ void recMTC0()
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{
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case 12:
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iFlushCall(FLUSH_INTERPRETER);
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xFastCall((void*)WriteCP0Status, g_cpuConstRegs[_Rt_].UL[0] );
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xFastCall((void*)WriteCP0Status, g_cpuConstRegs[_Rt_].UL[0]);
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break;
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case 16:
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iFlushCall(FLUSH_INTERPRETER);
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xFastCall((void*)WriteCP0Config, g_cpuConstRegs[_Rt_].UL[0]);
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break;
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case 9:
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@ -265,6 +270,12 @@ void recMTC0()
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xFastCall((void*)WriteCP0Status, ecx );
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break;
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case 16:
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iFlushCall(FLUSH_INTERPRETER);
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_eeMoveGPRtoR(ecx, _Rt_);
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xFastCall((void*)WriteCP0Config, ecx);
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break;
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case 9:
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xMOV(ecx, ptr[&cpuRegs.cycle]);
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_eeMoveGPRtoM((uptr)&cpuRegs.CP0.r[9], _Rt_);
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