Commit Graph

430 Commits

Author SHA1 Message Date
zilmar 252f629e14 Core: Convert DoIllegalInstructionException to TriggerException 2023-05-18 11:13:22 +09:30
zilmar 59a1277bed Core: Convert GenerateOverflowException to TriggerException 2023-05-18 11:05:27 +09:30
zilmar 69fd74ba56 Core: Convert DoSysCallException to TriggerException 2023-05-18 10:56:06 +09:30
zilmar 17df17805d Core: convert DoTrapException to TriggerException 2023-05-18 10:49:58 +09:30
zilmar ce69324dbe Core: Update R4300iOp::COP1_S_MUL to handle exceptions 2023-03-21 10:49:49 +10:30
zilmar 96787690c7 Core: Fix CoprocessorUnitNumber on exception 2023-03-20 12:09:06 +10:30
zilmar 7f7aee7232 Core: remove FAKE_CAUSE_REGISTER 2023-03-14 12:14:10 +10:30
zilmar 1864adcb35 Core: improve the accuracy of COP1_S_ADD 2023-02-21 14:54:22 +10:30
zilmar f802b18cdc Core: Change to using fenv.h instead of including the code directly 2023-01-30 10:07:51 +10:30
zilmar 0e52bfb185 Core: Fix the allocation of rdram size if set in the rdb 2023-01-23 08:30:13 +10:30
zilmar 210ebd42de Core: have an option for rdram to be different between known and unknown roms 2023-01-16 20:53:48 +10:30
zilmar 531a7df959 Core: Improve StoreInstruc 2023-01-09 14:26:35 +10:30
zilmar 80aecdc5e3 Core: Improve R4300iOp::COP1_CT 2023-01-02 19:49:19 +10:30
zilmar c0341bb759 Core: Code clean up for clang 2022-12-19 15:35:17 +10:30
zilmar 6c154f6547 Core: Add Cop2/Cop3 handling exception 2022-12-12 21:29:16 +10:30
zilmar d3afe97d38 Core: Initialize FPR_Ctrl[Revision] to 0xA00 2022-12-12 15:27:07 +10:30
zilmar d35d2e6abe Core: Move ReadsGPR, WritesGPR, ReadsHI(), ReadsLO(), WritesHI(), WritesLO() out of OpInfo and into R4300iInstruction 2022-12-05 12:23:09 +10:30
Squall Leonhart 8eecb0c823
Extend mempak Index Table to the intended 256 bytes, so that the default checksum is actually correct, and include the backup of that data. (#2304)
* just a test to see what happens

* duplicate the full 256 bytes.

* Didn't need to duplicate it after all.

The index table wasn't actually 256 bytes as intended, so the checksum was invalid.

Cruis'n'USA 1.0 didn't like this one bit.

* fully duplicate it after all just in case of a rare case

where a game breaks without the backup of the checksum and table.

* this looks properly duplicated now.

perhaps
2022-11-24 07:49:48 +10:30
zilmar 989827cb77 Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram 2022-11-14 21:20:28 +10:30
zilmar 97e3f50007 Core: Update mask of registers in CRegisters::Cop0_MT 2022-11-14 20:56:21 +10:30
zilmar cabcd2cc95 Core: Handle masking of random in CSystemTimer::UpdateTimers 2022-11-14 11:19:02 +10:30
zilmar 48da86bea1 Core: if Rom is larger than ISViewerHandler, then use rom handler 2022-11-08 10:54:01 +10:30
zilmar b3c6858b69 Core: Change COP0 registers to use an enum 2022-11-07 09:24:58 +10:30
zilmar 4525e8b6f3 Core: Move IMEM/DMEM into SPRegistersHandler 2022-10-17 17:29:05 +10:30
zilmar 96244cd6fd Core: Update NonMemory Access to pifram 2022-10-17 11:31:54 +10:30
zilmar 53e00b8023 Core: Clean up masking of COP0 registers 2022-10-17 09:06:22 +10:30
zilmar 9186dcab39 Core: Allow reading from ISViewerHandler 2022-10-17 08:59:26 +10:30
zilmar c16307ec0f Core: Move Pifram code into PifRamHandler 2022-10-17 08:27:52 +10:30
zilmar 761a1ee52a Code clean up 2022-10-10 10:52:17 +10:30
zilmar 0d7f25138c Core: Do not check sign extension in 32bit core 2022-10-04 09:47:45 +10:30
zilmar 8391cdafde Core: Fix masking of context 2022-10-03 21:48:09 +10:30
zilmar da138bf38b Project64: Exception when address not sign extended 2022-10-03 18:35:50 +10:30
zilmar 82d9027374 Core: Fix up XContext 2022-10-03 11:29:21 +10:30
zilmar 42cc34964b Core: Sign extend cop0 2022-10-03 09:34:13 +10:30
zilmar a2981ff4d8 Core: Make Load/Store use 64bit vaddr 2022-09-19 21:36:36 +09:30
zilmar 1c77f6f0fd Core: Make Cop0 64bit 2022-09-19 16:36:44 +09:30
zilmar 21b193152a Core: Fix CMipsMemoryVM::MemoryValue64 for sdl/sdr 2022-09-19 12:13:19 +09:30
zilmar 05d46c9487 Core: Handle reserve instruction 31 2022-09-19 12:12:08 +09:30
zilmar a640ecfbc0 Core: CMipsMemoryVM::SB_NonMemory should return false just on exception 2022-09-05 21:20:07 +09:30
zilmar e171adfef6 Core: Clean up formatting of register names 2022-09-05 16:47:51 +09:30
zilmar 29526583a6 Core: Give cop0 registers names 2022-09-05 16:38:30 +09:30
zilmar 18b9892bc7 Core: Add handling of overflow exception 2022-09-05 16:35:13 +09:30
zilmar 0371c20d32 Core: Use BreakOnUnhandledMemory in SPRegistersHandler when breaking 2022-09-05 11:00:15 +09:30
zilmar 4218cbad23 Core: R4300iInstruction::DecodeSpecialName - Fix up SLL param 2022-08-29 08:27:47 +09:30
zilmar 9b16d29792 Core: Add rom write decay and some code clean up 2022-08-22 12:47:44 +09:30
zilmar 51c9867e76 Core: Get the recompiler to be use globals less 2022-08-08 20:22:51 +09:30
zilmar 5ea06d958e Core: have SB/SH be able to write to rom handler 2022-08-08 19:33:16 +09:30
zilmar 18870634a5 Core: Clean up some 64bit warnings 2022-08-01 13:15:52 +09:30
zilmar 10d23486c6 Core: Add option to break on address exception 2022-08-01 10:38:12 +09:30
zilmar cffeceef70 Core: Handle rom written to better 2022-08-01 10:15:56 +09:30
zilmar d37d0dc7a5 Core: Dissasm of DMFC0 was showing the wrong reg 2022-08-01 10:02:07 +09:30
zilmar 7b851e6b6e Core: Break on unhandled memory 2022-08-01 10:00:07 +09:30
zilmar 63051df71e Core: Another fix at 64dd 2022-07-25 22:00:41 +09:30
zilmar 09b535551d Core: Move DelaySlotEffectsCompare into R4300iInstruction 2022-07-25 16:35:42 +09:30
zilmar 0abc7ccaa4 Core: Move OpHasDelaySlot into R4300iInstruction 2022-07-25 14:23:12 +09:30
zilmar 15466b6a9b Core: Fix unaligned rom access with LH/LB 2022-07-25 14:08:09 +09:30
zilmar 1a8a4dd50f Core: Fix some bugs added to R4300iInstruction Param 2022-07-25 11:57:19 +09:30
zilmar acd5f8ecd5 Core: Add ISViewerHandler 2022-07-18 19:06:34 +09:30
zilmar f62f8207ec Core: Initiate PREVID 2022-07-18 18:56:52 +09:30
zilmar 7f3b8e3601 Core: Start to add R4300iInstruction to do analysis of an opcode 2022-07-18 18:01:00 +09:30
zilmar 079e493728 Core: Improve PI Dma 2022-07-04 17:14:27 +09:30
zilmar 8b2c66cc07 Core: Move plugin specs to a central location 2022-06-27 19:32:38 +09:30
zilmar 837e93d775 Core: Move PI_DMA_READ & PI_DMA_WRITE into PeripheralInterfaceHandler 2022-06-20 09:10:01 +09:30
zilmar f0760ff1cf Core: Move SP_DMA_WRITE into SPRegistersHandler 2022-06-13 11:46:06 +09:30
zilmar 86aa483a38 Core: Move memory exceptions out of interrupter ops and in to Memory Manager 2022-06-13 11:24:36 +09:30
zilmar 8f1f7e9cf3 core: move add opcode count from pre to post op for recompiler 2022-06-06 11:53:31 +09:30
zilmar dc106c0df8 Core: Start to add store instruction self mod 2022-06-06 11:41:09 +09:30
zilmar 603ed853bc Core: Some code clean up for load/store non memory 2022-05-30 20:20:25 +09:30
zilmar cc0c139f7e Core: modularize store memory values using CompileStoreMemoryValue 2022-05-23 06:24:56 +09:30
zilmar f95c0f7ef1 Core: Fix bug in SDC1 2022-05-20 10:32:15 +09:30
zilmar 487ed8b54d Core: If SMM_PIDMA, clear physical memory code before doing the dma 2022-05-16 15:33:36 +09:30
zilmar 1617e63b84 Core: make memory reads/write to go through new CMipsMemoryVM::MemoryPtr 2022-05-16 15:26:20 +09:30
zilmar 1fe8fd1299 Core: have MemoryValue32 be able to read from rom 2022-05-16 11:00:20 +09:30
zilmar 718d7e0359 [Core] Clean up load/store usage in MemoryVirtualMem 2022-05-09 10:06:10 +09:30
zilmar de366db6c1 [Core] Clean up some warnings 2022-05-03 22:46:12 +09:30
zilmar 5a49331c0b Core: Direct tlb method to read and write to memory 2022-05-02 20:22:31 +09:30
zilmar bac3517c86 [Core] Change tlb empty to be -1 and remove rdram from tlb value 2022-05-02 19:10:35 +09:30
zilmar b74a2dc69f [Core] Change TranslateVaddr to VAddrToPAddr 2022-05-02 07:36:50 +09:30
zilmar 2f1074a287 Core: Add handler for cartridge domains 2022-04-25 17:12:07 +09:30
zilmar 016ded2b56 Core: Move Save types 2022-04-19 11:17:43 +09:30
zilmar e9d2b9793f Core: Add Pif Ram Handler 2022-04-19 09:37:57 +09:30
zilmar 653e15a296 Core: Add RomMemoryHandler 2022-04-18 20:57:59 +09:30
zilmar fbf65bce12 Core: Add a look up table for Memory Reads or Writes 2022-04-04 10:30:27 +09:30
zilmar a249705bce Core: Add CartridgeDomain2Address1Handler 2022-03-21 20:57:57 +10:30
zilmar 2b646677ac Core: remove Write32SerialInterface 2022-03-21 15:22:42 +10:30
zilmar e1d3222a8a Core: Move Serial interface into handler 2022-03-21 15:04:59 +10:30
zilmar c28bc27c27 Core: Move audio code into AudioInterfaceHandler 2022-03-21 13:14:56 +10:30
zilmar fcdda04da5 Core: Move Audio Interface code in to handler 2022-03-21 10:59:02 +10:30
zilmar d7e732a7eb Core: Add callback when game resets/loads state 2022-03-14 21:07:06 +10:30
zilmar 80d8e6edaa Core: Move Video Interface code in to handler 2022-03-08 10:18:56 +10:30
zilmar 928dfe3a16 Core: Add MIPSInterfaceHandler 2022-03-04 22:53:30 +10:30
zilmar db50dac063 Core: Add DisplayControlRegHandler 2022-02-21 21:56:25 +10:30
zilmar 390fe897a2 Core: Add RDRAMRegistersHandler 2022-02-21 19:47:14 +10:30
zilmar f7618f29c0 Core: Move SP_DMA_READ into SPRegistersHandler 2022-02-01 13:24:25 +10:30
zilmar 2b008cc278 Core: Create Memory handler for SP Registers 2022-01-24 23:13:10 +10:30
LuigiBlood 16667ec4f9
[Core] Proper Dezaemon 3D SRAM 96KB save support (#2165) 2022-01-12 07:33:56 +10:30
LuigiBlood 5d82837984
[Project64-input] N64 Mouse Support (#2160)
* [Project64-input] Unpolished Mouse Support
(Use Present value as Device Type)

* [Project64-input] Use Forced N64 Mouse config (using System Mouse)

* [Project64-input] Disable Mouse Scanning

* [Project64-input] Polish UI by adding Mouse image + Prevent Controller setup when using N64 Mouse

* [Project64-input] Revert Controller Save/Load changes

* [Project64-input] Seperate N64 Mouse into its own configuration

* [Project64-input] Add Mouse Locking + Shortcut System

* [Project64-input] Make Cursor invisible when locked

* [Project64-input] Make sure to unlock mouse when opening config

* [Project64-input] Working Lock/Unlock Shortcut + Only emulate mouse when locked

* [Project64-input] Use ClipCursor instead of DirectInput Exclusive Level

* [Project64-input] Add Mouse Sensitivity option + Change to SetCursorPos

* [Project64-input] Add WM_KillFocus and EmulationPaused functions

* [Project64-core] Move EmulationPaused call to really make sure it is called in all cases
2022-01-09 21:43:12 +10:30
zilmar 40683ecf79 Core: Remove legacy code 2022-01-05 08:59:12 +10:30
zilmar 226ebe68d9 Core: Remove ROM_IN_MAPSPACE 2022-01-05 08:31:27 +10:30
zilmar beb4c4378f Core: Remove Old CFB_READ code 2022-01-05 08:24:58 +10:30