[Core] Proper Dezaemon 3D SRAM 96KB save support (#2165)

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LuigiBlood 2022-01-11 22:03:56 +01:00 committed by GitHub
parent 7452dd44db
commit 16667ec4f9
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 5 additions and 5 deletions

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@ -146,7 +146,7 @@ void CDMA::PI_DMA_READ()
return;
}
if (g_Reg->PI_CART_ADDR_REG >= 0x08000000 && g_Reg->PI_CART_ADDR_REG <= 0x08010000)
if (g_Reg->PI_CART_ADDR_REG >= 0x08000000 && g_Reg->PI_CART_ADDR_REG < 0x08088000)
{
if (g_System->m_SaveUsing == SaveChip_Auto)
{

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@ -1349,7 +1349,7 @@ void CMipsMemoryVM::Load32CartridgeDomain2Address1(void)
void CMipsMemoryVM::Load32CartridgeDomain2Address2(void)
{
uint32_t offset = (m_MemLookupAddress & 0x1FFFFFFF) - 0x08000000;
if (offset > 0x10000)
if (offset > 0x88000)
{
m_MemLookupValue.UW[0] = ((offset & 0xFFFF) << 16) | (offset & 0xFFFF);
return;
@ -1919,7 +1919,7 @@ void CMipsMemoryVM::Write32CartridgeDomain2Address1(void)
void CMipsMemoryVM::Write32CartridgeDomain2Address2(void)
{
uint32_t offset = (m_MemLookupAddress & 0x1FFFFFFF) - 0x08000000;
if (g_System->m_SaveUsing == SaveChip_Sram && offset < 0x8000)
if (g_System->m_SaveUsing == SaveChip_Sram && offset < 0x88000)
{
// Store SRAM
uint8_t tmp[4] = "";

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@ -183,7 +183,7 @@ bool CDebugMMU::GetPhysicalByte(uint32_t paddr, uint8_t* value)
{
uint32_t saveOffset = paddr & 0x000FFFFF;
if (g_System->m_SaveUsing == SaveChip_Sram && saveOffset <= 0x7FFF) // SRAM
if (g_System->m_SaveUsing == SaveChip_Sram && saveOffset < 0x88000 && (saveOffset & 0x3FFFF) < 0x8000) // SRAM
{
uint32_t wordpaddr = paddr & ~3;
uint8_t data[4];
@ -257,7 +257,7 @@ bool CDebugMMU::SetPhysicalByte(uint32_t paddr, uint8_t value)
{
uint32_t saveOffset = paddr & 0x000FFFFF;
if (g_System->m_SaveUsing == SaveChip_Sram && saveOffset <= 0x7FFF)
if (g_System->m_SaveUsing == SaveChip_Sram && saveOffset < 0x88000 && (saveOffset & 0x3FFFF) < 0x8000)
{
uint32_t wordpaddr = paddr & ~3;
uint8_t data[4];