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Core: Move Serial interface into handler

This commit is contained in:
zilmar 2022-03-21 15:04:59 +10:30
parent c28bc27c27
commit e1d3222a8a
10 changed files with 199 additions and 190 deletions
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154
Source/Project64-core/Logging.cpp
View File

@ -33,79 +33,16 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr)
}
uint32_t Value;
if (VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
{
return;
}
if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
{
return;
}
if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC)
{
return;
}
if (VAddr == 0xA4080000)
{
return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
{
return;
}
if (VAddr >= 0xA4300000 && VAddr <= 0xA430000C)
{
return;
}
if (VAddr >= 0xA4400000 && VAddr <= 0xA4400034)
{
return;
}
if (VAddr >= 0xA4500000 && VAddr <= 0xA4500014)
{
return;
}
if (VAddr == 0xA4800000)
{
if (!LogSerialInterface())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", PC, Value);
return;
}
if (VAddr == 0xA4800004)
{
if (!LogSerialInterface())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", PC, Value);
return;
}
if (VAddr == 0xA4800010)
{
if (!LogSerialInterface())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", PC, Value);
return;
}
if (VAddr == 0xA4800018)
{
if (!LogSerialInterface())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SI_STATUS_REG (%08X)", PC, Value);
return;
}
if (VAddr >= 0xBFC00000 && VAddr <= 0xBFC007C0)
if ((VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize())) ||
(VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024) ||
(VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC) ||
(VAddr == 0xA4080000) ||
(VAddr >= 0xA4100000 && VAddr <= 0xA410001C) ||
(VAddr >= 0xA4300000 && VAddr <= 0xA430000C) ||
(VAddr >= 0xA4400000 && VAddr <= 0xA4400034) ||
(VAddr >= 0xA4500000 && VAddr <= 0xA4500014) ||
(VAddr == 0xA4800000 && VAddr <= 0xA4800018) ||
(VAddr >= 0xBFC00000 && VAddr <= 0xBFC007C0))
{
return;
}
@ -170,31 +107,16 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
VAddr = PAddr + 0xA0000000;
}
if (VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize()))
{
return;
}
if (VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024)
{
}
if (VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC)
if ((VAddr >= 0xA0000000 && VAddr < (0xA0000000 + g_MMU->RdramSize())) ||
(VAddr >= 0xA3F00000 && VAddr <= 0xA3F00024) ||
(VAddr >= 0xA4000000 && VAddr <= 0xA4001FFC) ||
(VAddr >= 0xA4040000 && VAddr <= 0xA404001C) ||
(VAddr == 0xA4080000) ||
(VAddr >= 0xA4100000 && VAddr <= 0xA410001C))
{
return;
}
if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
{
return;
}
if (VAddr == 0xA4080000)
{
return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
{
return;
}
if (VAddr >= 0xA4200000 && VAddr <= 0xA420000C)
{
@ -213,52 +135,12 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
if ((VAddr >= 0xA4300000 && VAddr <= 0xA430000C) ||
(VAddr >= 0xA4400000 && VAddr <= 0xA4400034) ||
(VAddr >= 0xA4500000 && VAddr <= 0xA4500014))
(VAddr >= 0xA4500000 && VAddr <= 0xA4500014) ||
(VAddr >= 0xA4800000 && VAddr <= 0xA4800018))
{
return;
}
if (VAddr == 0xA4800000)
{
if (!LogSerialInterface())
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_DRAM_ADDR_REG", PC, Value); return;
}
if (VAddr == 0xA4800004)
{
if (LogPRDMAOperations())
{
LogMessage("%08X: A DMA transfer from the PIF RAM has occurred", PC);
}
if (!LogSerialInterface())
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_RD64B_REG", PC, Value); return;
}
if (VAddr == 0xA4800010)
{
if (LogPRDMAOperations())
{
LogMessage("%08X: A DMA transfer to the PIF RAM has occurred", PC);
}
if (!LogSerialInterface())
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_PIF_ADDR_WR64B_REG", PC, Value); return;
}
if (VAddr == 0xA4800018)
{
if (!LogSerialInterface())
{
return;
}
LogMessage("%08X: Writing 0x%08X to SI_STATUS_REG", PC, Value); return;
}
if (VAddr >= 0xBFC007C0 && VAddr <= 0xBFC007FC)
{
if (!LogPRDirectMemStores())

2
Source/Project64-core/N64System/MemoryHandler/AudioInterfaceHandler.h
View File

@ -14,7 +14,7 @@ enum
class AudioInterfaceReg
{
protected:
AudioInterfaceReg(uint32_t * _AudioInterface);
AudioInterfaceReg(uint32_t * Interface);
public:
uint32_t & AI_DRAM_ADDR_REG;

108
Source/Project64-core/N64System/MemoryHandler/SerialInterfaceHandler.cpp Normal file
View File

@ -0,0 +1,108 @@
#include "stdafx.h"
#include "SerialInterfaceHandler.h"
#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
#include <Project64-core\N64System\Mips\Register.h>
#include <Project64-core\N64System\SystemGlobals.h>
SerialInterfaceReg::SerialInterfaceReg(uint32_t * Interface) :
SI_DRAM_ADDR_REG(Interface[0]),
SI_PIF_ADDR_RD64B_REG(Interface[1]),
SI_PIF_ADDR_WR64B_REG(Interface[2]),
SI_STATUS_REG(Interface[3])
{
}
SerialInterfaceHandler::SerialInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg) :
SerialInterfaceReg(Reg.m_SerialInterface),
MIPSInterfaceReg(Reg.m_Mips_Interface),
m_MMU(MMU),
m_Reg(Reg),
m_PC(Reg.m_PROGRAM_COUNTER)
{
}
bool SerialInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{
switch (Address & 0x1FFFFFFF)
{
case 0x04800018: Value = SI_STATUS_REG; break;
default:
Value = 0;
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
if (LogSerialInterface())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04800000: LogMessage("%08X: read from SI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04800004: LogMessage("%08X: read from SI_PIF_ADDR_RD64B_REG (%08X)", m_PC, Value); break;
case 0xA4800010: LogMessage("%08X: read from SI_PIF_ADDR_WR64B_REG (%08X)", m_PC, Value); break;
case 0x04800018: LogMessage("%08X: read from SI_STATUS_REG (%08X)", m_PC, Value); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
return true;
}
bool SerialInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
{
if (GenerateLog())
{
if (LogSerialInterface())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04800000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04800004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_RD64B_REG", m_PC, Value, Mask); break;
case 0x04800010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_PIF_ADDR_WR64B_REG", m_PC, Value, Mask); break;
case 0x04800018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SI_STATUS_REG", m_PC, Value, Mask); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
if (LogPRDMAOperations())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04800004: LogMessage("%08X: A DMA transfer from the PIF RAM has occurred", m_PC); break;
case 0x04800010: LogMessage("%08X: A DMA transfer to the PIF RAM has occurred", m_PC); break;
}
}
}
uint32_t MaskedValue = Value & Mask;
switch (Address & 0x1FFFFFFF)
{
case 0x04800000: SI_DRAM_ADDR_REG = (SI_DRAM_ADDR_REG & ~Mask) | (MaskedValue); break;
case 0x04800004:
SI_PIF_ADDR_RD64B_REG = (SI_PIF_ADDR_RD64B_REG & ~Mask) | (MaskedValue);
m_MMU.SI_DMA_READ();
break;
case 0x04800010:
SI_PIF_ADDR_WR64B_REG = (SI_PIF_ADDR_WR64B_REG & ~Mask) | (MaskedValue);
m_MMU.SI_DMA_WRITE();
break;
case 0x04800018:
MI_INTR_REG &= ~MI_INTR_SI;
m_Reg.SI_STATUS_REG &= ~SI_STATUS_INTERRUPT;
m_Reg.CheckInterrupts();
break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
return true;
}

57
Source/Project64-core/N64System/MemoryHandler/SerialInterfaceHandler.h Normal file
View File

@ -0,0 +1,57 @@
#pragma once
#include "MemoryHandler.h"
#include "MIPSInterfaceHandler.h"
#include <Project64-core\Settings\DebugSettings.h>
#include <Project64-core\Logging.h>
#include <stdint.h>
enum
{
SI_STATUS_DMA_BUSY = 0x0001,
SI_STATUS_RD_BUSY = 0x0002,
SI_STATUS_DMA_ERROR = 0x0008,
SI_STATUS_INTERRUPT = 0x1000,
};
class SerialInterfaceReg
{
protected:
SerialInterfaceReg(uint32_t * Interface);
public:
uint32_t & SI_DRAM_ADDR_REG;
uint32_t & SI_PIF_ADDR_RD64B_REG;
uint32_t & SI_PIF_ADDR_WR64B_REG;
uint32_t & SI_STATUS_REG;
private:
SerialInterfaceReg();
SerialInterfaceReg(const SerialInterfaceReg&);
SerialInterfaceReg& operator=(const SerialInterfaceReg&);
};
class CMipsMemoryVM;
class CRegisters;
class SerialInterfaceHandler :
public MemoryHandler,
public SerialInterfaceReg,
private MIPSInterfaceReg,
private CDebugSettings,
private CLogging
{
public:
SerialInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg);
bool Read32(uint32_t Address, uint32_t & Value);
bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
private:
SerialInterfaceHandler();
SerialInterfaceHandler(const SerialInterfaceHandler &);
SerialInterfaceHandler & operator=(const SerialInterfaceHandler &);
CMipsMemoryVM & m_MMU;
CRegisters & m_Reg;
uint32_t & m_PC;
};

17
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -34,6 +34,7 @@ CMipsMemoryVM::CMipsMemoryVM(CN64System & System, bool SavesReadOnly) :
m_MIPSInterfaceHandler(System.m_Reg),
m_PeripheralInterfaceHandler(*this, System.m_Reg),
m_RDRAMInterfaceHandler(System.m_Reg),
m_SerialInterfaceHandler(*this, System.m_Reg),
m_SPRegistersHandler(System, *this, System.m_Reg),
m_VideoInterfaceHandler(System, *this, System.m_Reg),
m_Rom(nullptr),
@ -649,7 +650,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
case 0x04500000: m_AudioInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
case 0x04600000: m_PeripheralInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
case 0x04700000: m_RDRAMInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
case 0x04800000: Load32SerialInterface(); break;
case 0x04800000: m_SerialInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
case 0x05000000: Load32CartridgeDomain2Address1(); break;
case 0x06000000: Load32CartridgeDomain1Address1(); break;
case 0x08000000: Load32CartridgeDomain2Address2(); break;
@ -1086,20 +1087,6 @@ void CMipsMemoryVM::ChangeMiIntrMask()
}
}
void CMipsMemoryVM::Load32SerialInterface(void)
{
switch (m_MemLookupAddress & 0x1FFFFFFF)
{
case 0x04800018: m_MemLookupValue.UW[0] = g_Reg->SI_STATUS_REG; break;
default:
m_MemLookupValue.UW[0] = 0;
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CMipsMemoryVM::Load32CartridgeDomain1Address1(void)
{
// 64DD IPL ROM

4
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -45,7 +45,7 @@ class CArmRecompilerOps;
class CMipsMemoryVM :
public CTransVaddr,
private R4300iOp,
private CPifRam,
public CPifRam,
private CFlashram,
private CSram,
public CDMA,
@ -140,7 +140,6 @@ private:
bool SH_NonMemory(uint32_t PAddr, uint16_t Value);
bool SW_NonMemory(uint32_t PAddr, uint32_t Value);
static void Load32SerialInterface(void);
static void Load32CartridgeDomain1Address1(void);
static void Load32CartridgeDomain1Address3(void);
static void Load32CartridgeDomain2Address1(void);
@ -184,6 +183,7 @@ private:
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
RDRAMRegistersHandler m_RDRAMRegistersHandler;
SerialInterfaceHandler m_SerialInterfaceHandler;
SPRegistersHandler m_SPRegistersHandler;
VideoInterfaceHandler m_VideoInterfaceHandler;
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;

10
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -87,14 +87,6 @@ DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
{
}
Serial_InterfaceReg::Serial_InterfaceReg(uint32_t * SerialInterface) :
SI_DRAM_ADDR_REG(SerialInterface[0]),
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
SI_PIF_ADDR_WR64B_REG(SerialInterface[2]),
SI_STATUS_REG(SerialInterface[3])
{
}
Disk_InterfaceReg::Disk_InterfaceReg(uint32_t * DiskInterface) :
ASIC_DATA(DiskInterface[0]),
ASIC_MISC_REG(DiskInterface[1]),
@ -131,7 +123,7 @@ CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) :
RDRAMInterfaceReg(m_RDRAM_Interface),
SPRegistersReg(m_SigProcessor_Interface),
DisplayControlReg(m_Display_ControlReg),
Serial_InterfaceReg(m_SerialInterface),
SerialInterfaceReg(m_SerialInterface),
Disk_InterfaceReg(m_DiskInterface),
m_System(System),
m_SystemEvents(SystemEvents)

29
Source/Project64-core/N64System/Mips/Register.h
View File

@ -8,6 +8,7 @@
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\RDRAMRegistersHandler.h>
#include <Project64-core\N64System\MemoryHandler\SerialInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
#include <Project64-core\N64System\MemoryHandler\VideoInterfaceHandler.h>
#include <Project64-core\Settings\DebugSettings.h>
@ -221,32 +222,6 @@ enum
PI_CLR_INTR = 0x02,
};
class Serial_InterfaceReg
{
protected:
Serial_InterfaceReg (uint32_t * SerialInterface);
public:
uint32_t & SI_DRAM_ADDR_REG;
uint32_t & SI_PIF_ADDR_RD64B_REG;
uint32_t & SI_PIF_ADDR_WR64B_REG;
uint32_t & SI_STATUS_REG;
private:
Serial_InterfaceReg();
Serial_InterfaceReg(const Serial_InterfaceReg&);
Serial_InterfaceReg& operator=(const Serial_InterfaceReg&);
};
// Serial interface flags
enum
{
SI_STATUS_DMA_BUSY = 0x0001,
SI_STATUS_RD_BUSY = 0x0002,
SI_STATUS_DMA_ERROR = 0x0008,
SI_STATUS_INTERRUPT = 0x1000,
};
// Disk interface
class Disk_InterfaceReg
{
@ -357,7 +332,7 @@ class CRegisters :
public RDRAMInterfaceReg,
public SPRegistersReg,
public DisplayControlReg,
public Serial_InterfaceReg,
public SerialInterfaceReg,
public Disk_InterfaceReg
{
public:

2
Source/Project64-core/Project64-core.vcxproj
View File

@ -59,6 +59,7 @@
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\RDRAMRegistersHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\SerialInterfaceHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\VideoInterfaceHandler.cpp" />
<ClCompile Include="N64System\Mips\Disk.cpp" />
@ -162,6 +163,7 @@
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h" />
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
<ClInclude Include="N64System\MemoryHandler\RDRAMRegistersHandler.h" />
<ClInclude Include="N64System\MemoryHandler\SerialInterfaceHandler.h" />
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h" />
<ClInclude Include="N64System\MemoryHandler\VideoInterfaceHandler.h" />
<ClInclude Include="N64System\Mips\Disk.h" />

6
Source/Project64-core/Project64-core.vcxproj.filters
View File

@ -378,6 +378,9 @@
<ClCompile Include="N64System\MemoryHandler\AudioInterfaceHandler.cpp">
<Filter>Source Files\N64 System\MemoryHandler</Filter>
</ClCompile>
<ClCompile Include="N64System\MemoryHandler\SerialInterfaceHandler.cpp">
<Filter>Source Files\N64 System\MemoryHandler</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="stdafx.h">
@ -722,6 +725,9 @@
<ClInclude Include="N64System\MemoryHandler\AudioInterfaceHandler.h">
<Filter>Header Files\N64 System\MemoryHandler</Filter>
</ClInclude>
<ClInclude Include="N64System\MemoryHandler\SerialInterfaceHandler.h">
<Filter>Header Files\N64 System\MemoryHandler</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<None Include="Version.h.in">