Core: Create Memory handler for SP Registers
This commit is contained in:
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e60f7ec648
commit
2b008cc278
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@ -64,35 +64,8 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr)
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{
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return;
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}
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if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
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{
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if (!LogSPRegisters())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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switch (VAddr)
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{
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case 0xA4040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)", PC, Value); break;
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case 0xA4040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)", PC, Value); break;
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case 0xA4040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)", PC, Value); break;
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case 0xA404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)", PC, Value); break;
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case 0xA4040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)", PC, Value); break;
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case 0xA4040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)", PC, Value); break;
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case 0xA4040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)", PC, Value); break;
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case 0xA404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)", PC, Value); break;
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}
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return;
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}
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if (VAddr == 0xA4080000)
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{
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if (!LogSPRegisters())
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{
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return;
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}
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g_MMU->LW_VAddr(VAddr, Value);
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LogMessage("%08X: read from SP_PC (%08X)", PC, Value);
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return;
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}
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if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
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@ -311,29 +284,11 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
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if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
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{
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if (!LogSPRegisters())
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{
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return;
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}
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switch (VAddr)
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{
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case 0xA4040000: LogMessage("%08X: Writing 0x%08X to SP_MEM_ADDR_REG", PC, Value); return;
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case 0xA4040004: LogMessage("%08X: Writing 0x%08X to SP_DRAM_ADDR_REG", PC, Value); return;
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case 0xA4040008: LogMessage("%08X: Writing 0x%08X to SP_RD_LEN_REG", PC, Value); return;
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case 0xA404000C: LogMessage("%08X: Writing 0x%08X to SP_WR_LEN_REG", PC, Value); return;
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case 0xA4040010: LogMessage("%08X: Writing 0x%08X to SP_STATUS_REG", PC, Value); return;
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case 0xA4040014: LogMessage("%08X: Writing 0x%08X to SP_DMA_FULL_REG", PC, Value); return;
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case 0xA4040018: LogMessage("%08X: Writing 0x%08X to SP_DMA_BUSY_REG", PC, Value); return;
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case 0xA404001C: LogMessage("%08X: Writing 0x%08X to SP_SEMAPHORE_REG", PC, Value); return;
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}
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return;
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}
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if (VAddr == 0xA4080000)
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{
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if (!LogSPRegisters())
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{
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return;
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}
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LogMessage("%08X: Writing 0x%08X to SP_PC", PC, Value); return;
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return;
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}
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if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
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@ -0,0 +1,158 @@
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#include "stdafx.h"
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#include "SPRegistersHandler.h"
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#include <Project64-core\N64System\N64System.h>
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#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
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#include <Project64-core\N64System\Mips\Register.h>
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#include <Project64-core\N64System\SystemGlobals.h>
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SPRegistersReg::SPRegistersReg(uint32_t * SignalProcessorInterface) :
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SP_MEM_ADDR_REG(SignalProcessorInterface[0]),
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SP_DRAM_ADDR_REG(SignalProcessorInterface[1]),
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SP_RD_LEN_REG(SignalProcessorInterface[2]),
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SP_WR_LEN_REG(SignalProcessorInterface[3]),
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SP_STATUS_REG(SignalProcessorInterface[4]),
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SP_DMA_FULL_REG(SignalProcessorInterface[5]),
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SP_DMA_BUSY_REG(SignalProcessorInterface[6]),
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SP_SEMAPHORE_REG(SignalProcessorInterface[7]),
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SP_PC_REG(SignalProcessorInterface[8]),
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SP_IBIST_REG(SignalProcessorInterface[9])
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{
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}
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SPRegistersHandler::SPRegistersHandler(CN64System & System, CMipsMemoryVM & MMU, CRegisters & Reg) :
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SPRegistersReg(Reg.m_SigProcessor_Interface),
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m_System(System),
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m_MMU(MMU),
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m_Reg(Reg),
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m_RspIntrReg(Reg.m_RspIntrReg),
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m_PC(Reg.m_PROGRAM_COUNTER)
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{
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}
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bool SPRegistersHandler::Read32(uint32_t Address, uint32_t & Value)
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04040010: Value = SP_STATUS_REG; break;
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case 0x04040014: Value = SP_DMA_FULL_REG; break;
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case 0x04040018: Value = SP_DMA_BUSY_REG; break;
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case 0x0404001C:
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Value = SP_SEMAPHORE_REG;
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SP_SEMAPHORE_REG = 1;
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break;
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case 0x04080000: Value = SP_PC_REG; break;
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default:
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Value = 0;
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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if (LogSPRegisters())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)", m_PC, Value); break;
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case 0x04040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
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case 0x04040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)", m_PC, Value); break;
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case 0x0404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)", m_PC, Value); break;
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case 0x04040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)", m_PC, Value); break;
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case 0x04040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)", m_PC, Value); break;
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case 0x04040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)", m_PC, Value); break;
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case 0x0404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)", m_PC, Value); break;
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case 0x04080000: LogMessage("%08X: read from SP_PC (%08X)", m_PC, Value); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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return true;
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}
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bool SPRegistersHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
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{
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if (LogSPRegisters())
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{
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04040000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_MEM_ADDR_REG", m_PC, Value, Mask); break;
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case 0x04040004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DRAM_ADDR_REG", m_PC, Value, Mask); break;
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case 0x04040008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_RD_LEN_REG", m_PC, Value, Mask); break;
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case 0x0404000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_WR_LEN_REG", m_PC, Value, Mask); break;
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case 0x04040010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_STATUS_REG", m_PC, Value, Mask); break;
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case 0x04040014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_FULL_REG", m_PC, Value, Mask); break;
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case 0x04040018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_BUSY_REG", m_PC, Value, Mask); break;
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case 0x0404001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_SEMAPHORE_REG", m_PC, Value, Mask); break;
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case 0x04080000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_PC", m_PC, Value, Mask); break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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uint32_t MaskedValue = Value & Mask;
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switch (Address & 0x1FFFFFFF)
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{
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case 0x04040000: SP_MEM_ADDR_REG = (SP_MEM_ADDR_REG & ~Mask) | (MaskedValue); break;
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case 0x04040004: SP_DRAM_ADDR_REG = (SP_DRAM_ADDR_REG & ~Mask) | (MaskedValue); break;
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case 0x04040008:
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SP_RD_LEN_REG = (SP_RD_LEN_REG & ~Mask) | (MaskedValue);
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m_MMU.SP_DMA_READ();
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break;
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case 0x0404000C:
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SP_WR_LEN_REG = (SP_WR_LEN_REG & ~Mask) | (MaskedValue);
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m_MMU.SP_DMA_WRITE();
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break;
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case 0x04040010:
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if ((MaskedValue & SP_CLR_HALT) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; }
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if ((MaskedValue & SP_SET_HALT) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; }
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if ((MaskedValue & SP_CLR_BROKE) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; }
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if ((MaskedValue & SP_CLR_INTR) != 0)
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{
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m_Reg.MI_INTR_REG &= ~MI_INTR_SP;
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m_RspIntrReg &= ~MI_INTR_SP;
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m_Reg.CheckInterrupts();
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}
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if ((MaskedValue & SP_SET_INTR) != 0) { if (HaveDebugger()) { g_Notify->DisplayError("SP_SET_INTR"); } }
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if ((MaskedValue & SP_CLR_SSTEP) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
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if ((MaskedValue & SP_SET_SSTEP) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; }
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if ((MaskedValue & SP_CLR_INTR_BREAK) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
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if ((MaskedValue & SP_SET_INTR_BREAK) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
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if ((MaskedValue & SP_CLR_SIG0) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; }
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if ((MaskedValue & SP_SET_SIG0) != 0) { SP_STATUS_REG |= SP_STATUS_SIG0; }
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if ((MaskedValue & SP_CLR_SIG1) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; }
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if ((MaskedValue & SP_SET_SIG1) != 0) { SP_STATUS_REG |= SP_STATUS_SIG1; }
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if ((MaskedValue & SP_CLR_SIG2) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; }
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if ((MaskedValue & SP_SET_SIG2) != 0) { SP_STATUS_REG |= SP_STATUS_SIG2; }
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if ((MaskedValue & SP_CLR_SIG3) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; }
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if ((MaskedValue & SP_SET_SIG3) != 0) { SP_STATUS_REG |= SP_STATUS_SIG3; }
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if ((MaskedValue & SP_CLR_SIG4) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; }
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if ((MaskedValue & SP_SET_SIG4) != 0) { SP_STATUS_REG |= SP_STATUS_SIG4; }
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if ((MaskedValue & SP_CLR_SIG5) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; }
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if ((MaskedValue & SP_SET_SIG5) != 0) { SP_STATUS_REG |= SP_STATUS_SIG5; }
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if ((MaskedValue & SP_CLR_SIG6) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; }
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if ((MaskedValue & SP_SET_SIG6) != 0) { SP_STATUS_REG |= SP_STATUS_SIG6; }
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if ((MaskedValue & SP_CLR_SIG7) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; }
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if ((MaskedValue & SP_SET_SIG7) != 0) { SP_STATUS_REG |= SP_STATUS_SIG7; }
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if ((MaskedValue & SP_SET_SIG0) != 0 && RspAudioSignal())
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{
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m_Reg.MI_INTR_REG |= MI_INTR_SP;
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m_Reg.CheckInterrupts();
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}
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m_System.RunRSP();
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break;
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case 0x0404001C: SP_SEMAPHORE_REG = 0; break;
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case 0x04080000: SP_PC_REG = MaskedValue & 0xFFC; break;
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default:
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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return true;
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}
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@ -0,0 +1,57 @@
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#pragma once
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#include "MemoryHandler.h"
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#include <Project64-core\Settings\GameSettings.h>
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#include <Project64-core\Settings\DebugSettings.h>
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#include <Project64-core\Logging.h>
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#include <stdint.h>
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class SPRegistersReg
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{
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protected:
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SPRegistersReg(uint32_t * SignalProcessorInterface);
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public:
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uint32_t & SP_MEM_ADDR_REG;
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uint32_t & SP_DRAM_ADDR_REG;
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uint32_t & SP_RD_LEN_REG;
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uint32_t & SP_WR_LEN_REG;
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uint32_t & SP_STATUS_REG;
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uint32_t & SP_DMA_FULL_REG;
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uint32_t & SP_DMA_BUSY_REG;
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uint32_t & SP_SEMAPHORE_REG;
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uint32_t & SP_PC_REG;
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uint32_t & SP_IBIST_REG;
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private:
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SPRegistersReg();
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SPRegistersReg(const SPRegistersReg&);
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SPRegistersReg& operator=(const SPRegistersReg&);
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};
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class CRegisters;
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class CMipsMemoryVM;
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class CN64System;
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class SPRegistersHandler :
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public MemoryHandler,
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public SPRegistersReg,
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private CGameSettings,
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private CDebugSettings,
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private CLogging
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{
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public:
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SPRegistersHandler(CN64System & N64System, CMipsMemoryVM & MMU, CRegisters & Reg);
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bool Read32(uint32_t Address, uint32_t & Value);
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bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
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private:
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SPRegistersHandler();
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SPRegistersHandler(const SPRegistersHandler &);
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SPRegistersHandler & operator=(const SPRegistersHandler &);
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CN64System & m_System;
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CMipsMemoryVM & m_MMU;
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CRegisters & m_Reg;
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uint32_t & m_RspIntrReg;
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uint32_t & m_PC;
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};
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@ -21,7 +21,7 @@ uint32_t CMipsMemoryVM::RegModValue;
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#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
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CMipsMemoryVM::CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly) :
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CMipsMemoryVM::CMipsMemoryVM(CN64System & System, CRegisters & Reg, bool SavesReadOnly) :
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CPifRam(SavesReadOnly),
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CFlashram(SavesReadOnly),
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CSram(SavesReadOnly),
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@ -30,6 +30,7 @@ CMipsMemoryVM::CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly) :
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m_RomMapped(false),
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m_PeripheralInterfaceHandler(*this, Reg),
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m_RDRAMInterfaceHandler(Reg),
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m_SPRegistersHandler(System, *this, Reg),
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m_Rom(nullptr),
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m_RomSize(0),
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m_RomWrittenTo(false),
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@ -639,7 +640,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
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switch (PAddr & 0xFFF00000)
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{
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case 0x03F00000: Load32RDRAMRegisters(); break;
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case 0x04000000: Load32SPRegisters(); break;
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case 0x04000000: m_SPRegistersHandler.Read32(PAddr, m_MemLookupValue.UW[0]);; break;
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case 0x04100000: Load32DPCommand(); break;
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case 0x04300000: Load32MIPSInterface(); break;
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case 0x04400000: Load32VideoInterface(); break;
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@ -757,7 +758,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
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}
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else
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{
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Write32SPRegisters();
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m_SPRegistersHandler.Write32(PAddr, Value, 0xFFFFFFFF);
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}
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break;
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case 0x04100000: Write32DPCommandRegisters(); break;
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@ -1141,27 +1142,6 @@ void CMipsMemoryVM::Load32RDRAMRegisters(void)
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m_MemLookupValid = true;
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}
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void CMipsMemoryVM::Load32SPRegisters(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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{
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case 0x04040010: m_MemLookupValue.UW[0] = g_Reg->SP_STATUS_REG; break;
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case 0x04040014: m_MemLookupValue.UW[0] = g_Reg->SP_DMA_FULL_REG; break;
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case 0x04040018: m_MemLookupValue.UW[0] = g_Reg->SP_DMA_BUSY_REG; break;
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case 0x0404001C:
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m_MemLookupValue.UW[0] = g_Reg->SP_SEMAPHORE_REG;
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g_Reg->SP_SEMAPHORE_REG = 1;
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break;
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case 0x04080000: m_MemLookupValue.UW[0] = g_Reg->SP_PC_REG; break;
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default:
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m_MemLookupValue.UW[0] = 0;
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if (HaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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}
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void CMipsMemoryVM::Load32DPCommand(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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@ -1454,154 +1434,6 @@ void CMipsMemoryVM::Write32RDRAMRegisters(void)
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}
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}
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void CMipsMemoryVM::Write32SPRegisters(void)
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{
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switch ((m_MemLookupAddress & 0xFFFFFFF))
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{
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case 0x04040000: g_Reg->SP_MEM_ADDR_REG = m_MemLookupValue.UW[0]; break;
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case 0x04040004: g_Reg->SP_DRAM_ADDR_REG = m_MemLookupValue.UW[0]; break;
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case 0x04040008:
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g_Reg->SP_RD_LEN_REG = m_MemLookupValue.UW[0];
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g_MMU->SP_DMA_READ();
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break;
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case 0x0404000C:
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g_Reg->SP_WR_LEN_REG = m_MemLookupValue.UW[0];
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g_MMU->SP_DMA_WRITE();
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break;
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case 0x04040010:
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_HALT) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_HALT;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_HALT) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_HALT;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_BROKE) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_INTR) != 0)
|
||||
{
|
||||
g_Reg->MI_INTR_REG &= ~MI_INTR_SP;
|
||||
g_Reg->m_RspIntrReg &= ~MI_INTR_SP;
|
||||
g_Reg->CheckInterrupts();
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_INTR) != 0)
|
||||
{
|
||||
g_Notify->DisplayError("SP_SET_INTR");
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SSTEP) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SSTEP) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SSTEP;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_INTR_BREAK) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_INTR_BREAK) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG0) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG0) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG0;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG1) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG1) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG1;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG2) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG2) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG2;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG3) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG3) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG3;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG4) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG4) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG4;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG5) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG5) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG5;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG6) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG6) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG6;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG7) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG7) != 0)
|
||||
{
|
||||
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG7;
|
||||
}
|
||||
if ((m_MemLookupValue.UW[0] & SP_SET_SIG0) != 0 && g_System->RspAudioSignal())
|
||||
{
|
||||
g_Reg->MI_INTR_REG |= MI_INTR_SP;
|
||||
g_Reg->CheckInterrupts();
|
||||
}
|
||||
//if (*( uint32_t *)(DMEM + 0xFC0) == 1)
|
||||
//{
|
||||
// ChangeTimer(RspTimer,0x30000);
|
||||
//}
|
||||
//else
|
||||
//{
|
||||
try
|
||||
{
|
||||
g_System->RunRSP();
|
||||
}
|
||||
catch (...)
|
||||
{
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
}
|
||||
//}
|
||||
break;
|
||||
case 0x0404001C: g_Reg->SP_SEMAPHORE_REG = 0; break;
|
||||
case 0x04080000: g_Reg->SP_PC_REG = m_MemLookupValue.UW[0] & 0xFFC; break;
|
||||
default:
|
||||
if (HaveDebugger())
|
||||
{
|
||||
g_Notify->BreakPoint(__FILE__, __LINE__);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void CMipsMemoryVM::Write32DPCommandRegisters(void)
|
||||
{
|
||||
switch ((m_MemLookupAddress & 0xFFFFFFF))
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
#include <Project64-core\N64System\Mips\Dma.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
|
||||
#include <Project64-core\Settings\GameSettings.h>
|
||||
|
||||
#ifdef __arm__
|
||||
|
@ -47,7 +48,7 @@ class CMipsMemoryVM :
|
|||
private CGameSettings
|
||||
{
|
||||
public:
|
||||
CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly);
|
||||
CMipsMemoryVM(CN64System & System, CRegisters & Reg, bool SavesReadOnly);
|
||||
~CMipsMemoryVM();
|
||||
|
||||
static void ReserveMemory();
|
||||
|
@ -134,7 +135,6 @@ private:
|
|||
bool SW_NonMemory(uint32_t PAddr, uint32_t Value);
|
||||
|
||||
static void Load32RDRAMRegisters(void);
|
||||
static void Load32SPRegisters(void);
|
||||
static void Load32DPCommand(void);
|
||||
static void Load32MIPSInterface(void);
|
||||
static void Load32VideoInterface(void);
|
||||
|
@ -148,7 +148,6 @@ private:
|
|||
static void Load32Rom(void);
|
||||
|
||||
static void Write32RDRAMRegisters(void);
|
||||
static void Write32SPRegisters(void);
|
||||
static void Write32DPCommandRegisters(void);
|
||||
static void Write32MIPSInterface(void);
|
||||
static void Write32VideoInterface(void);
|
||||
|
@ -186,6 +185,7 @@ private:
|
|||
CRegisters & m_Reg;
|
||||
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
|
||||
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
|
||||
SPRegistersHandler m_SPRegistersHandler;
|
||||
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
|
||||
uint32_t m_AllocatedRdramSize;
|
||||
bool m_RomMapped;
|
||||
|
|
|
@ -149,20 +149,6 @@ DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
|
|||
{
|
||||
}
|
||||
|
||||
SigProcessor_InterfaceReg::SigProcessor_InterfaceReg(uint32_t * _SignalProcessorInterface) :
|
||||
SP_MEM_ADDR_REG(_SignalProcessorInterface[0]),
|
||||
SP_DRAM_ADDR_REG(_SignalProcessorInterface[1]),
|
||||
SP_RD_LEN_REG(_SignalProcessorInterface[2]),
|
||||
SP_WR_LEN_REG(_SignalProcessorInterface[3]),
|
||||
SP_STATUS_REG(_SignalProcessorInterface[4]),
|
||||
SP_DMA_FULL_REG(_SignalProcessorInterface[5]),
|
||||
SP_DMA_BUSY_REG(_SignalProcessorInterface[6]),
|
||||
SP_SEMAPHORE_REG(_SignalProcessorInterface[7]),
|
||||
SP_PC_REG(_SignalProcessorInterface[8]),
|
||||
SP_IBIST_REG(_SignalProcessorInterface[9])
|
||||
{
|
||||
}
|
||||
|
||||
Serial_InterfaceReg::Serial_InterfaceReg(uint32_t * SerialInterface) :
|
||||
SI_DRAM_ADDR_REG(SerialInterface[0]),
|
||||
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
|
||||
|
@ -205,7 +191,7 @@ CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) :
|
|||
AudioInterfaceReg(m_Audio_Interface),
|
||||
PeripheralInterfaceReg(m_Peripheral_Interface),
|
||||
RDRAMInterfaceReg(m_RDRAM_Interface),
|
||||
SigProcessor_InterfaceReg(m_SigProcessor_Interface),
|
||||
SPRegistersReg(m_SigProcessor_Interface),
|
||||
DisplayControlReg(m_Display_ControlReg),
|
||||
Serial_InterfaceReg(m_SerialInterface),
|
||||
Disk_InterfaceReg(m_DiskInterface),
|
||||
|
|
|
@ -4,6 +4,7 @@
|
|||
#include <Project64-core\N64System\N64Types.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
|
||||
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
|
||||
#include <Project64-core\Settings\DebugSettings.h>
|
||||
#include <Project64-core\Settings\GameSettings.h>
|
||||
#include <Project64-core\Logging.h>
|
||||
|
@ -313,31 +314,6 @@ enum
|
|||
AI_STATUS_DMA_BUSY = 0x40000000, // Bit 30: Busy
|
||||
};
|
||||
|
||||
|
||||
// Signal processor interface
|
||||
class SigProcessor_InterfaceReg
|
||||
{
|
||||
protected:
|
||||
SigProcessor_InterfaceReg (uint32_t * _SignalProcessorInterface);
|
||||
|
||||
public:
|
||||
uint32_t & SP_MEM_ADDR_REG;
|
||||
uint32_t & SP_DRAM_ADDR_REG;
|
||||
uint32_t & SP_RD_LEN_REG;
|
||||
uint32_t & SP_WR_LEN_REG;
|
||||
uint32_t & SP_STATUS_REG;
|
||||
uint32_t & SP_DMA_FULL_REG;
|
||||
uint32_t & SP_DMA_BUSY_REG;
|
||||
uint32_t & SP_SEMAPHORE_REG;
|
||||
uint32_t & SP_PC_REG;
|
||||
uint32_t & SP_IBIST_REG;
|
||||
|
||||
private:
|
||||
SigProcessor_InterfaceReg();
|
||||
SigProcessor_InterfaceReg(const SigProcessor_InterfaceReg&);
|
||||
SigProcessor_InterfaceReg& operator=(const SigProcessor_InterfaceReg&);
|
||||
};
|
||||
|
||||
// Signal processor interface flags
|
||||
enum
|
||||
{
|
||||
|
@ -529,7 +505,7 @@ class CRegisters :
|
|||
public AudioInterfaceReg,
|
||||
public PeripheralInterfaceReg,
|
||||
public RDRAMInterfaceReg,
|
||||
public SigProcessor_InterfaceReg,
|
||||
public SPRegistersReg,
|
||||
public DisplayControlReg,
|
||||
public Serial_InterfaceReg,
|
||||
public Disk_InterfaceReg
|
||||
|
|
|
@ -30,7 +30,7 @@ CN64System::CN64System(CPlugins * Plugins, uint32_t randomizer_seed, bool SavesR
|
|||
m_Plugins(Plugins),
|
||||
m_SyncCPU(nullptr),
|
||||
m_SyncPlugins(nullptr),
|
||||
m_MMU_VM(m_Reg, SavesReadOnly),
|
||||
m_MMU_VM(*this, m_Reg, SavesReadOnly),
|
||||
//m_Cheats(m_MMU_VM),
|
||||
m_TLB(this),
|
||||
m_Reg(this, this),
|
||||
|
|
|
@ -55,6 +55,7 @@
|
|||
<ClCompile Include="N64System\Interpreter\InterpreterOps32.cpp" />
|
||||
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp" />
|
||||
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
|
||||
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp" />
|
||||
<ClCompile Include="N64System\Mips\Audio.cpp" />
|
||||
<ClCompile Include="N64System\Mips\Disk.cpp" />
|
||||
<ClCompile Include="N64System\Mips\Dma.cpp" />
|
||||
|
@ -153,6 +154,7 @@
|
|||
<ClInclude Include="N64System\MemoryHandler\MemoryHandler.h" />
|
||||
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h" />
|
||||
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
|
||||
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h" />
|
||||
<ClInclude Include="N64System\Mips\Audio.h" />
|
||||
<ClInclude Include="N64System\Mips\Disk.h" />
|
||||
<ClInclude Include="N64System\Mips\Dma.h" />
|
||||
|
|
|
@ -363,6 +363,9 @@
|
|||
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp">
|
||||
<Filter>Source Files\N64 System\MemoryHandler</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp">
|
||||
<Filter>Source Files\N64 System\MemoryHandler</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="stdafx.h">
|
||||
|
@ -692,6 +695,9 @@
|
|||
<ClInclude Include="N64System\Recompiler\Recompiler.h">
|
||||
<Filter>Header Files\N64 System\Recompiler</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h">
|
||||
<Filter>Header Files\N64 System\MemoryHandler</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<None Include="Version.h.in">
|
||||
|
|
Loading…
Reference in New Issue