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Core: Create Memory handler for SP Registers

This commit is contained in:
zilmar 2022-01-24 23:13:10 +10:30
parent e60f7ec648
commit 2b008cc278
10 changed files with 236 additions and 264 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

49
Source/Project64-core/Logging.cpp
View File

@ -64,35 +64,8 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr)
{
return;
}
if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
{
if (!LogSPRegisters())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)", PC, Value); break;
case 0xA4040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)", PC, Value); break;
case 0xA4040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)", PC, Value); break;
case 0xA404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)", PC, Value); break;
case 0xA4040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)", PC, Value); break;
case 0xA4040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)", PC, Value); break;
case 0xA4040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)", PC, Value); break;
case 0xA404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)", PC, Value); break;
}
return;
}
if (VAddr == 0xA4080000)
{
if (!LogSPRegisters())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
LogMessage("%08X: read from SP_PC (%08X)", PC, Value);
return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)
@ -311,29 +284,11 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
if (VAddr >= 0xA4040000 && VAddr <= 0xA404001C)
{
if (!LogSPRegisters())
{
return;
}
switch (VAddr)
{
case 0xA4040000: LogMessage("%08X: Writing 0x%08X to SP_MEM_ADDR_REG", PC, Value); return;
case 0xA4040004: LogMessage("%08X: Writing 0x%08X to SP_DRAM_ADDR_REG", PC, Value); return;
case 0xA4040008: LogMessage("%08X: Writing 0x%08X to SP_RD_LEN_REG", PC, Value); return;
case 0xA404000C: LogMessage("%08X: Writing 0x%08X to SP_WR_LEN_REG", PC, Value); return;
case 0xA4040010: LogMessage("%08X: Writing 0x%08X to SP_STATUS_REG", PC, Value); return;
case 0xA4040014: LogMessage("%08X: Writing 0x%08X to SP_DMA_FULL_REG", PC, Value); return;
case 0xA4040018: LogMessage("%08X: Writing 0x%08X to SP_DMA_BUSY_REG", PC, Value); return;
case 0xA404001C: LogMessage("%08X: Writing 0x%08X to SP_SEMAPHORE_REG", PC, Value); return;
}
return;
}
if (VAddr == 0xA4080000)
{
if (!LogSPRegisters())
{
return;
}
LogMessage("%08X: Writing 0x%08X to SP_PC", PC, Value); return;
return;
}
if (VAddr >= 0xA4100000 && VAddr <= 0xA410001C)

158
Source/Project64-core/N64System/MemoryHandler/SPRegistersHandler.cpp Normal file
View File

@ -0,0 +1,158 @@
#include "stdafx.h"
#include "SPRegistersHandler.h"
#include <Project64-core\N64System\N64System.h>
#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
#include <Project64-core\N64System\Mips\Register.h>
#include <Project64-core\N64System\SystemGlobals.h>
SPRegistersReg::SPRegistersReg(uint32_t * SignalProcessorInterface) :
SP_MEM_ADDR_REG(SignalProcessorInterface[0]),
SP_DRAM_ADDR_REG(SignalProcessorInterface[1]),
SP_RD_LEN_REG(SignalProcessorInterface[2]),
SP_WR_LEN_REG(SignalProcessorInterface[3]),
SP_STATUS_REG(SignalProcessorInterface[4]),
SP_DMA_FULL_REG(SignalProcessorInterface[5]),
SP_DMA_BUSY_REG(SignalProcessorInterface[6]),
SP_SEMAPHORE_REG(SignalProcessorInterface[7]),
SP_PC_REG(SignalProcessorInterface[8]),
SP_IBIST_REG(SignalProcessorInterface[9])
{
}
SPRegistersHandler::SPRegistersHandler(CN64System & System, CMipsMemoryVM & MMU, CRegisters & Reg) :
SPRegistersReg(Reg.m_SigProcessor_Interface),
m_System(System),
m_MMU(MMU),
m_Reg(Reg),
m_RspIntrReg(Reg.m_RspIntrReg),
m_PC(Reg.m_PROGRAM_COUNTER)
{
}
bool SPRegistersHandler::Read32(uint32_t Address, uint32_t & Value)
{
switch (Address & 0x1FFFFFFF)
{
case 0x04040010: Value = SP_STATUS_REG; break;
case 0x04040014: Value = SP_DMA_FULL_REG; break;
case 0x04040018: Value = SP_DMA_BUSY_REG; break;
case 0x0404001C:
Value = SP_SEMAPHORE_REG;
SP_SEMAPHORE_REG = 1;
break;
case 0x04080000: Value = SP_PC_REG; break;
default:
Value = 0;
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
if (LogSPRegisters())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04040000: LogMessage("%08X: read from SP_MEM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04040004: LogMessage("%08X: read from SP_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04040008: LogMessage("%08X: read from SP_RD_LEN_REG (%08X)", m_PC, Value); break;
case 0x0404000C: LogMessage("%08X: read from SP_WR_LEN_REG (%08X)", m_PC, Value); break;
case 0x04040010: LogMessage("%08X: read from SP_STATUS_REG (%08X)", m_PC, Value); break;
case 0x04040014: LogMessage("%08X: read from SP_DMA_FULL_REG (%08X)", m_PC, Value); break;
case 0x04040018: LogMessage("%08X: read from SP_DMA_BUSY_REG (%08X)", m_PC, Value); break;
case 0x0404001C: LogMessage("%08X: read from SP_SEMAPHORE_REG (%08X)", m_PC, Value); break;
case 0x04080000: LogMessage("%08X: read from SP_PC (%08X)", m_PC, Value); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
return true;
}
bool SPRegistersHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
{
if (LogSPRegisters())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04040000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_MEM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04040004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04040008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_RD_LEN_REG", m_PC, Value, Mask); break;
case 0x0404000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_WR_LEN_REG", m_PC, Value, Mask); break;
case 0x04040010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_STATUS_REG", m_PC, Value, Mask); break;
case 0x04040014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_FULL_REG", m_PC, Value, Mask); break;
case 0x04040018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_DMA_BUSY_REG", m_PC, Value, Mask); break;
case 0x0404001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_SEMAPHORE_REG", m_PC, Value, Mask); break;
case 0x04080000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to SP_PC", m_PC, Value, Mask); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
uint32_t MaskedValue = Value & Mask;
switch (Address & 0x1FFFFFFF)
{
case 0x04040000: SP_MEM_ADDR_REG = (SP_MEM_ADDR_REG & ~Mask) | (MaskedValue); break;
case 0x04040004: SP_DRAM_ADDR_REG = (SP_DRAM_ADDR_REG & ~Mask) | (MaskedValue); break;
case 0x04040008:
SP_RD_LEN_REG = (SP_RD_LEN_REG & ~Mask) | (MaskedValue);
m_MMU.SP_DMA_READ();
break;
case 0x0404000C:
SP_WR_LEN_REG = (SP_WR_LEN_REG & ~Mask) | (MaskedValue);
m_MMU.SP_DMA_WRITE();
break;
case 0x04040010:
if ((MaskedValue & SP_CLR_HALT) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; }
if ((MaskedValue & SP_SET_HALT) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; }
if ((MaskedValue & SP_CLR_BROKE) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; }
if ((MaskedValue & SP_CLR_INTR) != 0)
{
m_Reg.MI_INTR_REG &= ~MI_INTR_SP;
m_RspIntrReg &= ~MI_INTR_SP;
m_Reg.CheckInterrupts();
}
if ((MaskedValue & SP_SET_INTR) != 0) { if (HaveDebugger()) { g_Notify->DisplayError("SP_SET_INTR"); } }
if ((MaskedValue & SP_CLR_SSTEP) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; }
if ((MaskedValue & SP_SET_SSTEP) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; }
if ((MaskedValue & SP_CLR_INTR_BREAK) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; }
if ((MaskedValue & SP_SET_INTR_BREAK) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; }
if ((MaskedValue & SP_CLR_SIG0) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; }
if ((MaskedValue & SP_SET_SIG0) != 0) { SP_STATUS_REG |= SP_STATUS_SIG0; }
if ((MaskedValue & SP_CLR_SIG1) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; }
if ((MaskedValue & SP_SET_SIG1) != 0) { SP_STATUS_REG |= SP_STATUS_SIG1; }
if ((MaskedValue & SP_CLR_SIG2) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; }
if ((MaskedValue & SP_SET_SIG2) != 0) { SP_STATUS_REG |= SP_STATUS_SIG2; }
if ((MaskedValue & SP_CLR_SIG3) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; }
if ((MaskedValue & SP_SET_SIG3) != 0) { SP_STATUS_REG |= SP_STATUS_SIG3; }
if ((MaskedValue & SP_CLR_SIG4) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; }
if ((MaskedValue & SP_SET_SIG4) != 0) { SP_STATUS_REG |= SP_STATUS_SIG4; }
if ((MaskedValue & SP_CLR_SIG5) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; }
if ((MaskedValue & SP_SET_SIG5) != 0) { SP_STATUS_REG |= SP_STATUS_SIG5; }
if ((MaskedValue & SP_CLR_SIG6) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; }
if ((MaskedValue & SP_SET_SIG6) != 0) { SP_STATUS_REG |= SP_STATUS_SIG6; }
if ((MaskedValue & SP_CLR_SIG7) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; }
if ((MaskedValue & SP_SET_SIG7) != 0) { SP_STATUS_REG |= SP_STATUS_SIG7; }
if ((MaskedValue & SP_SET_SIG0) != 0 && RspAudioSignal())
{
m_Reg.MI_INTR_REG |= MI_INTR_SP;
m_Reg.CheckInterrupts();
}
m_System.RunRSP();
break;
case 0x0404001C: SP_SEMAPHORE_REG = 0; break;
case 0x04080000: SP_PC_REG = MaskedValue & 0xFFC; break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
return true;
}

57
Source/Project64-core/N64System/MemoryHandler/SPRegistersHandler.h Normal file
View File

@ -0,0 +1,57 @@
#pragma once
#include "MemoryHandler.h"
#include <Project64-core\Settings\GameSettings.h>
#include <Project64-core\Settings\DebugSettings.h>
#include <Project64-core\Logging.h>
#include <stdint.h>
class SPRegistersReg
{
protected:
SPRegistersReg(uint32_t * SignalProcessorInterface);
public:
uint32_t & SP_MEM_ADDR_REG;
uint32_t & SP_DRAM_ADDR_REG;
uint32_t & SP_RD_LEN_REG;
uint32_t & SP_WR_LEN_REG;
uint32_t & SP_STATUS_REG;
uint32_t & SP_DMA_FULL_REG;
uint32_t & SP_DMA_BUSY_REG;
uint32_t & SP_SEMAPHORE_REG;
uint32_t & SP_PC_REG;
uint32_t & SP_IBIST_REG;
private:
SPRegistersReg();
SPRegistersReg(const SPRegistersReg&);
SPRegistersReg& operator=(const SPRegistersReg&);
};
class CRegisters;
class CMipsMemoryVM;
class CN64System;
class SPRegistersHandler :
public MemoryHandler,
public SPRegistersReg,
private CGameSettings,
private CDebugSettings,
private CLogging
{
public:
SPRegistersHandler(CN64System & N64System, CMipsMemoryVM & MMU, CRegisters & Reg);
bool Read32(uint32_t Address, uint32_t & Value);
bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
private:
SPRegistersHandler();
SPRegistersHandler(const SPRegistersHandler &);
SPRegistersHandler & operator=(const SPRegistersHandler &);
CN64System & m_System;
CMipsMemoryVM & m_MMU;
CRegisters & m_Reg;
uint32_t & m_RspIntrReg;
uint32_t & m_PC;
};

176
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -21,7 +21,7 @@ uint32_t CMipsMemoryVM::RegModValue;
#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
CMipsMemoryVM::CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly) :
CMipsMemoryVM::CMipsMemoryVM(CN64System & System, CRegisters & Reg, bool SavesReadOnly) :
CPifRam(SavesReadOnly),
CFlashram(SavesReadOnly),
CSram(SavesReadOnly),
@ -30,6 +30,7 @@ CMipsMemoryVM::CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly) :
m_RomMapped(false),
m_PeripheralInterfaceHandler(*this, Reg),
m_RDRAMInterfaceHandler(Reg),
m_SPRegistersHandler(System, *this, Reg),
m_Rom(nullptr),
m_RomSize(0),
m_RomWrittenTo(false),
@ -639,7 +640,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
switch (PAddr & 0xFFF00000)
{
case 0x03F00000: Load32RDRAMRegisters(); break;
case 0x04000000: Load32SPRegisters(); break;
case 0x04000000: m_SPRegistersHandler.Read32(PAddr, m_MemLookupValue.UW[0]);; break;
case 0x04100000: Load32DPCommand(); break;
case 0x04300000: Load32MIPSInterface(); break;
case 0x04400000: Load32VideoInterface(); break;
@ -757,7 +758,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
}
else
{
Write32SPRegisters();
m_SPRegistersHandler.Write32(PAddr, Value, 0xFFFFFFFF);
}
break;
case 0x04100000: Write32DPCommandRegisters(); break;
@ -1141,27 +1142,6 @@ void CMipsMemoryVM::Load32RDRAMRegisters(void)
m_MemLookupValid = true;
}
void CMipsMemoryVM::Load32SPRegisters(void)
{
switch (m_MemLookupAddress & 0x1FFFFFFF)
{
case 0x04040010: m_MemLookupValue.UW[0] = g_Reg->SP_STATUS_REG; break;
case 0x04040014: m_MemLookupValue.UW[0] = g_Reg->SP_DMA_FULL_REG; break;
case 0x04040018: m_MemLookupValue.UW[0] = g_Reg->SP_DMA_BUSY_REG; break;
case 0x0404001C:
m_MemLookupValue.UW[0] = g_Reg->SP_SEMAPHORE_REG;
g_Reg->SP_SEMAPHORE_REG = 1;
break;
case 0x04080000: m_MemLookupValue.UW[0] = g_Reg->SP_PC_REG; break;
default:
m_MemLookupValue.UW[0] = 0;
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CMipsMemoryVM::Load32DPCommand(void)
{
switch (m_MemLookupAddress & 0x1FFFFFFF)
@ -1454,154 +1434,6 @@ void CMipsMemoryVM::Write32RDRAMRegisters(void)
}
}
void CMipsMemoryVM::Write32SPRegisters(void)
{
switch ((m_MemLookupAddress & 0xFFFFFFF))
{
case 0x04040000: g_Reg->SP_MEM_ADDR_REG = m_MemLookupValue.UW[0]; break;
case 0x04040004: g_Reg->SP_DRAM_ADDR_REG = m_MemLookupValue.UW[0]; break;
case 0x04040008:
g_Reg->SP_RD_LEN_REG = m_MemLookupValue.UW[0];
g_MMU->SP_DMA_READ();
break;
case 0x0404000C:
g_Reg->SP_WR_LEN_REG = m_MemLookupValue.UW[0];
g_MMU->SP_DMA_WRITE();
break;
case 0x04040010:
if ((m_MemLookupValue.UW[0] & SP_CLR_HALT) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_HALT;
}
if ((m_MemLookupValue.UW[0] & SP_SET_HALT) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_HALT;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_BROKE) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_BROKE;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_INTR) != 0)
{
g_Reg->MI_INTR_REG &= ~MI_INTR_SP;
g_Reg->m_RspIntrReg &= ~MI_INTR_SP;
g_Reg->CheckInterrupts();
}
if ((m_MemLookupValue.UW[0] & SP_SET_INTR) != 0)
{
g_Notify->DisplayError("SP_SET_INTR");
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SSTEP) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SSTEP;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SSTEP) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SSTEP;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_INTR_BREAK) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK;
}
if ((m_MemLookupValue.UW[0] & SP_SET_INTR_BREAK) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_INTR_BREAK;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG0) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG0;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG0) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG0;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG1) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG1;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG1) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG1;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG2) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG2;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG2) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG2;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG3) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG3;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG3) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG3;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG4) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG4;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG4) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG4;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG5) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG5;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG5) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG5;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG6) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG6;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG6) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG6;
}
if ((m_MemLookupValue.UW[0] & SP_CLR_SIG7) != 0)
{
g_Reg->SP_STATUS_REG &= ~SP_STATUS_SIG7;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG7) != 0)
{
g_Reg->SP_STATUS_REG |= SP_STATUS_SIG7;
}
if ((m_MemLookupValue.UW[0] & SP_SET_SIG0) != 0 && g_System->RspAudioSignal())
{
g_Reg->MI_INTR_REG |= MI_INTR_SP;
g_Reg->CheckInterrupts();
}
//if (*( uint32_t *)(DMEM + 0xFC0) == 1)
//{
// ChangeTimer(RspTimer,0x30000);
//}
//else
//{
try
{
g_System->RunRSP();
}
catch (...)
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
//}
break;
case 0x0404001C: g_Reg->SP_SEMAPHORE_REG = 0; break;
case 0x04080000: g_Reg->SP_PC_REG = m_MemLookupValue.UW[0] & 0xFFC; break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CMipsMemoryVM::Write32DPCommandRegisters(void)
{
switch ((m_MemLookupAddress & 0xFFFFFFF))

6
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -9,6 +9,7 @@
#include <Project64-core\N64System\Mips\Dma.h>
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
#include <Project64-core\Settings\GameSettings.h>
#ifdef __arm__
@ -47,7 +48,7 @@ class CMipsMemoryVM :
private CGameSettings
{
public:
CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly);
CMipsMemoryVM(CN64System & System, CRegisters & Reg, bool SavesReadOnly);
~CMipsMemoryVM();
static void ReserveMemory();
@ -134,7 +135,6 @@ private:
bool SW_NonMemory(uint32_t PAddr, uint32_t Value);
static void Load32RDRAMRegisters(void);
static void Load32SPRegisters(void);
static void Load32DPCommand(void);
static void Load32MIPSInterface(void);
static void Load32VideoInterface(void);
@ -148,7 +148,6 @@ private:
static void Load32Rom(void);
static void Write32RDRAMRegisters(void);
static void Write32SPRegisters(void);
static void Write32DPCommandRegisters(void);
static void Write32MIPSInterface(void);
static void Write32VideoInterface(void);
@ -186,6 +185,7 @@ private:
CRegisters & m_Reg;
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
SPRegistersHandler m_SPRegistersHandler;
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
uint32_t m_AllocatedRdramSize;
bool m_RomMapped;

16
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -149,20 +149,6 @@ DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
{
}
SigProcessor_InterfaceReg::SigProcessor_InterfaceReg(uint32_t * _SignalProcessorInterface) :
SP_MEM_ADDR_REG(_SignalProcessorInterface[0]),
SP_DRAM_ADDR_REG(_SignalProcessorInterface[1]),
SP_RD_LEN_REG(_SignalProcessorInterface[2]),
SP_WR_LEN_REG(_SignalProcessorInterface[3]),
SP_STATUS_REG(_SignalProcessorInterface[4]),
SP_DMA_FULL_REG(_SignalProcessorInterface[5]),
SP_DMA_BUSY_REG(_SignalProcessorInterface[6]),
SP_SEMAPHORE_REG(_SignalProcessorInterface[7]),
SP_PC_REG(_SignalProcessorInterface[8]),
SP_IBIST_REG(_SignalProcessorInterface[9])
{
}
Serial_InterfaceReg::Serial_InterfaceReg(uint32_t * SerialInterface) :
SI_DRAM_ADDR_REG(SerialInterface[0]),
SI_PIF_ADDR_RD64B_REG(SerialInterface[1]),
@ -205,7 +191,7 @@ CRegisters::CRegisters(CN64System * System, CSystemEvents * SystemEvents) :
AudioInterfaceReg(m_Audio_Interface),
PeripheralInterfaceReg(m_Peripheral_Interface),
RDRAMInterfaceReg(m_RDRAM_Interface),
SigProcessor_InterfaceReg(m_SigProcessor_Interface),
SPRegistersReg(m_SigProcessor_Interface),
DisplayControlReg(m_Display_ControlReg),
Serial_InterfaceReg(m_SerialInterface),
Disk_InterfaceReg(m_DiskInterface),

28
Source/Project64-core/N64System/Mips/Register.h
View File

@ -4,6 +4,7 @@
#include <Project64-core\N64System\N64Types.h>
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
#include <Project64-core\Settings\DebugSettings.h>
#include <Project64-core\Settings\GameSettings.h>
#include <Project64-core\Logging.h>
@ -313,31 +314,6 @@ enum
AI_STATUS_DMA_BUSY = 0x40000000, // Bit 30: Busy
};
// Signal processor interface
class SigProcessor_InterfaceReg
{
protected:
SigProcessor_InterfaceReg (uint32_t * _SignalProcessorInterface);
public:
uint32_t & SP_MEM_ADDR_REG;
uint32_t & SP_DRAM_ADDR_REG;
uint32_t & SP_RD_LEN_REG;
uint32_t & SP_WR_LEN_REG;
uint32_t & SP_STATUS_REG;
uint32_t & SP_DMA_FULL_REG;
uint32_t & SP_DMA_BUSY_REG;
uint32_t & SP_SEMAPHORE_REG;
uint32_t & SP_PC_REG;
uint32_t & SP_IBIST_REG;
private:
SigProcessor_InterfaceReg();
SigProcessor_InterfaceReg(const SigProcessor_InterfaceReg&);
SigProcessor_InterfaceReg& operator=(const SigProcessor_InterfaceReg&);
};
// Signal processor interface flags
enum
{
@ -529,7 +505,7 @@ class CRegisters :
public AudioInterfaceReg,
public PeripheralInterfaceReg,
public RDRAMInterfaceReg,
public SigProcessor_InterfaceReg,
public SPRegistersReg,
public DisplayControlReg,
public Serial_InterfaceReg,
public Disk_InterfaceReg

2
Source/Project64-core/N64System/N64System.cpp
View File

@ -30,7 +30,7 @@ CN64System::CN64System(CPlugins * Plugins, uint32_t randomizer_seed, bool SavesR
m_Plugins(Plugins),
m_SyncCPU(nullptr),
m_SyncPlugins(nullptr),
m_MMU_VM(m_Reg, SavesReadOnly),
m_MMU_VM(*this, m_Reg, SavesReadOnly),
//m_Cheats(m_MMU_VM),
m_TLB(this),
m_Reg(this, this),

2
Source/Project64-core/Project64-core.vcxproj
View File

@ -55,6 +55,7 @@
<ClCompile Include="N64System\Interpreter\InterpreterOps32.cpp" />
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp" />
<ClCompile Include="N64System\Mips\Audio.cpp" />
<ClCompile Include="N64System\Mips\Disk.cpp" />
<ClCompile Include="N64System\Mips\Dma.cpp" />
@ -153,6 +154,7 @@
<ClInclude Include="N64System\MemoryHandler\MemoryHandler.h" />
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h" />
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h" />
<ClInclude Include="N64System\Mips\Audio.h" />
<ClInclude Include="N64System\Mips\Disk.h" />
<ClInclude Include="N64System\Mips\Dma.h" />

6
Source/Project64-core/Project64-core.vcxproj.filters
View File

@ -363,6 +363,9 @@
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp">
<Filter>Source Files\N64 System\MemoryHandler</Filter>
</ClCompile>
<ClCompile Include="N64System\MemoryHandler\SPRegistersHandler.cpp">
<Filter>Source Files\N64 System\MemoryHandler</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="stdafx.h">
@ -692,6 +695,9 @@
<ClInclude Include="N64System\Recompiler\Recompiler.h">
<Filter>Header Files\N64 System\Recompiler</Filter>
</ClInclude>
<ClInclude Include="N64System\MemoryHandler\SPRegistersHandler.h">
<Filter>Header Files\N64 System\MemoryHandler</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<None Include="Version.h.in">