ShuriZma
/
project64
mirror of https://github.com/project64/project64.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
4,383 Commits 3 Branches 7 Tags 87 MiB
Commit Graph

577 Commits

Author SHA1 Message Date
zilmar bc8c63389b [Project64] update CArmRecompilerOps::SPECIAL_SUB 2016-11-23 18:45:29 +11:00
zilmar fec180366b [Project64] Update CArmRecompilerOps::SPECIAL_JALR 2016-11-23 18:43:04 +11:00
zilmar 740c13ec79 [Project64] Update CArmRecompilerOps::SPECIAL_JR 2016-11-23 18:39:52 +11:00
zilmar 49dd2a6ad6 [Project64] Implement a case for CArmRecompilerOps::BEQ_Compare 2016-11-23 18:37:14 +11:00
zilmar bceb4792ed [Project64] Add pre op check before an op 2016-11-23 18:34:32 +11:00
zilmar e8a54ffa2d [Project64] Add case in CArmRecompilerOps::LWC1 2016-11-23 18:02:19 +11:00
zilmar a9f613dd7a [Project64] Implement void CArmRecompilerOps::SW() 2016-11-23 18:00:35 +11:00
zilmar 6fdd79189f [Android] implement CArmRecompilerOps::LW 2016-11-23 09:18:23 +11:00
zilmar 6467d0e9f0 [Project64] Add CArmRecompilerOps::LB_KnownAddress 2016-11-23 09:10:15 +11:00
zilmar ba7315922f [Project64] Implement CArmRecompilerOps::LUI 2016-11-23 09:05:12 +11:00
zilmar d4f281a638 [Project64] Make more functions private in CArmRecompilerOps 2016-11-23 09:03:40 +11:00
zilmar 2336fd0fc9 [Project64] Update logging in CArmRegInfo::Map_GPR_32bit 2016-11-23 09:02:55 +11:00
zilmar 5d5b14de47 [Project64] Add CArmRegInfo::operator== 2016-11-23 08:52:05 +11:00
zilmar 94c9cc1848 [Project64] Add CArmRegInfo::UnProtectGPR 2016-11-23 08:48:41 +11:00
zilmar d1a2e29f9b [Project64] Add LogRegisterState when no registers available 2016-11-23 08:47:28 +11:00
zilmar b8985ce815 [Project64] Keep Arm_R11 for temp reg 2016-11-23 08:39:40 +11:00
zilmar 442429b5dc [Project64] Add more variable to map and fix reg for GPR variable 2016-11-23 08:29:11 +11:00
zilmar a8eda0d391 [Project64] Add CArmRegInfo::VariableMapName 2016-11-23 06:28:54 +11:00
Frank-74 c727365afe Fix ROM name displayed if save doesn't exist. 
Fixes #1184
 2016-11-22 19:22:29 +00:00
zilmar 13a1f9fc25 [Project64] fix CArmRecompilerOps::ADDI 2016-11-22 22:40:55 +11:00
zilmar 13fa7446df [Project64] WriteBack_GPR instead of unmap 2016-11-22 22:39:24 +11:00
zilmar 7cf0fe045f [Project64] Update CArmRecompilerOps::JAL 2016-11-22 21:30:05 +11:00
zilmar e6b483ef85 [Project64] Update CArmRecompilerOps::BLEZ_Compare 2016-11-22 21:28:56 +11:00
zilmar c166c307a2 Update CArmRecompilerOps::BEQ_Compare 2016-11-22 21:22:39 +11:00
zilmar b9d21af5b5 [Project64] Update CArmRecompilerOps::BNE_Compare 2016-11-22 21:21:07 +11:00
zilmar 3846cb4515 Remove CDebugSettings from CArmRecompilerOps 2016-11-22 21:18:09 +11:00
zilmar 5ea6c2c0c5 [Projec64] Fix CArmOps::MoveConstToArmReg to use compress value 2016-11-22 21:09:10 +11:00
zilmar 4053bc2286 [Project64] Fix CArmOps::SetJump20 for negative 2016-11-22 21:07:44 +11:00
zilmar a5a1547131 [Project64] Get CArmOps::MoveConstToArmReg to work in IT block 2016-11-22 20:56:36 +11:00
zilmar 3704300b44 [Project64] Update CArmOps::SubConstFromArmReg to have source and dest reg 2016-11-22 20:41:19 +11:00
zilmar e5b260b078 [Project64] Add ArmBreakPoint 2016-11-22 18:09:37 +11:00
zilmar 28e4ba2e8c [Project64] Add CArmOps::ProgressItBlock 2016-11-22 18:06:50 +11:00
zilmar 88fc1130c8 [Project64] Add comment to StoreArmRegToArmRegPointer 2016-11-22 18:04:17 +11:00
zilmar b046831771 [Project64] Add CArmOps::SubArmRegFromArmReg 2016-11-22 18:02:53 +11:00
zilmar abb764d0c4 [Project64] Add CArmOps::StoreArmRegToArmRegPointer 2016-11-22 18:00:45 +11:00
zilmar 7ea5418168 [Project64] Add CArmOps::OrConstToVariable 2016-11-22 17:59:04 +11:00
zilmar e1e82546bb [Project64] Add CArmOps::OrConstToArmReg 2016-11-22 17:57:54 +11:00
zilmar b672cfa21b [Project64] Add CArmOps::MoveArmRegToVariable 2016-11-22 17:56:23 +11:00
zilmar 86d7fbd4b8 [Project64] Add comment to LoadArmRegPointerToArmReg 2016-11-22 17:54:46 +11:00
zilmar 4686ce7127 [Project64] Add LoadArmRegPointerByteToArmReg 2016-11-22 17:53:10 +11:00
zilmar e42cb0f2c7 [Project64] Fix up usage of AndArmRegToArmReg 2016-11-22 17:52:04 +11:00
zilmar afd92fc562 [Project64] Add second source to AndArmRegToArmReg 2016-11-22 17:48:03 +11:00
zilmar beea1d8c27 [Project64] Add AndConstToArmReg 2016-11-22 17:45:07 +11:00
zilmar 0b53e3e584 [Projec64] Add AndConstToVariable 2016-11-22 17:43:59 +11:00
zilmar ae27b59621 [Project64] Rename ArmBranchCompare to ArmCompareType 2016-11-22 17:41:46 +11:00
zilmar dff480d6dc [Android] Add CArmOps::IfBlock 2016-11-22 17:34:47 +11:00
zilmar cb29d3b98e [Android] Add another case to ThumbCompressConst 2016-11-22 07:51:08 +11:00
zilmar de7bfcac28 Merge branch 'master' of https://github.com/project64/project64 2016-11-22 05:16:28 +11:00
zilmar 25a5784623 Merge pull request #1219 from Frank-74/patch-4 
Only delete old save file being saved.
 2016-11-22 04:10:29 +11:00
zilmar 5537ccdc5b Merge pull request #1217 from Frank-74/patch-3 
Fix Save message missing .zip extension.
 2016-11-22 04:06:36 +11:00
Frank-74 2c8e412a66 Only delete old save file being saved. 
Saving compressed file deletes uncompressed save and vice versa.

Also if uncompressed file exists, it loads uncompressed save instead of compressed save.
 2016-11-21 16:33:13 +00:00
Frank-74 ed71cba2bd Fix Uncompressed Saves. 2016-11-21 15:43:36 +00:00
zilmar c96c27674d [Project64] Add some more speed options to fps limitor 2016-11-21 18:17:15 +11:00
zilmar e6200faba1 [Project64] Some code clean up of x86RecompilerOps.cpp 2016-11-21 18:14:47 +11:00
zilmar d2232f9150 [Project64] Add Setting for Setting_PreAllocSyncMem 2016-11-21 18:09:07 +11:00
zilmar 756e3a06df [Project64] Make CArmRecompilerOps friend to CMipsMemoryVM 2016-11-21 18:06:14 +11:00
Frank-74 501ad347aa Fix Save message missing .zip extension. 2016-11-21 05:05:46 +00:00
zilmar fb0a172d56 [Project64] Some code clean up 2016-11-19 06:49:24 +11:00
zilmar 658b9db8aa [Project64] Move check for GetRoundingModel() to base 2016-11-14 18:15:24 +11:00
zilmar e1633bbada [Project64] Use AUTO_PTR instead of std::auto_ptr 2016-10-09 20:44:31 +11:00
zilmar 97f1d8302d [Android] Handle SPECIAL_XOR recompiler case 2016-10-09 20:20:10 +11:00
zilmar 583ae10422 Merge branch 'master' of https://github.com/project64/project64 2016-10-06 23:00:47 +11:00
zilmar 1686e60b26 [Android] Fix CArmRecompilerOps::CompileReadTLBMiss 2016-10-06 22:59:03 +11:00
zilmar 2b3d26d260 Merge pull request #1209 from JunielKatarn/compile_functionmap_x64 
Fixed includes for FunctionMapClass.
 2016-10-05 15:06:11 +11:00
Julio C. Rocha d22fdef0eb Fixed includes for FunctionMapClass. 2016-10-04 20:19:16 -07:00
zilmar a278a2cde6 [Project64] Fix CPU profiling 2016-10-05 06:58:11 +11:00
zilmar fd69ab6b18 [Project64] Add Profiling 2016-10-03 08:46:05 +11:00
zilmar 3be044ba71 [Android] Fix up compilation issues 2016-10-02 07:22:10 +11:00
zilmar bd2d5b507a [Android] in CArmRecompilerOps::CompileInterpterCall load the variable after BeforeCallDirect 2016-10-02 07:05:37 +11:00
zilmar 9a6c8419e9 [Android] Optimize CArmRecompilerOps::UpdateCounters 2016-10-02 07:03:12 +11:00
zilmar c2a960771c [Android] make sure the working reg set is not changed in CArmRecompilerOps::CompileSystemCheck 2016-10-02 07:00:23 +11:00
zilmar f3ebb20bb1 [Android] Have CArmRecompilerOps::CompileExit write back as the working reg set 2016-10-02 06:55:59 +11:00
zilmar 41baaa015b [Android] Get CArmRecompilerOps::CompileCop1Test to use temp registers 2016-10-02 06:54:22 +11:00
zilmar d8bab5ac7f [Android] Push the rest of the register on enter/exit code block 2016-10-02 06:53:18 +11:00
zilmar a302c17a76 [Android] get CArmRecompilerOps::COP1_S_MUL to use register caching 2016-10-01 22:01:58 +10:00
zilmar 56cbe56482 [Android] CArmRecompilerOps::SPECIAL_XOR use register caching 2016-10-01 21:59:52 +10:00
zilmar 4a5ede2287 [Android] get CArmRecompilerOps::SPECIAL_JALR to use dynamic registers 2016-10-01 21:40:58 +10:00
zilmar 8f6ca9c15a [Android[ void CArmRecompilerOps::SPECIAL_JR() 2016-10-01 20:52:33 +10:00
zilmar 75fba4be38 [Android] get CArmRecompilerOps::LWC1 to use reg caching 2016-10-01 20:35:02 +10:00
zilmar b2ebefd767 [Android] fix CArmRecompilerOps::CACHE() 2016-10-01 20:33:17 +10:00
zilmar 047d8b6d84 [Android] Get CArmRecompilerOps::LB to use reg caching 2016-10-01 20:31:35 +10:00
zilmar 6e8b25ecf0 [Android] do not try to unmap reg 0 2016-10-01 20:24:42 +10:00
zilmar b427722113 [Android] Get CArmRecompilerOps::ADDI() to use register caching 2016-10-01 19:05:15 +10:00
zilmar aa241e61a0 [Android] fix CArmRecompilerOps::JAL 2016-10-01 18:40:12 +10:00
zilmar aa6f026e04 [Android] get CArmRecompilerOps::BGEZ_Compare to use reg caching 2016-10-01 18:39:06 +10:00
zilmar db65ab1ef0 [Android] Get CArmRecompilerOps::BLTZ_Compare to use reg caching 2016-10-01 18:38:03 +10:00
zilmar 189e3b25f7 [Android] Get CArmRecompilerOps::BLEZ_Compare to use register caching 2016-10-01 18:33:48 +10:00
zilmar ffd791404d [Android] get CArmRecompilerOps::BGTZ_Compare to use register caching 2016-10-01 18:27:02 +10:00
zilmar ff4093938f [Android] get CArmRecompilerOps::BEQ_Compare to use register caching 2016-10-01 18:16:11 +10:00
zilmar 71875c0d7b [Android] Get CArmRecompilerOps::BNE_Compare to use register caching 2016-10-01 18:12:46 +10:00
zilmar cf698d7076 [Android] Add CArmRegInfo::ResetRegProtection 2016-10-01 17:05:33 +10:00
zilmar 9c8e7309de [Android] Fix up CArmRegInfo::Map_TempReg 2016-10-01 16:55:06 +10:00
zilmar a0b3a02f5f [Android] Fix up CArmRegInfo::UnMap_ArmReg 2016-10-01 16:52:33 +10:00
zilmar 81ebd33304 [Android] Move CArmRegInfo::FreeArmReg and CArmRegInfo::UnMap_AllFPRs 2016-10-01 15:32:01 +10:00
zilmar 516985ba21 [Android] fix up CArmRegInfo::WriteBackRegisters 2016-10-01 15:27:34 +10:00
zilmar 512d2e7825 [Android] Add check for ShouldPushPopReg 2016-10-01 14:38:45 +10:00
zilmar ccf7f7feda [Android[ Add Map_GPR_64bit 2016-10-01 14:22:23 +10:00
zilmar 7701894ef0 [Android] Add Map_GPR_32bit 2016-10-01 13:21:02 +10:00
zilmar 74727e8e39 [Android] Add CArmRegInfo::FixRoundModel 2016-10-01 12:35:00 +10:00
zilmar 0cc9ae52b2 [Android] fix accident tempo 2016-10-01 11:45:06 +10:00
zilmar 1a16d46368 [Android] Get TestVariable to use temp registers 2016-10-01 11:44:21 +10:00
zilmar 5e7b18700d [Android] Get SubConstFromVariable to use temp registers 2016-10-01 11:42:26 +10:00
zilmar 05e19ef139 [Android] Fix StoreArmRegToArmRegPointer 2016-10-01 11:41:25 +10:00
zilmar 5367ffe728 [Android] Get PopArmReg to handle the other registers 2016-10-01 11:40:25 +10:00
zilmar b0f9a7773d [Android] Get PushArmReg to handle the rest of the registers 2016-10-01 11:37:50 +10:00
zilmar f41484339d [Android] Get MoveConstToVariable to use map temp 2016-10-01 11:33:28 +10:00
zilmar fbe89fd614 [Android] Get CompareArmReg to handle larger registers 2016-10-01 11:32:29 +10:00
zilmar f90c3d76e1 [Android] Add XorArmRegToArmReg 2016-10-01 10:54:23 +10:00
zilmar 338881c4ab [Android] Add XorArmRegToArmReg 2016-10-01 10:43:31 +10:00
zilmar 25954e657e [Android] Add XorConstToArmReg 2016-10-01 10:36:40 +10:00
zilmar 25e2125a63 [Android[ Add StoreArmRegToArmRegPointer 2016-10-01 10:35:31 +10:00
zilmar f9cf02ada0 [Android] Add SignExtendByte 2016-10-01 10:34:14 +10:00
zilmar cdba209aea ]Android] Add ShiftLeftImmed 2016-10-01 10:21:54 +10:00
zilmar 5f787d8540 [Android] Add ShiftRightUnsignImmed 2016-10-01 10:16:25 +10:00
zilmar 4174ec153b [Android] Add MulF32 2016-10-01 09:32:32 +10:00
zilmar c0802d11c7 [Android] Add OrArmRegToArmReg 2016-10-01 09:26:52 +10:00
zilmar 24973f49e2 [Android] Add MoveVariableToFloatReg 2016-10-01 09:21:40 +10:00
zilmar 51109ffe27 [Android] Add StoreFloatRegToArmRegPointer 2016-10-01 09:13:06 +10:00
zilmar 793f0e5cc4 [Android] Add LoadFloatingPointControlReg 2016-10-01 08:38:56 +10:00
zilmar 8e76c17ca1 [Android] Add LoadArmRegPointerToFloatReg 2016-10-01 08:22:19 +10:00
zilmar 4418985aa6 [Android] Add LoadArmRegPointerToArmReg 2016-10-01 08:00:18 +10:00
zilmar 46a724d9b7 [Android] Add LoadArmRegPointerByteToArmReg 2016-10-01 07:20:51 +10:00
zilmar bf56f9f626 [Android] get CompareArmRegToConst to take a uint32_t 2016-10-01 07:10:44 +10:00
zilmar ebf1ab63b8 [Android] Add another case to AddConstToArmReg 2016-10-01 06:43:43 +10:00
zilmar 4121511cf2 [Android] switch order of LoadArmRegPointerToArmReg 2016-10-01 06:42:18 +10:00
zilmar 6214abb248 [Android] Flip order of variables in MoveConstToArmReg 2016-10-01 06:36:49 +10:00
zilmar 93475500e2 [Android] Add mapping temp register 2016-10-01 05:58:04 +10:00
zilmar 8d836692a4 [Project64] Add map variable 2016-09-30 23:33:07 +10:00
zilmar c633124418 [Project64] Make sure ArmRegInfo.cpp can log 2016-09-29 22:20:06 +10:00
zilmar a5fee4f644 [Android] Add m_InCallDirect flag 2016-09-29 22:17:54 +10:00
zilmar bee1440813 [Android] fix up CArmOps::AddConstToArmReg 2016-09-29 22:15:33 +10:00
zilmar 17f740911c [Android] Add Arm32Opcode handling for AndArmRegToArmReg 2016-09-29 22:03:06 +10:00
zilmar b15a8b1fbc [Android] Add CArmOps::AddConstToArmReg 2016-09-29 21:59:18 +10:00
zilmar b175442aac [Android] Add Arm32Opcode handling for CArmOps::AddArmRegToArmReg 2016-09-29 21:58:10 +10:00
zilmar a8f2ce86f4 [Android] Arm: Add definition of fpu registers 2016-09-29 21:56:33 +10:00
zilmar bae7494a6f [Android] Add more opcode definitions 2016-09-29 21:54:12 +10:00
zilmar 21839b8ae6 [Project64] Remove commented out code from SystemTiming.cpp 2016-09-29 21:33:39 +10:00
zilmar e8505da649 [Project64] Fix up location of native saves 2016-09-29 21:30:00 +10:00
zilmar bc3bd4b146 [Project64] Fix CFunctionMap link issue 2016-09-29 21:03:23 +10:00
zilmar 6cfd981b7d [Android] Pre-allocate memory 2016-09-26 21:10:11 +10:00
zilmar 3bc178ee78 [Android] Add force gfx reset 2016-09-26 20:51:55 +10:00
zilmar b04a170f0e [Project64] Move Round model to RegBase 2016-09-25 08:29:45 +10:00
zilmar 64a6cec068 [Project64] Clean up SystemEvents.cpp 2016-09-25 06:46:19 +10:00
zilmar 90560dd0da [Project64] Some code clean of up MemoryVirtualMem.cpp 2016-09-24 08:40:58 +10:00
zilmar 812dae99f5 [Project64] Fix bug in Double_RoundToInteger32 for arm 2016-09-24 08:36:14 +10:00
Jake Huxell 0837d05cfd Removed the High Speed and medium speed nonsense as there's no need. Just pack into one DefaultSpeed. 2016-09-17 19:22:53 +01:00
Jake Huxell 75be0895d6 Fixed Bug Where Speed Could be Reduced Below 0 2016-09-17 19:15:03 +01:00
Jake Huxell 4c8e148ed1 Removed duplicate code between increase and decrease speed in SpeedLimiterClass by merging into one AlterSpeed 2016-09-17 19:10:22 +01:00
zilmar 4bc957bb3b Use the new high performance counter instead of date time class 2016-09-17 07:37:27 +10:00
zilmar b0881e90af Merge pull request #1198 from LuigiBlood/64ddus 
[64DD] USA and TOOL IPL support + USA Disk support
 2016-09-02 10:09:47 +10:00