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[Android] Get CArmRecompilerOps::BLTZ_Compare to use reg caching

This commit is contained in:
zilmar 2016-10-01 18:38:03 +10:00
parent 189e3b25f7
commit db65ab1ef0
1 changed files with 58 additions and 10 deletions
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68
Source/Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.cpp
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@ -1398,22 +1398,70 @@ void CArmRecompilerOps::BLEZ_Compare()
void CArmRecompilerOps::BLTZ_Compare()
{
if (IsKnown(m_Opcode.rs))
if (IsConst(m_Opcode.rs))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
else
{
if (g_System->b32BitCore())
if (Is64Bit(m_Opcode.rs))
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
g_Notify->BreakPoint(__FILE__, __LINE__);
}
else if (IsSigned(m_Opcode.rs))
{
if (GetMipsRegLo_S(m_Opcode.rs) < 0)
{
m_Section->m_Jump.FallThrough = true;
m_Section->m_Cont.FallThrough = false;
}
else
{
m_Section->m_Jump.FallThrough = false;
m_Section->m_Cont.FallThrough = true;
}
}
else
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[1], CRegName::GPR_Hi[m_Opcode.rs], Arm_R0);
m_Section->m_Jump.FallThrough = false;
m_Section->m_Cont.FallThrough = true;
}
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
}
else if (IsMapped(m_Opcode.rs))
{
if (Is64Bit(m_Opcode.rs))
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
else if (IsSigned(m_Opcode.rs))
{
CompareArmRegToConst(GetMipsRegMapLo(m_Opcode.rs), (uint32_t)0);
if (m_Section->m_Jump.FallThrough)
{
BranchLabel20(ArmBranch_GreaterThanOrEqual, m_Section->m_Cont.BranchLabel.c_str());
m_Section->m_Cont.LinkLocation = (uint32_t *)(*g_RecompPos - 4);
}
else if (m_Section->m_Cont.FallThrough)
{
BranchLabel20(ArmBranch_LessThan, m_Section->m_Jump.BranchLabel.c_str());
m_Section->m_Jump.LinkLocation = (uint32_t *)(*g_RecompPos - 4);
}
else
{
BranchLabel20(ArmBranch_GreaterThanOrEqual, m_Section->m_Cont.BranchLabel.c_str());
m_Section->m_Cont.LinkLocation = (uint32_t *)(*g_RecompPos - 4);
BranchLabel20(ArmBranch_Always, m_Section->m_Jump.BranchLabel.c_str());
m_Section->m_Jump.LinkLocation = (uint32_t *)(*g_RecompPos - 4);
}
}
else
{
m_Section->m_Jump.FallThrough = false;
m_Section->m_Cont.FallThrough = true;
}
}
else
{
ArmReg TempReg1 = Map_TempReg(Arm_Any, m_Opcode.rs, !g_System->b32BitCore());
ArmReg TempReg2 = m_RegWorkingSet.Map_TempReg(Arm_Any, -1, false);
MoveConstToArmReg(TempReg2, (uint32_t)0);
CompareArmRegToArmReg(TempReg1, TempReg2);
if (m_Section->m_Jump.FallThrough)
{
BranchLabel20(ArmBranch_GreaterThanOrEqual, m_Section->m_Cont.BranchLabel.c_str());