]Android] Add ShiftLeftImmed
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5f787d8540
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@ -658,6 +658,23 @@ void CArmOps::ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t s
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}
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}
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void CArmOps::ShiftLeftImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift)
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{
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if (DestReg > 0x7 || SourceReg > 0x7 || (shift & (~0x1F)) != 0)
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{
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g_Notify->BreakPoint(__FILE__,__LINE__);
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return;
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}
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CPU_Message(" lsls\t%s, %s, #%d", ArmRegName(DestReg), ArmRegName(SourceReg), (uint32_t)shift);
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ArmThumbOpcode op = {0};
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op.Imm5.rt = DestReg;
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op.Imm5.rn = SourceReg;
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op.Imm5.imm5 = shift;
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op.Imm5.opcode = 0x0;
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AddCode16(op.Hex);
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}
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void CArmOps::StoreArmRegToArmRegPointer(ArmReg Reg, ArmReg RegPointer, uint8_t offset)
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{
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if (Reg > 0x7 || RegPointer > 0x7)
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@ -165,6 +165,7 @@ protected:
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static void PopArmReg(uint16_t Registers);
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static void ShiftRightSignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
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static void ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
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static void ShiftLeftImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
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static void StoreArmRegToArmRegPointer(ArmReg Reg, ArmReg RegPointer, uint8_t offset);
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static void StoreFloatRegToArmRegPointer(ArmFpuSingle Reg, ArmReg RegPointer, uint8_t Offset);
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static void SubConstFromArmReg(ArmReg Reg, uint32_t Const);
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