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[Android] Add ShiftRightUnsignImmed

This commit is contained in:
zilmar 2016-10-01 10:16:25 +10:00
parent 4174ec153b
commit 5f787d8540
2 changed files with 36 additions and 0 deletions
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35
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
View File

@ -623,6 +623,41 @@ void CArmOps::ShiftRightSignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shi
}
}
void CArmOps::ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift)
{
if ((shift & (~0x1F)) != 0)
{
g_Notify->BreakPoint(__FILE__,__LINE__);
}
if (DestReg > 0x7 || SourceReg > 0x7)
{
CPU_Message(" lsrs.w\t%s, %s, #%d", ArmRegName(DestReg), ArmRegName(SourceReg), (uint32_t)shift);
Arm32Opcode op = {0};
op.imm5.rn = 0xF;
op.imm5.s = 0;
op.imm5.opcode = 0x752;
op.imm5.rm = SourceReg;
op.imm5.type = 1;
op.imm5.imm2 = shift & 3;
op.imm5.rd = DestReg;
op.imm5.imm3 = (shift >> 2) & 7;
op.imm5.opcode2 = 0;
AddCode32(op.Hex);
}
else
{
CPU_Message(" lsrs\t%s, %s, #%d", ArmRegName(DestReg), ArmRegName(SourceReg), (uint32_t)shift);
ArmThumbOpcode op = {0};
op.Imm5.rt = DestReg;
op.Imm5.rn = SourceReg;
op.Imm5.imm5 = shift;
op.Imm5.opcode = 0x1;
AddCode16(op.Hex);
}
}
void CArmOps::StoreArmRegToArmRegPointer(ArmReg Reg, ArmReg RegPointer, uint8_t offset)
{
if (Reg > 0x7 || RegPointer > 0x7)

1
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
View File

@ -164,6 +164,7 @@ protected:
static void PushArmReg(uint16_t Registers);
static void PopArmReg(uint16_t Registers);
static void ShiftRightSignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
static void ShiftRightUnsignImmed(ArmReg DestReg, ArmReg SourceReg, uint32_t shift);
static void StoreArmRegToArmRegPointer(ArmReg Reg, ArmReg RegPointer, uint8_t offset);
static void StoreFloatRegToArmRegPointer(ArmFpuSingle Reg, ArmReg RegPointer, uint8_t Offset);
static void SubConstFromArmReg(ArmReg Reg, uint32_t Const);