[Android] Add more opcode definitions
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@ -47,13 +47,6 @@ union ArmThumbOpcode
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unsigned opcode : 7;
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} Reg;
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struct
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{
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unsigned imm8 : 8;
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unsigned rdn : 3;
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unsigned opcode : 5;
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} Imm8;
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struct
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{
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unsigned rd : 3;
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@ -70,6 +63,13 @@ union ArmThumbOpcode
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unsigned opcode : 5;
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} Imm5;
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struct
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{
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unsigned imm8 : 8;
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unsigned rdn : 3;
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unsigned opcode : 5;
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} Imm8;
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struct
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{
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unsigned rn : 3;
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@ -122,6 +122,61 @@ union Arm32Opcode
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unsigned reserved : 1;
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} RnRdImm12;
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struct
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{
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unsigned Rn : 4;
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unsigned op3 : 2;
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unsigned D : 1;
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unsigned U : 1;
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unsigned op2 : 8;
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unsigned imm8 : 8;
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unsigned op1 : 4;
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unsigned vd : 4;
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} RnVdImm8;
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struct
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{
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unsigned vn : 4;
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unsigned op1 : 2;
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unsigned d : 1;
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unsigned op2 : 9;
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unsigned vm : 4;
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unsigned op3 : 1;
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unsigned m : 1;
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unsigned op4 : 1;
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unsigned n : 1;
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unsigned sz : 1;
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unsigned op5 : 3;
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unsigned vd : 4;
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} VnVmVd;
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struct
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{
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unsigned rn : 4;
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unsigned opcode : 12;
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unsigned rm : 4;
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unsigned imm : 2;
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unsigned Opcode2 : 6;
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unsigned rt : 4;
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} imm2;
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struct
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{
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unsigned rn : 4;
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unsigned s : 1;
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unsigned opcode : 11;
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unsigned rm : 4;
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unsigned type : 2;
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unsigned imm2 : 2;
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unsigned rd : 4;
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unsigned imm3 : 3;
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unsigned opcode2 : 1;
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} imm5;
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struct
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{
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unsigned rn : 4;
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@ -130,6 +185,20 @@ union Arm32Opcode
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unsigned rt : 4;
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} imm12;
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struct
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{
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unsigned rn : 4;
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unsigned s : 1;
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unsigned opcode : 5;
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unsigned i : 1;
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unsigned opcode2 : 5;
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unsigned imm8 : 8;
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unsigned rd : 4;
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unsigned imm3 : 3;
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unsigned opcode3 : 1;
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} imm8_3_1;
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struct
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{
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unsigned imm4 : 4;
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@ -164,6 +233,77 @@ union Arm32Opcode
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unsigned rn : 4;
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unsigned opcode : 12;
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} uint32;
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struct
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{
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unsigned rm : 4;
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unsigned opcode3 : 8;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode2 : 1;
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unsigned w : 1;
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unsigned opcode1 : 1;
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unsigned u : 1;
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unsigned p : 1;
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unsigned opcode : 3;
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unsigned cond : 4;
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} reg_cond;
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struct
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{
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unsigned rm : 4;
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unsigned opcode3 : 1;
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unsigned type : 2;
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unsigned imm5 : 5;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode2 : 1;
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unsigned w : 1;
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unsigned opcode1 : 1;
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unsigned u : 1;
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unsigned p : 1;
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unsigned opcode : 3;
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unsigned cond : 4;
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} reg_cond_imm5;
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struct
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{
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unsigned imm12 : 12;
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unsigned rt : 4;
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unsigned rn : 4;
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unsigned opcode2 : 1;
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unsigned w : 1;
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unsigned opcode1 : 1;
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unsigned u : 1;
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unsigned p : 1;
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unsigned opcode : 3;
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unsigned cond : 4;
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} reg_cond_imm12;
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struct
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{
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unsigned opcode : 16;
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unsigned opcode2 : 12;
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unsigned rt : 4;
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} fpscr;
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struct
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{
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unsigned opcode : 16;
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unsigned rm : 4;
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unsigned rotate : 2;
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unsigned opcode2 : 2;
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unsigned rd : 4;
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unsigned opcode3 : 4;
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} rotate;
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struct
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{
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unsigned opcode : 16;
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unsigned register_list : 16;
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} PushPop;
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};
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#pragma warning(pop)
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@ -180,7 +180,6 @@
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<ClInclude Include="N64System\Recompiler\RegInfo.h" />
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<ClInclude Include="N64System\Recompiler\SectionInfo.h" />
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<ClInclude Include="N64System\Recompiler\x64-86\x64RegInfo.h" />
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<ClInclude Include="N64System\Recompiler\X86ops.h" />
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<ClInclude Include="N64System\Recompiler\x86\x86ops.h" />
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<ClInclude Include="N64System\Recompiler\x86\x86RecompilerOps.h" />
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<ClInclude Include="N64System\Recompiler\x86\x86RegInfo.h" />
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@ -539,9 +539,6 @@
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<ClInclude Include="N64System\Recompiler\SectionInfo.h">
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<Filter>Header Files\N64 System\Recompiler</Filter>
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</ClInclude>
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<ClInclude Include="N64System\Recompiler\X86ops.h">
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<Filter>Header Files\N64 System\Recompiler</Filter>
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</ClInclude>
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<ClInclude Include="N64System\Mips\Audio.h">
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<Filter>Header Files\N64 System\Mips</Filter>
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</ClInclude>
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@ -650,5 +647,11 @@
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<ClInclude Include="N64System\Recompiler\Arm\ArmRegInfo.h">
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<Filter>Header Files\N64 System\Recompiler\Arm</Filter>
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</ClInclude>
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<ClInclude Include="N64System\Recompiler\RegBase.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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<ClInclude Include="N64System\Recompiler\x64-86\x64RegInfo.h">
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<Filter>Header Files</Filter>
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</ClInclude>
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</ItemGroup>
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</Project>
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