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[Android] Flip order of variables in MoveConstToArmReg

This commit is contained in:
zilmar 2016-10-01 06:36:49 +10:00
parent 93475500e2
commit 6214abb248
4 changed files with 67 additions and 67 deletions
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38
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.cpp
View File

@ -191,8 +191,8 @@ void CArmOps::BranchLabel20(ArmBranchCompare CompareType, const char * Label)
void CArmOps::CallFunction(void * Function, const char * FunctionName)
{
ArmReg reg = Arm_R4;
MoveConstToArmReg((uint32_t)Function,reg,FunctionName);
int32_t offset=(int32_t)Function-(int32_t)*g_RecompPos;
MoveConstToArmReg(reg,(uint32_t)Function,FunctionName);
int32_t Offset=(int32_t)Function-(int32_t)*g_RecompPos;
ArmThumbOpcode op = {0};
op.Branch.reserved = 0;
op.Branch.rm = reg;
@ -201,15 +201,15 @@ void CArmOps::CallFunction(void * Function, const char * FunctionName)
AddCode16(op.Hex);
}
void CArmOps::MoveConstToArmReg(uint16_t Const, ArmReg reg, const char * comment)
void CArmOps::MoveConstToArmReg(ArmReg DestReg, uint16_t Const, const char * comment)
{
if (comment != NULL)
{
CPU_Message(" movw\t%s, #0x%X\t; %s", ArmRegName(reg), (uint32_t)Const, comment);
CPU_Message(" movw\t%s, #0x%X\t; %s", ArmRegName(DestReg), (uint32_t)Const, comment);
}
else
{
CPU_Message(" movw\t%s, #%d\t; 0x%X", ArmRegName(reg), (uint32_t)Const, (uint32_t)Const);
CPU_Message(" movw\t%s, #%d\t; 0x%X", ArmRegName(DestReg), (uint32_t)Const, (uint32_t)Const);
}
Arm32Opcode op = {0};
op.imm16.opcode = ArmMOV_IMM16;
@ -218,20 +218,20 @@ void CArmOps::MoveConstToArmReg(uint16_t Const, ArmReg reg, const char * comment
op.imm16.imm4 = ((Const >> 12) & 0xF);
op.imm16.reserved = 0;
op.imm16.imm3 = ((Const >> 8) & 0x7);
op.imm16.rd = reg;
op.imm16.rd = DestReg;
op.imm16.imm8 = (Const & 0xFF);
AddCode32(op.Hex);
}
void CArmOps::MoveConstToArmRegTop(uint16_t Const, ArmReg reg, const char * comment)
void CArmOps::MoveConstToArmRegTop(ArmReg DestReg, uint16_t Const, const char * comment)
{
if (comment != NULL)
{
CPU_Message(" movt\t%s, #0x%X\t; %s", ArmRegName(reg), (uint32_t)Const, comment);
CPU_Message(" movt\t%s, #0x%X\t; %s", ArmRegName(DestReg), (uint32_t)Const, comment);
}
else
{
CPU_Message(" movt\t%s, #%d\t; 0x%X", ArmRegName(reg), (uint32_t)Const, (uint32_t)Const);
CPU_Message(" movt\t%s, #%d\t; 0x%X", ArmRegName(DestReg), (uint32_t)Const, (uint32_t)Const);
}
Arm32Opcode op = {0};
op.imm16.opcode = ArmMOV_IMM16;
@ -240,7 +240,7 @@ void CArmOps::MoveConstToArmRegTop(uint16_t Const, ArmReg reg, const char * comm
op.imm16.imm4 = ((Const >> 12) & 0xF);
op.imm16.reserved = 0;
op.imm16.imm3 = ((Const >> 8) & 0x7);
op.imm16.rd = reg;
op.imm16.rd = DestReg;
op.imm16.imm8 = (Const & 0xFF);
AddCode32(op.Hex);
}
@ -288,31 +288,31 @@ void CArmOps::LoadArmRegPointerToArmReg(ArmReg RegPointer, ArmReg Reg, uint8_t o
}
}
void CArmOps::MoveArmRegArmReg(ArmReg SourceReg, ArmReg DestReg)
void CArmOps::MoveArmRegArmReg(ArmReg DestReg, ArmReg SourceReg)
{
g_Notify->BreakPoint(__FILE__,__LINE__);
}
void CArmOps::MoveConstToArmReg(uint32_t Const, ArmReg reg, const char * comment)
void CArmOps::MoveConstToArmReg(ArmReg DestReg, uint32_t Const, const char * comment)
{
MoveConstToArmReg((uint16_t)(Const & 0xFFFF),reg,comment);
MoveConstToArmReg(DestReg,(uint16_t)(Const & 0xFFFF),comment);
uint16_t TopValue = (uint16_t)((Const >> 16) & 0xFFFF);
if (TopValue != 0)
{
MoveConstToArmRegTop(TopValue,reg,comment != NULL ? "" : NULL);
MoveConstToArmRegTop(DestReg,TopValue,comment != NULL ? "" : NULL);
}
}
void CArmOps::MoveConstToVariable(uint32_t Const, void * Variable, const char * VariableName)
{
MoveConstToArmReg(Const,Arm_R1);
MoveConstToArmReg((uint32_t)Variable,Arm_R2,VariableName);
MoveConstToArmReg(Arm_R1, Const);
MoveConstToArmReg(Arm_R2,(uint32_t)Variable,VariableName);
StoreArmRegToArmRegPointer(Arm_R1,Arm_R2,0);
}
void CArmOps::MoveVariableToArmReg(void * Variable, const char * VariableName, ArmReg reg)
{
MoveConstToArmReg((uint32_t)Variable,reg,VariableName);
MoveConstToArmReg(reg,(uint32_t)Variable,VariableName);
LoadArmRegPointerToArmReg(reg,reg,0);
}
@ -483,7 +483,7 @@ void CArmOps::SubConstFromArmReg(ArmReg Reg, uint32_t Const)
void CArmOps::SubConstFromVariable(uint32_t Const, void * Variable, const char * VariableName)
{
MoveConstToArmReg((uint32_t)Variable,Arm_R1,VariableName);
MoveConstToArmReg(Arm_R1,(uint32_t)Variable,VariableName);
LoadArmRegPointerToArmReg(Arm_R1,Arm_R2,0);
SubConstFromArmReg(Arm_R2,Const);
StoreArmRegToArmRegPointer(Arm_R2,Arm_R1,0);
@ -492,7 +492,7 @@ void CArmOps::SubConstFromVariable(uint32_t Const, void * Variable, const char *
void CArmOps::TestVariable(uint32_t Const, void * Variable, const char * VariableName)
{
MoveVariableToArmReg(Variable,VariableName, Arm_R2);
MoveConstToArmReg(Const,Arm_R3);
MoveConstToArmReg(Arm_R3, Const);
AndArmRegToArmReg(Arm_R3,Arm_R2);
CompareArmRegToArmReg(Arm_R2,Arm_R3);
}

8
Source/Project64-core/N64System/Recompiler/Arm/ArmOps.h
View File

@ -145,10 +145,10 @@ protected:
static void CompareArmRegToConst(ArmReg Reg, uint8_t value);
static void CompareArmRegToArmReg(ArmReg Reg1, ArmReg Reg2);
static void LoadArmRegPointerToArmReg(ArmReg RegPointer, ArmReg Reg, uint8_t offset);
static void MoveArmRegArmReg(ArmReg SourceReg, ArmReg DestReg);
static void MoveConstToArmReg(uint16_t Const, ArmReg reg, const char * comment = NULL);
static void MoveConstToArmRegTop(uint16_t Const, ArmReg reg, const char * comment = NULL);
static void MoveConstToArmReg(uint32_t Const, ArmReg reg, const char * comment = NULL);
static void MoveArmRegArmReg(ArmReg DestReg, ArmReg SourceReg);
static void MoveConstToArmReg(ArmReg DestReg, uint16_t Const, const char * comment = NULL);
static void MoveConstToArmRegTop(ArmReg DestReg, uint16_t Const, const char * comment = NULL);
static void MoveConstToArmReg(ArmReg DestReg, uint32_t Const, const char * comment = NULL);
static void MoveConstToVariable(uint32_t Const, void * Variable, const char * VariableName);
static void MoveVariableToArmReg(void * Variable, const char * VariableName, ArmReg reg);
static void PushArmReg(uint16_t Registers);

78
Source/Project64-core/N64System/Recompiler/Arm/ArmRecompilerOps.cpp
View File

@ -659,7 +659,7 @@ void CArmRecompilerOps::BGTZ_Compare()
//r0 = low, r1 = high
//r2 = low, r3 = high
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)0, Arm_R2);
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
if (m_Section->m_Jump.FallThrough)
{
@ -684,7 +684,7 @@ void CArmRecompilerOps::BGTZ_Compare()
uint8_t *Jump = NULL;
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[1], CRegName::GPR_Hi[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)0, Arm_R2);
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
if (m_Section->m_Jump.FallThrough)
{
@ -748,7 +748,7 @@ void CArmRecompilerOps::BLEZ_Compare()
if (!g_System->b32BitCore())
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[1], CRegName::GPR_Hi[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)0, Arm_R2);
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
if (m_Section->m_Jump.FallThrough)
{
@ -804,7 +804,7 @@ void CArmRecompilerOps::BLEZ_Compare()
else
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)0, Arm_R2);
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
if (m_Section->m_Jump.FallThrough)
{
@ -843,7 +843,7 @@ void CArmRecompilerOps::BLTZ_Compare()
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[1], CRegName::GPR_Hi[m_Opcode.rs], Arm_R0);
}
MoveConstToArmReg((uint32_t)0, Arm_R2);
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
if (m_Section->m_Jump.FallThrough)
{
@ -886,7 +886,7 @@ void CArmRecompilerOps::BGEZ_Compare()
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[1], CRegName::GPR_Hi[m_Opcode.rs], Arm_R0);
}
MoveConstToArmReg((uint32_t)0, Arm_R2);
MoveConstToArmReg(Arm_R2, (uint32_t)0);
CompareArmRegToArmReg(Arm_R0, Arm_R2);
if (m_Section->m_Cont.FallThrough)
{
@ -1038,10 +1038,10 @@ void CArmRecompilerOps::JAL()
{
m_RegWorkingSet.WriteBackRegisters();
MoveConstToArmReg((uint32_t)_PROGRAM_COUNTER, Arm_R0, "_PROGRAM_COUNTER");
MoveConstToArmReg(Arm_R0, (uint32_t)_PROGRAM_COUNTER, "_PROGRAM_COUNTER");
LoadArmRegPointerToArmReg(Arm_R0, Arm_R1, 0);
MoveConstToArmReg(0xF0000000, Arm_R2);
MoveConstToArmReg((uint32_t)(m_Opcode.target << 2), Arm_R3);
MoveConstToArmReg(Arm_R2, 0xF0000000);
MoveConstToArmReg(Arm_R3, (uint32_t)(m_Opcode.target << 2));
AndArmRegToArmReg(Arm_R2, Arm_R1);
AddArmRegToArmReg(Arm_R3, Arm_R1, Arm_R1);
StoreArmRegToArmRegPointer(Arm_R1, Arm_R0, 0);
@ -1465,12 +1465,12 @@ void CArmRecompilerOps::CACHE()
case 0:
case 16:
m_RegWorkingSet.BeforeCallDirect();
MoveConstToArmReg((uint32_t)CRecompiler::Remove_Cache, Arm_R3, "CRecompiler::Remove_Cache");
MoveConstToArmReg((uint32_t)0x20, Arm_R2);
MoveConstToArmReg(Arm_R3, (uint32_t)CRecompiler::Remove_Cache, "CRecompiler::Remove_Cache");
MoveConstToArmReg(Arm_R2, (uint32_t)0x20);
MoveVariableToArmReg(&_GPR[m_Opcode.base].UW[0], CRegName::GPR_Lo[m_Opcode.base], Arm_R1);
MoveConstToArmReg((uint32_t)((int16_t)m_Opcode.offset), Arm_R0);
MoveConstToArmReg(Arm_R0, (uint32_t)((int16_t)m_Opcode.offset));
AddArmRegToArmReg(Arm_R0, Arm_R1, Arm_R1);
MoveConstToArmReg((uint32_t)g_Recompiler, Arm_R0, "g_Recompiler");
MoveConstToArmReg(Arm_R0, (uint32_t)g_Recompiler, "g_Recompiler");
CallFunction((void *)AddressOf(&CRecompiler::ClearRecompCode_Virt), "CRecompiler::ClearRecompCode_Virt");
m_RegWorkingSet.AfterCallDirect();
break;
@ -1713,7 +1713,7 @@ void CArmRecompilerOps::SPECIAL_JR()
{
m_RegWorkingSet.WriteBackRegisters();
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)&R4300iOp::m_JumpToLocation, Arm_R1, "R4300iOp::m_JumpToLocation");
MoveConstToArmReg(Arm_R1, (uint32_t)&R4300iOp::m_JumpToLocation, "R4300iOp::m_JumpToLocation");
StoreArmRegToArmRegPointer(Arm_R0, Arm_R1, 0);
}
OverflowDelaySlot(true);
@ -1737,7 +1737,7 @@ void CArmRecompilerOps::SPECIAL_JR()
else
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)_PROGRAM_COUNTER, Arm_R1, "PROGRAM_COUNTER");
MoveConstToArmReg(Arm_R1, (uint32_t)_PROGRAM_COUNTER, "PROGRAM_COUNTER");
StoreArmRegToArmRegPointer(Arm_R0, Arm_R1, 0);
}
}
@ -1760,7 +1760,7 @@ void CArmRecompilerOps::SPECIAL_JR()
else
{
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)_PROGRAM_COUNTER, Arm_R1, "PROGRAM_COUNTER");
MoveConstToArmReg(Arm_R1, (uint32_t)_PROGRAM_COUNTER, "PROGRAM_COUNTER");
StoreArmRegToArmRegPointer(Arm_R0, Arm_R1, 0);
}
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, CExitInfo::Normal);
@ -1789,7 +1789,7 @@ void CArmRecompilerOps::SPECIAL_JALR()
return;
}
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)_PROGRAM_COUNTER, Arm_R1, "PROGRAM_COUNTER");
MoveConstToArmReg(Arm_R1, (uint32_t)_PROGRAM_COUNTER, "PROGRAM_COUNTER");
StoreArmRegToArmRegPointer(Arm_R0, Arm_R1, 0);
}
UnMap_GPR(m_Opcode.rd, false);
@ -1802,7 +1802,7 @@ void CArmRecompilerOps::SPECIAL_JALR()
return;
}
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)&R4300iOp::m_JumpToLocation, Arm_R1, "R4300iOp::m_JumpToLocation");
MoveConstToArmReg(Arm_R1, (uint32_t)&R4300iOp::m_JumpToLocation, "R4300iOp::m_JumpToLocation");
StoreArmRegToArmRegPointer(Arm_R0, Arm_R1, 0);
m_RegWorkingSet.WriteBackRegisters();
@ -1834,7 +1834,7 @@ void CArmRecompilerOps::SPECIAL_JALR()
return;
}
MoveVariableToArmReg(&_GPR[m_Opcode.rs].UW[0], CRegName::GPR_Lo[m_Opcode.rs], Arm_R0);
MoveConstToArmReg((uint32_t)_PROGRAM_COUNTER, Arm_R1, "PROGRAM_COUNTER");
MoveConstToArmReg(Arm_R1, (uint32_t)_PROGRAM_COUNTER, "PROGRAM_COUNTER");
StoreArmRegToArmRegPointer(Arm_R0, Arm_R1, 0);
CompileExit((uint32_t)-1, (uint32_t)-1, m_RegWorkingSet, CExitInfo::Normal);
if (m_Section->m_JumpSection)
@ -3184,7 +3184,7 @@ void CArmRecompilerOps::UnknownOpcode()
MoveConstToVariable(m_CompilePC, &g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER");
if (g_SyncSystem)
{
MoveConstToArmReg((uint32_t)g_BaseSystem, Arm_R0, "g_BaseSystem");
MoveConstToArmReg(Arm_R0, (uint32_t)g_BaseSystem, "g_BaseSystem");
CallFunction(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
}
@ -3203,7 +3203,7 @@ void CArmRecompilerOps::ExitCodeBlock()
{
if (g_SyncSystem)
{
MoveConstToArmReg((uint32_t)g_BaseSystem, Arm_R0, "g_BaseSystem");
MoveConstToArmReg(Arm_R0, (uint32_t)g_BaseSystem, "g_BaseSystem");
CallFunction(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
}
PopArmReg(ArmPushPop_R3 | ArmPushPop_R4 | ArmPushPop_R5 | ArmPushPop_R6 | ArmPushPop_R7 | ArmPushPop_PC);
@ -3227,7 +3227,7 @@ void CArmRecompilerOps::CompileCop1Test()
return;
MoveVariableToArmReg(&g_Reg->STATUS_REGISTER, "STATUS_REGISTER", Arm_R1);
MoveConstToArmReg(STATUS_CU1, Arm_R2, "STATUS_REGISTER");
MoveConstToArmReg(Arm_R2, STATUS_CU1, "STATUS_REGISTER");
AndArmRegToArmReg(Arm_R2, Arm_R1);
CompareArmRegToConst(Arm_R1, 0);
CompileExit(m_CompilePC, m_CompilePC, m_RegWorkingSet, CExitInfo::COP1_Unuseable, ArmBranch_Equal);
@ -3240,13 +3240,13 @@ void CArmRecompilerOps::CompileInPermLoop(CRegInfo & RegSet, uint32_t ProgramCou
RegSet.WriteBackRegisters();
UpdateCounters(RegSet, false, true);
CallFunction(AddressOf(CInterpreterCPU::InPermLoop), "CInterpreterCPU::InPermLoop");
MoveConstToArmReg((uint32_t)g_SystemTimer, Arm_R0);
MoveConstToArmReg(Arm_R0, (uint32_t)g_SystemTimer);
CallFunction(AddressOf(&CSystemTimer::TimerDone), "CSystemTimer::TimerDone");
CPU_Message("CompileSystemCheck 3");
CompileSystemCheck((uint32_t)-1, RegSet);
if (g_SyncSystem)
{
MoveConstToArmReg((uint32_t)g_BaseSystem, Arm_R0);
MoveConstToArmReg(Arm_R0, (uint32_t)g_BaseSystem);
CallFunction(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
}
}
@ -3260,8 +3260,8 @@ void CArmRecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
{
if (TargetPC != (uint32_t)-1)
{
MoveConstToArmReg(TargetPC, Arm_R1);
MoveConstToArmReg((uint32_t)&g_Reg->m_PROGRAM_COUNTER, Arm_R2, "PROGRAM_COUNTER");
MoveConstToArmReg(Arm_R1, TargetPC);
MoveConstToArmReg(Arm_R2, (uint32_t)&g_Reg->m_PROGRAM_COUNTER, "PROGRAM_COUNTER");
StoreArmRegToArmRegPointer(Arm_R1, Arm_R2, 0);
UpdateCounters(ExitRegSet, TargetPC <= JumpPC && JumpPC != -1, reason == CExitInfo::Normal);
@ -3297,16 +3297,16 @@ void CArmRecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
break;
case CExitInfo::DoSysCall:
bDelay = m_NextInstruction == JUMP || m_NextInstruction == DELAY_SLOT;
MoveConstToArmReg((uint32_t)bDelay, Arm_R1, bDelay ? "true" : "false");
MoveConstToArmReg((uint32_t)g_Reg, Arm_R0);
MoveConstToArmReg(Arm_R1, (uint32_t)bDelay, bDelay ? "true" : "false");
MoveConstToArmReg(Arm_R0, (uint32_t)g_Reg);
CallFunction(AddressOf(&CRegisters::DoSysCallException), "CRegisters::DoSysCallException");
ExitCodeBlock();
break;
case CExitInfo::COP1_Unuseable:
bDelay = m_NextInstruction == JUMP || m_NextInstruction == DELAY_SLOT;
MoveConstToArmReg((uint32_t)1, Arm_R2, "1");
MoveConstToArmReg((uint32_t)bDelay, Arm_R1, bDelay ? "true" : "false");
MoveConstToArmReg((uint32_t)g_Reg, Arm_R0);
MoveConstToArmReg(Arm_R2, (uint32_t)1, "1");
MoveConstToArmReg(Arm_R1, (uint32_t)bDelay, bDelay ? "true" : "false");
MoveConstToArmReg(Arm_R0, (uint32_t)g_Reg);
CallFunction(AddressOf(&CRegisters::DoCopUnusableException), "CRegisters::DoCopUnusableException");
ExitCodeBlock();
break;
@ -3344,7 +3344,7 @@ void CArmRecompilerOps::CompileSystemCheck(uint32_t TargetPC, const CRegInfo & R
CRegInfo RegSetCopy(RegSet);
RegSetCopy.WriteBackRegisters();
MoveConstToArmReg((uint32_t)g_SystemEvents, Arm_R0, "g_SystemEvents");
MoveConstToArmReg(Arm_R0, (uint32_t)g_SystemEvents, "g_SystemEvents");
CallFunction(AddressOf(&CSystemEvents::ExecuteEvents), "CSystemEvents::ExecuteEvents");
ExitCodeBlock();
CPU_Message("");
@ -3484,9 +3484,9 @@ void CArmRecompilerOps::UpdateSyncCPU(CRegInfo & RegSet, uint32_t Cycles)
}
WriteArmComment("Updating Sync CPU");
RegSet.BeforeCallDirect();
MoveConstToArmReg(Cycles, Arm_R2);
MoveConstToArmReg((uint32_t)g_SyncSystem, Arm_R1, "g_SyncSystem");
MoveConstToArmReg((uint32_t)g_System, Arm_R0);
MoveConstToArmReg(Arm_R2, Cycles);
MoveConstToArmReg(Arm_R1, (uint32_t)g_SyncSystem, "g_SyncSystem");
MoveConstToArmReg(Arm_R0, (uint32_t)g_System);
CallFunction((void *)AddressOf(&CN64System::UpdateSyncCPU), "CN64System::UpdateSyncCPU");
RegSet.AfterCallDirect();
}
@ -3511,7 +3511,7 @@ void CArmRecompilerOps::UpdateCounters(CRegInfo & RegSet, bool CheckTimer, bool
uint8_t * Jump = *g_RecompPos;
BranchLabel8(ArmBranch_GreaterThanOrEqual, "Continue_From_Timer_Test");
RegSet.BeforeCallDirect();
MoveConstToArmReg((uint32_t)g_SystemTimer, Arm_R0, "g_SystemTimer");
MoveConstToArmReg(Arm_R0, (uint32_t)g_SystemTimer, "g_SystemTimer");
CallFunction(AddressOf(&CSystemTimer::TimerDone), "CSystemTimer::TimerDone");
RegSet.AfterCallDirect();
@ -3537,7 +3537,7 @@ void CArmRecompilerOps::OverflowDelaySlot(bool TestTimer)
if (g_SyncSystem)
{
MoveConstToArmReg((uint32_t)g_BaseSystem, Arm_R0, "g_BaseSystem");
MoveConstToArmReg(Arm_R0, (uint32_t)g_BaseSystem, "g_BaseSystem");
CallFunction(AddressOf(&CN64System::SyncSystem), "CN64System::SyncSystem");
}
@ -3548,12 +3548,12 @@ void CArmRecompilerOps::OverflowDelaySlot(bool TestTimer)
MoveConstToVariable(TestTimer, &R4300iOp::m_TestTimer, "R4300iOp::m_TestTimer");
}
MoveConstToArmReg(g_System->CountPerOp(), Arm_R0);
MoveConstToArmReg(Arm_R0, g_System->CountPerOp());
CallFunction((void *)CInterpreterCPU::ExecuteOps, "CInterpreterCPU::ExecuteOps");
if (g_System->bFastSP() && g_Recompiler)
{
MoveConstToArmReg((uint32_t)g_Recompiler, Arm_R0);
MoveConstToArmReg(Arm_R0, (uint32_t)g_Recompiler);
CallFunction(AddressOf(&CRecompiler::ResetMemoryStackPos), "CRecompiler::ResetMemoryStackPos");
}
if (g_SyncSystem)

10
Source/Project64-core/N64System/Recompiler/Arm/ArmRegInfo.cpp
View File

@ -207,7 +207,7 @@ CArmOps::ArmReg CArmRegInfo::Map_TempReg(ArmReg Reg, int32_t MipsReg, bool LoadH
}
else
{
MoveConstToArmReg(GetMipsRegLo(MipsReg), Reg );
MoveConstToArmReg(Reg, GetMipsRegLo(MipsReg));
}
}
}
@ -258,22 +258,22 @@ CArmOps::ArmReg CArmRegInfo::Map_Variable(VARIABLE_MAPPED variable)
case VARIABLE_GPR:
CPU_Message(" regcache: allocate %s as pointer to GPR", ArmRegName(Reg));
m_Variable_MappedTo[Reg] = variable;
MoveConstToArmReg((uint32_t)_GPR, Reg, "_GPR");
MoveConstToArmReg(Reg, (uint32_t)_GPR, "_GPR");
break;
case VARIABLE_FPR:
CPU_Message(" regcache: allocate %s as pointer to _FPR_S", ArmRegName(Reg));
m_Variable_MappedTo[Reg] = variable;
MoveConstToArmReg((uint32_t)_FPR_S, Reg, "_FPR_S");
MoveConstToArmReg(Reg,(uint32_t)_FPR_S,"_FPR_S");
break;
case VARIABLE_TLB_READMAP:
CPU_Message(" regcache: allocate %s as pointer to TLB_READMAP", ArmRegName(Reg));
m_Variable_MappedTo[Reg] = variable;
MoveConstToArmReg((uint32_t)(g_MMU->m_TLB_ReadMap), Reg, "MMU->TLB_ReadMap");
MoveConstToArmReg(Reg, (uint32_t)(g_MMU->m_TLB_ReadMap), "MMU->TLB_ReadMap");
break;
case VARIABLE_NEXT_TIMER:
CPU_Message(" regcache: allocate %s as pointer to g_NextTimer", ArmRegName(Reg));
m_Variable_MappedTo[Reg] = variable;
MoveConstToArmReg((uint32_t)(g_NextTimer), Reg, "g_NextTimer");
MoveConstToArmReg(Reg, (uint32_t)(g_NextTimer), "g_NextTimer");
break;
default:
g_Notify->BreakPoint(__FILE__, __LINE__);