Tony Konzel
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58513ea22f
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Merge pull request #1607 from TASVideos/c64-refactor
C64: General improvements (disk writing, CIA/VIA timers, 6502X decimal mode fixes)
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2019-07-22 09:29:22 -05:00 |
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alyosha-tas
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fca98ffe34
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Various code cleanup
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2019-07-21 09:05:07 -04:00 |
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alyosha-tas
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6a773ac272
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Atari 2600: more bug fixes
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2019-07-20 14:47:36 -04:00 |
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SaxxonPike
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1e5fe55f30
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C64: Don't reallocate the SID filter buffer every time (purely perf)
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2019-07-19 19:09:08 -05:00 |
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alyosha-tas
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cf6cdf4ecc
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A2600: Bug fixes and Improvements
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2019-07-19 20:03:30 -04:00 |
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SaxxonPike
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a119420c79
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C64: VC count enable seems to need to be delayed by 1 cycle after badline
- which doesn't affect normal operation
- which DOES affect VSP
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2019-07-14 20:22:07 -05:00 |
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SaxxonPike
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4d6ed8d6c8
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C64: Savestate should include the new variables
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2019-07-14 16:32:53 -05:00 |
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SaxxonPike
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ad7cae8b71
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Merge branch 'master' into c64-refactor
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2019-07-14 10:45:44 -05:00 |
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SaxxonPike
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8e8d3a6a1b
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C64: Writes to some registers on the VIC in phase 2 by the CPU should only take effect on the following cycle
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2019-07-14 10:44:56 -05:00 |
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SaxxonPike
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e8902b829a
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C64: Apparently the 6502X core needs interrupts delayed by a cycle, do that with IRQ and NMI
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2019-07-14 10:43:52 -05:00 |
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SaxxonPike
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3bbfb98fc2
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C64: Split out VIC IRQ delays
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2019-07-13 19:28:44 -05:00 |
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alyosha-tas
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7df8ed1f27
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A2600: Add HMCLR delay
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2019-07-13 18:33:54 -04:00 |
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SaxxonPike
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154eefd2ad
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C64: Give BA/IRQ counting another go, seems to resolve many issues
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2019-07-13 16:51:30 -05:00 |
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SaxxonPike
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db38d5e65b
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C64: Try counting IRQ and BA correctly
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2019-07-13 15:28:57 -05:00 |
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SaxxonPike
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f22c9b7abd
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C64: CPU reads open bus when !AEC is asserted
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2019-07-13 15:25:40 -05:00 |
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SaxxonPike
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894adbb610
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C64: Remove an unused variable
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2019-07-13 15:02:18 -05:00 |
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SaxxonPike
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76679bc8bc
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C64: Use the correct background color in bitmapped modes for 0
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2019-07-13 15:01:11 -05:00 |
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SaxxonPike
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bd20b355f0
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C64: Writing to CPU port writes open bus data to 00/01
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2019-07-13 14:06:23 -05:00 |
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SaxxonPike
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f18e7c8833
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C64: Make the system debuggable for once
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2019-07-13 13:15:50 -05:00 |
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SaxxonPike
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cae3340946
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C64: No need to expose these with the CPU link in place
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2019-07-13 12:53:34 -05:00 |
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SaxxonPike
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3369dbf43f
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C64: IRQ is implemented as a delay line; no delay added (yet)
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2019-07-13 12:51:39 -05:00 |
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SaxxonPike
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d39f3e2e61
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6502X: pending IRQs are not delayed when !RDY is asserted
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2019-07-13 12:31:09 -05:00 |
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SaxxonPike
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bf2cba0e23
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6502X: remove a comment (this is indeed a dummy fetch)
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2019-07-13 11:38:03 -05:00 |
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SaxxonPike
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d62f2ac3fe
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C64: 0F7 is a badline eligible raster (fixes 26-line text demo in Frodo test suite)
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2019-07-13 01:41:58 -05:00 |
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SaxxonPike
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e6871b2cc3
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C64: Move VIC raster IRQ to phase 1
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2019-07-13 00:27:08 -05:00 |
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SaxxonPike
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dbf6b39e7f
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C64: Split out VIC phase1/phase2
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2019-07-12 23:51:55 -05:00 |
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SaxxonPike
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85bc92b688
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Merge remote-tracking branch 'origin/c64-refactor' into c64-refactor
# Conflicts:
# BizHawk.Emulation.Cores/Computers/Commodore64/MOS/Chip6510.cs
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2019-07-12 22:10:08 -05:00 |
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alyosha-tas
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66cf00a917
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Vectrex: Add frame buffer to state an set to released
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2019-07-12 18:15:25 -04:00 |
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alyosha-tas
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5e2b097902
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MC6809: fix DAA
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2019-07-10 19:30:17 -04:00 |
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alyosha-tas
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fd51934ea4
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Vectrex: Fix some bugs
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2019-07-10 15:42:01 -04:00 |
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alyosha-tas
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9fe277a3ff
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Vectrex: a bit more controller and frame cleanup
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2019-07-10 06:58:41 -04:00 |
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SaxxonPike
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0a7dc52aa0
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C64: BA and raster IRQ cleanup
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2019-07-09 22:41:12 -05:00 |
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SaxxonPike
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3a135c7c26
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C64: Raster interrupt bit can be set even if not enabled, just won't actually assert IRQ
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2019-07-09 21:40:03 -05:00 |
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SaxxonPike
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e63d10b608
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C64: Interrupts generated in phase 2 by the VIC won't trigger for the CPU until next cycle, also buffer BA
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2019-07-09 20:55:14 -05:00 |
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SaxxonPike
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b471fdc692
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C64: The CPU can trigger VIC badlines on its own (needed for VSP)
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2019-07-09 20:53:54 -05:00 |
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SaxxonPike
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2abe832289
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C64: AEC does not prohibit the CPU from functioning, only BA (RDY) does
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2019-07-09 20:52:51 -05:00 |
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SaxxonPike
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9758efe604
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6502X: CPU does a read or write regardless if the result is trashed, even during reset and dummy pushes
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2019-07-09 19:46:33 -05:00 |
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alyosha-tas
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84b0917f65
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Vectrex: Add schema and do some miscellanous clean up
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2019-07-09 20:01:45 -04:00 |
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SaxxonPike
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a8fd85157c
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VIC: Use correct color mapping for non-multicolor bitmap mode
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2019-07-09 08:02:55 -05:00 |
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SaxxonPike
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83b6553749
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VIC: Respect idle state background color registers, plus black in undocumented gfx mode
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2019-07-09 06:58:13 -05:00 |
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SaxxonPike
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89fa153477
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VIC: Resolve background color registers separately to color matrix memory
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2019-07-09 06:55:55 -05:00 |
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SaxxonPike
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9f733d3e7a
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VIC: More accurate pixel pipeline
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2019-07-09 05:26:26 -05:00 |
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SaxxonPike
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3efea15038
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6502X: When !RDY is asserted, still do other operations. Plus, do dummy reads on stack ops
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2019-07-09 05:24:47 -05:00 |
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alyosha-tas
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f544c044bf
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NES MMC3: Mapper test indicates IRQ was happening one ppu tick too late.
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2019-07-08 08:16:43 -04:00 |
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alyosha-tas
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5b2ed7e4ff
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MC6800: disassembler and cleanup
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2019-07-07 17:32:14 -04:00 |
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alyosha-tas
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53dd500875
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MC6800: More cleanup
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2019-07-07 09:08:26 -04:00 |
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alyosha-tas
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e2014ba3f5
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MC6800 work and MC6809 bug fix
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2019-07-07 08:22:01 -04:00 |
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alyosha-tas
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a4b38aa7a5
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MC6800: Initial commit
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2019-07-06 20:16:48 -04:00 |
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SaxxonPike
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d36e02045b
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C64: Optimize the RNG for 1541 flux transitions. (same output)
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2019-07-06 16:32:21 -05:00 |
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SaxxonPike
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3bf37f1c17
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C64: No need for LagCycles anymore.
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2019-07-06 16:29:14 -05:00 |
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alyosha-tas
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475702c1e8
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Vectrex: code cleanup
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2019-07-06 16:44:46 -04:00 |
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SaxxonPike
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6ed11de85b
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C64: Soft/Hard reset: it's about time
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2019-07-06 01:19:58 -05:00 |
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SaxxonPike
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d48964b642
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6502X: According to the datasheet, RDY must be high in order for interrupts to trigger
- this has implications for C64, as it may cause VIC interrupts to fire quite later than they currently do
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2019-07-06 00:00:51 -05:00 |
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SaxxonPike
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400b04b690
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C64: CIA was sometimes delaying too long to fire interrupts by 1 cycle.
- This could have implications for existing TASes (!)
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2019-07-05 23:59:01 -05:00 |
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SaxxonPike
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69f8b143a3
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C64: Foreground pixels are black when VIC is in idle state.
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2019-07-05 21:05:38 -05:00 |
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SaxxonPike
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8698aa41be
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Merge branch 'master' into c64-refactor
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2019-07-05 20:14:28 -05:00 |
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alyosha-tas
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9cbc78778f
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Vectrex: interrupt fixes
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2019-07-05 20:25:03 -04:00 |
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alyosha-tas
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6a5fc8b47e
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Vectrex: Implement interrupts, fixes Bedlam
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2019-07-05 19:57:55 -04:00 |
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alyosha-tas
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b0123ea133
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Vectrex: fix control stick in some cases
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2019-07-05 17:16:11 -04:00 |
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alyosha-tas
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275ccb381a
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Vectrex: ramp overscan more accurate, fixes numerous display bugs
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2019-07-04 21:26:13 -04:00 |
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alyosha-tas
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9b2d926bc0
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Vectrex: working controllers
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2019-07-04 20:00:59 -04:00 |
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SaxxonPike
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49b613962e
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C64: Fix a typo disabling voice 3 when high pass filter is set
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2019-07-04 17:32:35 -05:00 |
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SaxxonPike
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f45e934fec
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C64: Reset the SID filter on hard reset.
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2019-07-04 17:24:22 -05:00 |
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SaxxonPike
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579ffe5c25
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C64: Had the flag with the wrong polarity. Thanks, C64Anabalt.
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2019-07-04 14:20:12 -05:00 |
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SaxxonPike
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691577499f
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C64: When a sprite is eligible for display, initialize it with the correct crunch state based on Y expansion
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2019-07-04 14:12:46 -05:00 |
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SaxxonPike
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36ac592193
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C64: Individual IRQ flags for S/S or S/D collisions are always set even if not eligible to assert IRQ externally
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2019-07-04 13:59:41 -05:00 |
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SaxxonPike
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5c9445fb96
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C64: Reuse some local memory in the sprite renderer.
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2019-07-04 12:47:09 -05:00 |
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SaxxonPike
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55145ff7ba
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C64: The T64 format was never supported, but at least make the core aware of it
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2019-07-04 12:46:28 -05:00 |
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SaxxonPike
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2c804cab34
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C64: Fix a function ambiguity in the CIA class.
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2019-07-04 00:51:19 -05:00 |
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SaxxonPike
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2dd80eb0f4
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C64: Implement more CIA features and CIA/VIA defaults.
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2019-07-04 00:31:48 -05:00 |
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SaxxonPike
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32d59e8514
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C64: Implement more VIA features.
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2019-07-04 00:23:11 -05:00 |
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SaxxonPike
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7fbccb7a46
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C64: Use write protection on G64 images (which are often copy protected), and disable it on D64 images.
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2019-07-04 00:14:21 -05:00 |
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SaxxonPike
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4e1892d094
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C64: Allow writing to disk.
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2019-07-04 00:11:03 -05:00 |
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SaxxonPike
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0cdb28fc8f
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C64: Format D64 sector headers with directory ID instead of A0/A0.
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2019-07-04 00:03:50 -05:00 |
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SaxxonPike
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ceb1338459
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C64: Use proper sector gaps based on density when converting from D64.
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2019-07-04 00:02:28 -05:00 |
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SaxxonPike
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e74dfe15a8
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C64: VIA PB7 output timing adjusted to match datasheet.
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2019-07-04 00:00:05 -05:00 |
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SaxxonPike
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cb48104d7a
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6502X: Fix ADC with decimal mode enabled.
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2019-07-03 23:49:55 -05:00 |
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alyosha-tas
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95db4f2159
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Vectrex: add pcm sample playback
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2019-07-03 20:49:27 -04:00 |
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alyosha-tas
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38772dcd89
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Vectrex: fix dumb cpu copy paste, fixes scramble and probably others
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2019-07-02 20:33:43 -04:00 |
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alyosha-tas
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565bafd25e
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vectrex: fix display bug and add some brightness
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2019-06-30 08:07:54 -04:00 |
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alyosha-tas
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233825bbb7
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Vectrexx: More bug fixes
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2019-06-29 12:27:17 -04:00 |
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alyosha-tas
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00f766715e
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SubNESHawk: fix get and set regiesters
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2019-06-28 16:13:25 -04:00 |
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alyosha-tas
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38d5fea8ee
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SubNESHawk: Fix memory domain callback i think
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2019-06-28 16:03:11 -04:00 |
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alyosha-tas
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c887f7ca15
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Revert "SubNESHawk: Fix memorydomain callbacks i think"
This reverts commit c29c3f0391.
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2019-06-28 16:00:45 -04:00 |
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alyosha-tas
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c29c3f0391
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SubNESHawk: Fix memorydomain callbacks i think
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2019-06-28 15:59:21 -04:00 |
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alyosha-tas
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5188b7a2e7
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Vectrex: another round of bug fixes
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2019-06-25 18:46:16 -04:00 |
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alyosha-tas
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94db48b24f
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vectrex; more bug fixes
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2019-06-23 17:46:30 -04:00 |
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alyosha-tas
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d568a738b9
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Vectrex: Start displaying things correctly.
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2019-06-22 19:52:02 -04:00 |
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alyosha-tas
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84c0126f80
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Vectrex: Start displaying stuff
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2019-06-22 14:59:15 -04:00 |
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alyosha-tas
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e8d64cdbbb
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Vectrex: Add minestorm and bug fixes
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2019-06-17 09:06:37 -04:00 |
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alyosha-tas
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0c8646cfd4
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Vectrex: Set release flag to false
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2019-06-16 18:33:55 -04:00 |
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alyosha-tas
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ff2e91722d
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Vectrex: Input fix
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2019-06-16 18:18:21 -04:00 |
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alyosha-tas
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fb9ac2f3af
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Vectrex: hook up controllers
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2019-06-16 08:17:34 -04:00 |
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alyosha-tas
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c063319816
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Vectrex: Hook up audio and fix more bugs
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2019-06-15 18:39:00 -04:00 |
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YoshiRulz
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9cedf68407
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Inline waveform
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2019-06-15 16:30:17 +00:00 |
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YoshiRulz
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f6bd34c7ef
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Realign tables in comments w/ only spaces
*Without* moving them, that point was contentious
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2019-06-15 13:02:10 +00:00 |
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YoshiRulz
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4dd40305bc
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Merge branch 'master' into interp_cores
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2019-06-15 02:11:24 +10:00 |
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YoshiRulz
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3dec9e2e01
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Fix missing helper method
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2019-06-15 02:01:10 +10:00 |
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YoshiRulz
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3fa0f71a24
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Inline ToHexString extension where param numdigits is constant
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2019-06-14 15:54:17 +00:00 |
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James Groom
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067477ce18
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Merge branch 'master' into clean_docs
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2019-06-14 13:28:39 +00:00 |