Realign tables in comments w/ only spaces
*Without* moving them, that point was contentious
This commit is contained in:
YoshiRulz
James Groom
parent
7cbd1decc1
commit
f6bd34c7ef
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@ -302,25 +302,25 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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#region Internal Registers and State
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/*
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Index Register Name Range CPC Setting Notes
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0 Horizontal Total 00000000 63 Width of the screen, in characters. Should always be 63 (64 characters). 1 character == 1μs.
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1 Horizontal Displayed 00000000 40 Number of characters displayed. Once horizontal character count (HCC) matches this value, DISPTMG is set to 1.
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2 Horizontal Sync Position 00000000 46 When to start the HSync signal.
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3 Horizontal and Vertical Sync Widths VVVVHHHH 128+14 HSync pulse width in characters (0 means 16 on some CRTC), should always be more than 8; VSync width in scan-lines. (0 means 16 on some CRTC. Not present on all CRTCs, fixed to 16 lines on these)
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4 Vertical Total x0000000 38 Height of the screen, in characters.
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5 Vertical Total Adjust xxx00000 0 Measured in scanlines, can be used for smooth vertical scrolling on CPC.
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6 Vertical Displayed x0000000 25 Height of displayed screen in characters. Once vertical character count (VCC) matches this value, DISPTMG is set to 1.
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7 Vertical Sync position x0000000 30 When to start the VSync signal, in characters.
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8 Interlace and Skew xxxxxx00 0 00: No interlace; 01: Interlace Sync Raster Scan Mode; 10: No Interlace; 11: Interlace Sync and Video Raster Scan Mode
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9 Maximum Raster Address xxx00000 7 Maximum scan line address on CPC can hold between 0 and 7, higher values' upper bits are ignored
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10 Cursor Start Raster xBP00000 0 Cursor not used on CPC. B = Blink On/Off; P = Blink Period Control (Slow/Fast). Sets first raster row of character that cursor is on to invert.
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11 Cursor End Raster xxx00000 0 Sets last raster row of character that cursor is on to invert
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12 Display Start Address (High) xx000000 32
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13 Display Start Address (Low) 00000000 0 Allows you to offset the start of screen memory for hardware scrolling, and if using memory from address &0000 with the firmware.
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14 Cursor Address (High) xx000000 0
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15 Cursor Address (Low) 00000000 0
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16 Light Pen Address (High) xx000000 Read Only
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17 Light Pen Address (Low) 00000000 Read Only
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Index Register Name Range CPC Setting Notes
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0 Horizontal Total 00000000 63 Width of the screen, in characters. Should always be 63 (64 characters). 1 character == 1μs.
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1 Horizontal Displayed 00000000 40 Number of characters displayed. Once horizontal character count (HCC) matches this value, DISPTMG is set to 1.
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2 Horizontal Sync Position 00000000 46 When to start the HSync signal.
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3 Horizontal and Vertical Sync Widths VVVVHHHH 128+14 HSync pulse width in characters (0 means 16 on some CRTC), should always be more than 8; VSync width in scan-lines. (0 means 16 on some CRTC. Not present on all CRTCs, fixed to 16 lines on these)
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4 Vertical Total x0000000 38 Height of the screen, in characters.
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5 Vertical Total Adjust xxx00000 0 Measured in scanlines, can be used for smooth vertical scrolling on CPC.
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6 Vertical Displayed x0000000 25 Height of displayed screen in characters. Once vertical character count (VCC) matches this value, DISPTMG is set to 1.
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7 Vertical Sync position x0000000 30 When to start the VSync signal, in characters.
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8 Interlace and Skew xxxxxx00 0 00: No interlace; 01: Interlace Sync Raster Scan Mode; 10: No Interlace; 11: Interlace Sync and Video Raster Scan Mode
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9 Maximum Raster Address xxx00000 7 Maximum scan line address on CPC can hold between 0 and 7, higher values' upper bits are ignored
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10 Cursor Start Raster xBP00000 0 Cursor not used on CPC. B = Blink On/Off; P = Blink Period Control (Slow/Fast). Sets first raster row of character that cursor is on to invert.
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11 Cursor End Raster xxx00000 0 Sets last raster row of character that cursor is on to invert
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12 Display Start Address (High) xx000000 32
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13 Display Start Address (Low) 00000000 0 Allows you to offset the start of screen memory for hardware scrolling, and if using memory from address &0000 with the firmware.
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14 Cursor Address (High) xx000000 0
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15 Cursor Address (Low) 00000000 0
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16 Light Pen Address (High) xx000000 Read Only
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17 Light Pen Address (Low) 00000000 Read Only
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*/
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/// <summary>
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/// 6845 internal registers
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@ -879,26 +879,26 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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}
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/*
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RegIdx Register Name Type
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0 1 2 3 4
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0 Horizontal Total Write Only Write Only Write Only (note 2) (note 3)
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1 Horizontal Displayed Write Only Write Only Write Only (note 2) (note 3)
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2 Horizontal Sync Position Write Only Write Only Write Only (note 2) (note 3)
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3 H and V Sync Widths Write Only Write Only Write Only (note 2) (note 3)
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4 Vertical Total Write Only Write Only Write Only (note 2) (note 3)
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5 Vertical Total Adjust Write Only Write Only Write Only (note 2) (note 3)
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6 Vertical Displayed Write Only Write Only Write Only (note 2) (note 3)
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7 Vertical Sync position Write Only Write Only Write Only (note 2) (note 3)
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8 Interlace and Skew Write Only Write Only Write Only (note 2) (note 3)
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9 Maximum Raster Address Write Only Write Only Write Only (note 2) (note 3)
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10 Cursor Start Raster Write Only Write Only Write Only (note 2) (note 3)
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11 Cursor End Raster Write Only Write Only Write Only (note 2) (note 3)
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12 Disp. Start Address (High) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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13 Disp. Start Address (Low) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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14 Cursor Address (High) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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15 Cursor Address (Low) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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16 Light Pen Address (High) Read Only Read Only Read Only Read Only (note 2) (note 3)
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17 Light Pen Address (Low) Read Only Read Only Read Only Read Only (note 2) (note 3)
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RegIdx Register Name Type
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0 1 2 3 4
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0 Horizontal Total Write Only Write Only Write Only (note 2) (note 3)
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1 Horizontal Displayed Write Only Write Only Write Only (note 2) (note 3)
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2 Horizontal Sync Position Write Only Write Only Write Only (note 2) (note 3)
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3 H and V Sync Widths Write Only Write Only Write Only (note 2) (note 3)
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4 Vertical Total Write Only Write Only Write Only (note 2) (note 3)
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5 Vertical Total Adjust Write Only Write Only Write Only (note 2) (note 3)
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6 Vertical Displayed Write Only Write Only Write Only (note 2) (note 3)
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7 Vertical Sync position Write Only Write Only Write Only (note 2) (note 3)
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8 Interlace and Skew Write Only Write Only Write Only (note 2) (note 3)
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9 Maximum Raster Address Write Only Write Only Write Only (note 2) (note 3)
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10 Cursor Start Raster Write Only Write Only Write Only (note 2) (note 3)
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11 Cursor End Raster Write Only Write Only Write Only (note 2) (note 3)
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12 Disp. Start Address (High) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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13 Disp. Start Address (Low) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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14 Cursor Address (High) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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15 Cursor Address (Low) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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16 Light Pen Address (High) Read Only Read Only Read Only Read Only (note 2) (note 3)
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17 Light Pen Address (Low) Read Only Read Only Read Only Read Only (note 2) (note 3)
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1. On type 0 and 1, if a Write Only register is read from, "0" is returned.
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2. See the document "Extra CPC Plus Hardware Information" for more details.
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@ -1093,10 +1093,10 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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#region PortIODevice
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/*
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#BCXX %x0xxxx00 xxxxxxxx 6845 CRTC Index - Write
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#BDXX %x0xxxx01 xxxxxxxx 6845 CRTC Data Out - Write
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#BEXX %x0xxxx10 xxxxxxxx 6845 CRTC Status (as far as supported) Read -
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#BFXX %x0xxxx11 xxxxxxxx 6845 CRTC Data In (as far as supported) Read -
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#BCXX %x0xxxx00 xxxxxxxx 6845 CRTC Index - Write
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#BDXX %x0xxxx01 xxxxxxxx 6845 CRTC Data Out - Write
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#BEXX %x0xxxx10 xxxxxxxx 6845 CRTC Status (as far as supported) Read -
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#BFXX %x0xxxx11 xxxxxxxx 6845 CRTC Data In (as far as supported) Read -
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*/
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/// <summary>
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@ -13,27 +13,27 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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/// the CPC, CPC+ and GX4000 ranges. The CPC community have assigned them type numbers.
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/// If different implementations share the same type number it indicates that they are functionally identical:
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///
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/// Part No. Manufacturer Type No. Info.
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/// ------------------------------------------------------------------------------------------------------
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/// HD6845S Hitachi 0
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/// Datasheet: http://www.cpcwiki.eu/imgs/c/c0/Hd6845.hitachi.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// UM6845 UMC 0
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/// Datasheet: http://www.cpcwiki.eu/imgs/1/13/Um6845.umc.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// UM6845R UMC 1
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/// Datasheet: http://www.cpcwiki.eu/imgs/b/b5/Um6845r.umc.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// MC6845 Motorola 2
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/// Datasheet: http://www.cpcwiki.eu/imgs/d/da/Mc6845.motorola.pdf & http://bitsavers.trailing-edge.com/components/motorola/_dataSheets/6845.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// AMS40489 Amstrad 3 Only exists in the CPC464+, CPC6128+ and GX4000 and is integrated into a single CPC+ ASIC chip (along with the gatearray)
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/// Datasheet: {none}
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/// ------------------------------------------------------------------------------------------------------
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/// AMS40041 Amstrad 4 'Pre-ASIC' IC. The CRTC is integrated into a aingle ASIC IC with functionality being almost identical to the AMS40489
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/// (or 40226) Used in the 'Cost-Down' range of CPC464 and CPC6128 systems
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/// Datasheet: {none}
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///
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/// Part No. Manufacturer Type No. Info.
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/// ------------------------------------------------------------------------------------------------------
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/// HD6845S Hitachi 0
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/// Datasheet: http://www.cpcwiki.eu/imgs/c/c0/Hd6845.hitachi.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// UM6845 UMC 0
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/// Datasheet: http://www.cpcwiki.eu/imgs/1/13/Um6845.umc.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// UM6845R UMC 1
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/// Datasheet: http://www.cpcwiki.eu/imgs/b/b5/Um6845r.umc.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// MC6845 Motorola 2
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/// Datasheet: http://www.cpcwiki.eu/imgs/d/da/Mc6845.motorola.pdf & http://bitsavers.trailing-edge.com/components/motorola/_dataSheets/6845.pdf
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/// ------------------------------------------------------------------------------------------------------
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/// AMS40489 Amstrad 3 Only exists in the CPC464+, CPC6128+ and GX4000 and is integrated into a single CPC+ ASIC chip (along with the gatearray)
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/// Datasheet: {none}
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/// ------------------------------------------------------------------------------------------------------
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/// AMS40041 Amstrad 4 'Pre-ASIC' IC. The CRTC is integrated into a aingle ASIC IC with functionality being almost identical to the AMS40489
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/// (or 40226) Used in the 'Cost-Down' range of CPC464 and CPC6128 systems
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/// Datasheet: {none}
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///
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/// </summary>
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public class CRTC6845
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{
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@ -148,23 +148,23 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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/// Built from R12, R13 and CLK
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/// </summary>
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/*
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Memory Address Signal Signal source Signal name
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A15 6845 MA13
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A14 6845 MA12
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A13 6845 RA2
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A12 6845 RA1
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A11 6845 RA0
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A10 6845 MA9
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A9 6845 MA8
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A8 6845 MA7
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A7 6845 MA6
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A6 6845 MA5
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A5 6845 MA4
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A4 6845 MA3
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A3 6845 MA2
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A2 6845 MA1
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A1 6845 MA0
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A0 Gate-Array CLK
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Memory Address Signal Signal source Signal name
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A15 6845 MA13
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A14 6845 MA12
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A13 6845 RA2
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A12 6845 RA1
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A11 6845 RA0
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A10 6845 MA9
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A9 6845 MA8
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A8 6845 MA7
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A7 6845 MA6
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A6 6845 MA5
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A5 6845 MA4
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A4 6845 MA3
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A3 6845 MA2
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A2 6845 MA1
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A1 6845 MA0
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A0 Gate-Array CLK
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*/
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public ushort AddressLineCPC
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{
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@ -323,26 +323,26 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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#region Databus Interface
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/*
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RegIdx Register Name Type
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0 1 2 3 4
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0 Horizontal Total Write Only Write Only Write Only (note 2) (note 3)
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1 Horizontal Displayed Write Only Write Only Write Only (note 2) (note 3)
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2 Horizontal Sync Position Write Only Write Only Write Only (note 2) (note 3)
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3 H and V Sync Widths Write Only Write Only Write Only (note 2) (note 3)
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4 Vertical Total Write Only Write Only Write Only (note 2) (note 3)
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5 Vertical Total Adjust Write Only Write Only Write Only (note 2) (note 3)
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6 Vertical Displayed Write Only Write Only Write Only (note 2) (note 3)
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7 Vertical Sync position Write Only Write Only Write Only (note 2) (note 3)
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8 Interlace and Skew Write Only Write Only Write Only (note 2) (note 3)
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9 Maximum Raster Address Write Only Write Only Write Only (note 2) (note 3)
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10 Cursor Start Raster Write Only Write Only Write Only (note 2) (note 3)
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11 Cursor End Raster Write Only Write Only Write Only (note 2) (note 3)
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12 Disp. Start Address (High) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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13 Disp. Start Address (Low) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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14 Cursor Address (High) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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15 Cursor Address (Low) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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16 Light Pen Address (High) Read Only Read Only Read Only Read Only (note 2) (note 3)
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17 Light Pen Address (Low) Read Only Read Only Read Only Read Only (note 2) (note 3)
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RegIdx Register Name Type
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0 1 2 3 4
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0 Horizontal Total Write Only Write Only Write Only (note 2) (note 3)
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1 Horizontal Displayed Write Only Write Only Write Only (note 2) (note 3)
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2 Horizontal Sync Position Write Only Write Only Write Only (note 2) (note 3)
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3 H and V Sync Widths Write Only Write Only Write Only (note 2) (note 3)
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4 Vertical Total Write Only Write Only Write Only (note 2) (note 3)
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5 Vertical Total Adjust Write Only Write Only Write Only (note 2) (note 3)
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6 Vertical Displayed Write Only Write Only Write Only (note 2) (note 3)
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7 Vertical Sync position Write Only Write Only Write Only (note 2) (note 3)
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8 Interlace and Skew Write Only Write Only Write Only (note 2) (note 3)
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9 Maximum Raster Address Write Only Write Only Write Only (note 2) (note 3)
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10 Cursor Start Raster Write Only Write Only Write Only (note 2) (note 3)
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11 Cursor End Raster Write Only Write Only Write Only (note 2) (note 3)
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12 Disp. Start Address (High) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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13 Disp. Start Address (Low) Read/Write Write Only Write Only Read/Write (note 2) (note 3)
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14 Cursor Address (High) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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15 Cursor Address (Low) Read/Write Read/Write Read/Write Read/Write (note 2) (note 3)
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16 Light Pen Address (High) Read Only Read Only Read Only Read Only (note 2) (note 3)
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17 Light Pen Address (Low) Read Only Read Only Read Only Read Only (note 2) (note 3)
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1. On type 0 and 1, if a Write Only register is read from, "0" is returned.
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2. See the document "Extra CPC Plus Hardware Information" for more details.
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@ -350,10 +350,10 @@ namespace BizHawk.Emulation.Cores.Computers.AmstradCPC
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*/
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/* CPC:
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#BCXX %x0xxxx00 xxxxxxxx 6845 CRTC Index - Write
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#BDXX %x0xxxx01 xxxxxxxx 6845 CRTC Data Out - Write
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#BEXX %x0xxxx10 xxxxxxxx 6845 CRTC Status (as far as supported) Read -
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#BFXX %x0xxxx11 xxxxxxxx 6845 CRTC Data In (as far as supported) Read -
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#BCXX %x0xxxx00 xxxxxxxx 6845 CRTC Index - Write
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#BDXX %x0xxxx01 xxxxxxxx 6845 CRTC Data Out - Write
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#BEXX %x0xxxx10 xxxxxxxx 6845 CRTC Status (as far as supported) Read -
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#BFXX %x0xxxx11 xxxxxxxx 6845 CRTC Data In (as far as supported) Read -
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The Read/Write functions below are geared toward Amstrad CPC only
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They could be overridden for a different implementation if needs be
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@ -5,22 +5,22 @@ using BizHawk.Emulation.Common;
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/*
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$FFFF Interrupt Enable Flag
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$FF80-$FFFE Zero Page - 127 bytes
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$FF00-$FF7F Hardware I/O Registers
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$FEA0-$FEFF Unusable Memory
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$FE00-$FE9F OAM - Object Attribute Memory
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$E000-$FDFF Echo RAM - Reserved, Do Not Use
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$D000-$DFFF Internal RAM - Bank 1-7 (switchable - CGB only)
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$C000-$CFFF Internal RAM - Bank 0 (fixed)
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$A000-$BFFF Cartridge RAM (If Available)
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$9C00-$9FFF BG Map Data 2
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$9800-$9BFF BG Map Data 1
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$8000-$97FF Character RAM
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$4000-$7FFF Cartridge ROM - Switchable Banks 1-xx
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$0150-$3FFF Cartridge ROM - Bank 0 (fixed)
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$0100-$014F Cartridge Header Area
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$0000-$00FF Restart and Interrupt Vectors
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$FFFF Interrupt Enable Flag
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$FF80-$FFFE Zero Page - 127 bytes
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$FF00-$FF7F Hardware I/O Registers
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$FEA0-$FEFF Unusable Memory
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$FE00-$FE9F OAM - Object Attribute Memory
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$E000-$FDFF Echo RAM - Reserved, Do Not Use
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$D000-$DFFF Internal RAM - Bank 1-7 (switchable - CGB only)
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$C000-$CFFF Internal RAM - Bank 0 (fixed)
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$A000-$BFFF Cartridge RAM (If Available)
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$9C00-$9FFF BG Map Data 2
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$9800-$9BFF BG Map Data 1
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$8000-$97FF Character RAM
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$4000-$7FFF Cartridge ROM - Switchable Banks 1-xx
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$0150-$3FFF Cartridge ROM - Bank 0 (fixed)
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$0100-$014F Cartridge Header Area
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$0000-$00FF Restart and Interrupt Vectors
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*/
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namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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@ -803,21 +803,21 @@ namespace BizHawk.Emulation.Cores.Nintendo.NES
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//BWrite[x+7]=B2007;
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//Address Size Description
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//$0000 $1000 Pattern Table 0
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//$1000 $1000 Pattern Table 1
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//$2000 $3C0 Name Table 0
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//$23C0 $40 Attribute Table 0
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//$2400 $3C0 Name Table 1
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//$27C0 $40 Attribute Table 1
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//$2800 $3C0 Name Table 2
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//$2BC0 $40 Attribute Table 2
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//$2C00 $3C0 Name Table 3
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//$2FC0 $40 Attribute Table 3
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//$3000 $F00 Mirror of 2000h-2EFFh
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//$3F00 $10 BG Palette
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//$3F10 $10 Sprite Palette
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//$3F20 $E0 Mirror of 3F00h-3F1Fh
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//Address Size Description
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//$0000 $1000 Pattern Table 0
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//$1000 $1000 Pattern Table 1
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//$2000 $3C0 Name Table 0
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//$23C0 $40 Attribute Table 0
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//$2400 $3C0 Name Table 1
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//$27C0 $40 Attribute Table 1
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//$2800 $3C0 Name Table 2
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//$2BC0 $40 Attribute Table 2
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//$2C00 $3C0 Name Table 3
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//$2FC0 $40 Attribute Table 3
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//$3000 $F00 Mirror of 2000h-2EFFh
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//$3F00 $10 BG Palette
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//$3F10 $10 Sprite Palette
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//$3F20 $E0 Mirror of 3F00h-3F1Fh
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//appendix 1
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