ShuriZma
/
BizHawk
mirror of https://github.com/TASEmulators/BizHawk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MC6800 work and MC6809 bug fix

This commit is contained in:
alyosha-tas 2019-07-07 08:22:01 -04:00
parent a4b38aa7a5
commit e2014ba3f5
6 changed files with 101 additions and 442 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

92
BizHawk.Emulation.Cores/CPUs/MC6800/Execute.cs
View File

@ -39,24 +39,24 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0x0D: REG_OP(SEC, CC); break; // SEC (Inherent)
case 0x0E: REG_OP(CLI, CC); break; // CLI (Inherent)
case 0x0F: REG_OP(SEI, CC); break; // SEI (Inherent)
case 0x10: NOP_(); break; // Page 2
case 0x11: NOP_(); break; // Page 3
case 0x12: ILLEGAL(); break; // NOP (Inherent)
case 0x13: ILLEGAL(); break; // SYNC (Inherent)
case 0x10: REG_OP(SBA, A); break; // SBA (Inherent)
case 0x11: REG_OP(CBA, A); break; // CBA (Inherent)
case 0x12: ILLEGAL(); break; // ILLEGAL
case 0x13: ILLEGAL(); break; // ILLEGAL
case 0x14: ILLEGAL(); break; // ILLEGAL
case 0x15: ILLEGAL(); break; // ILLEGAL
case 0x16: LBR_(true); break; // LBRA (Relative)
case 0x17: LBSR_(); break; // LBSR (Relative)
case 0x16: REG_OP(TAB, A); break; // LBRA (Relative)
case 0x17: REG_OP(TBA, A); break; // LBSR (Relative)
case 0x18: ILLEGAL(); break; // ILLEGAL
case 0x19: REG_OP(DA, A); break; // DAA (Inherent)
case 0x1A: ILLEGAL(); break; // ORCC (Immediate)
case 0x1B: ILLEGAL(); break; // ILLEGAL
case 0x1C: ILLEGAL(); break; // ANDCC (Immediate)
case 0x1D: ILLEGAL(); break; // SEX (Inherent)
case 0x1E: ILLEGAL(); break; // EXG (Immediate)
case 0x1F: ILLEGAL(); break; // TFR (Immediate)
case 0x1A: ILLEGAL(); break; // ILLEGAL
case 0x1B: REG_OP(ABA, A); break; // ABA (Inherent)
case 0x1C: ILLEGAL(); break; // ILLEGAL
case 0x1D: ILLEGAL(); break; // ILLEGAL
case 0x1E: ILLEGAL(); break; // ILLEGAL
case 0x1F: ILLEGAL(); break; // ILLEGAL
case 0x20: BR_(true); break; // BRA (Relative)
case 0x21: BR_(false); break; // BRN (Relative)
case 0x21: ILLEGAL(); break; // ILLEGAL
case 0x22: BR_(!(FlagC | FlagZ)); break; // BHI (Relative)
case 0x23: BR_(FlagC | FlagZ); break; // BLS (Relative)
case 0x24: BR_(!FlagC); break; // BHS , BCC (Relative)
@ -71,21 +71,21 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0x2D: BR_(FlagN ^ FlagV); break; // BLT (Relative)
case 0x2E: BR_((!FlagZ) & (FlagN == FlagV)); break; // BGT (Relative)
case 0x2F: BR_(FlagZ | (FlagN ^ FlagV)); break; // BLE (Relative)
case 0x30: INDEX_OP(LEAX); break; // LEAX (Indexed)
case 0x31: INDEX_OP(LEAY); break; // LEAY (Indexed)
case 0x32: INDEX_OP(LEAS); break; // LEAS (Indexed)
case 0x33: INDEX_OP(LEAU); break; // LEAU (Indexed)
case 0x34: PSH_(SP); break; // PSHS (Immediate)
case 0x35: PUL_(SP); break; // PULS (Immediate)
case 0x30: REG_OP_16(TSX, X); break; // TSX (Inherent)
case 0x31: REG_OP_16(INS, SP); break; // INS (Inherent)
case 0x32: PUL_(A); break; // PULA (Inherent)
case 0x33: PUL_(B); break; // PULB (Inherent)
case 0x34: REG_OP_16(DES, SP); break; // DES (Inherent)
case 0x35: REG_OP_16(TXS, SP); break; // TXS (Inherent)
case 0x36: PSH_(A); break; // PSHA (Inherent)
case 0x37: PSH_(B); break; // PSHB (Inherent)
case 0x38: ILLEGAL(); break; // ILLEGAL
case 0x39: RTS(); break; // RTS (Inherent)
case 0x3A: ABX_(); break; // ABX (Inherent)
case 0x3A: ILLEGAL(); break; // ILLEGAL
case 0x3B: RTI(); break; // RTI (Inherent)
case 0x3C: CWAI_(); break; // CWAI (Inherent)
case 0x3D: MUL_(); break; // MUL (Inherent)
case 0x3E: ILLEGAL(); break; // ILLEGAL
case 0x3C: ILLEGAL(); break; // ILLEGAL
case 0x3D: ILLEGAL(); break; // ILLEGAL
case 0x3E: WAI_(); break; // WAI (Inherent)
case 0x3F: SWI1(); break; // SWI (Inherent)
case 0x40: REG_OP(NEG, A); break; // NEGA (Inherent)
case 0x41: ILLEGAL(); break; // ILLEGAL
@ -154,7 +154,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0x80: REG_OP_IMD(SUB8, A); break; // SUBA (Immediate)
case 0x81: REG_OP_IMD(CMP8, A); break; // CMPA (Immediate)
case 0x82: REG_OP_IMD(SBC8, A); break; // SBCA (Immediate)
case 0x83: IMD_OP_D(SUB16, D); break; // SUBD (Immediate)
case 0x83: ILLEGAL(); break; // ILLEGAL
case 0x84: REG_OP_IMD(AND8, A); break; // ANDA (Immediate)
case 0x85: REG_OP_IMD(BIT, A); break; // BITA (Immediate)
case 0x86: REG_OP_IMD(LD_8, A); break; // LDA (Immediate)
@ -165,12 +165,12 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0x8B: REG_OP_IMD(ADD8, A); break; // ADDA (Immediate)
case 0x8C: IMD_CMP_16(CMP16, X); break; // CMPX (Immediate)
case 0x8D: BSR_(); break; // BSR (Relative)
case 0x8E: REG_OP_LD_16(X); break; // LDX (Immediate)
case 0x8E: REG_OP_LD_16(SP); break; // LDS (Immediate)
case 0x8F: ILLEGAL(); break; // ILLEGAL
case 0x90: DIRECT_MEM_4(SUB8, A); break; // SUBA (Direct)
case 0x91: DIRECT_MEM_4(CMP8, A); break; // CMPA (Direct)
case 0x92: DIRECT_MEM_4(SBC8, A); break; // SBCA (Direct)
case 0x93: DIR_OP_D(SUB16, D); break; // SUBD (Direct)
case 0x93: ILLEGAL(); break; // ILLEGAL
case 0x94: DIRECT_MEM_4(AND8, A); break; // ANDA (Direct)
case 0x95: DIRECT_MEM_4(BIT, A); break; // BITA (Direct)
case 0x96: DIRECT_MEM_4(LD_8, A); break; // LDA (Direct)
@ -180,13 +180,13 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0x9A: DIRECT_MEM_4(OR8, A); break; // ORA (Direct)
case 0x9B: DIRECT_MEM_4(ADD8, A); break; // ADDA (Direct)
case 0x9C: DIR_CMP_16(CMP16, X); break; // CMPX (Direct)
case 0x9D: REG_OP(ADC8, A); break; // JSR (Direct)
case 0x9E: DIR_OP_LD_16(X); break; // LDX (Direct)
case 0x9F: DIR_OP_ST_16(X); break; // STX (Direct)
case 0x9D: ILLEGAL(); break; // ILLEGAL
case 0x9E: DIR_OP_LD_16(SP); break; // LDS (Direct)
case 0x9F: DIR_OP_ST_16(SP); break; // STS (Direct)
case 0xA0: INDEX_OP_REG(I_SUB, A); break; // SUBA (Indexed)
case 0xA1: INDEX_OP_REG(I_CMP, A); break; // CMPA (Indexed)
case 0xA2: INDEX_OP_REG(I_SBC, A); break; // SBCA (Indexed)
case 0xA3: INDEX_OP_REG(I_SUBD, D); break; // SUBD (Indexed)
case 0xA3: ILLEGAL(); break; // ILLEGAL
case 0xA4: INDEX_OP_REG(I_AND, A); break; // ANDA (Indexed)
case 0xA5: INDEX_OP_REG(I_BIT, A); break; // BITA (Indexed)
case 0xA6: INDEX_OP_REG(I_LD, A); break; // LDA (Indexed)
@ -197,12 +197,12 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0xAB: INDEX_OP_REG(I_ADD, A); break; // ADDA (Indexed)
case 0xAC: INDEX_OP_REG(I_CMP16, X); break; // CMPX (Indexed)
case 0xAD: INDEX_OP(I_JSR); break; // JSR (Indexed)
case 0xAE: INDEX_OP_REG(I_LD16, X); break; // LDX (Indexed)
case 0xAF: INDEX_OP_REG(I_ST16, X); break; // STX (Indexed)
case 0xAE: INDEX_OP_REG(I_LD16, SP); break; // LDS (Indexed)
case 0xAF: INDEX_OP_REG(I_ST16, SP); break; // STS (Indexed)
case 0xB0: EXT_REG(SUB8, A); break; // SUBA (Extended)
case 0xB1: EXT_REG(CMP8, A); break; // CMPA (Extended)
case 0xB2: EXT_REG(SBC8, A); break; // SBCA (Extended)
case 0xB3: EXT_OP_D(SUB16, D); break; // SUBD (Extended)
case 0xB3: ILLEGAL(); break; // ILLEGAL
case 0xB4: EXT_REG(AND8, A); break; // ANDA (Extended)
case 0xB5: EXT_REG(BIT, A); break; // BITA (Extended)
case 0xB6: EXT_REG(LD_8, A); break; // LDA (Extended)
@ -213,12 +213,12 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0xBB: EXT_REG(ADD8, A); break; // ADDA (Extended)
case 0xBC: EXT_CMP_16(CMP16, X); break; // CMPX (Extended)
case 0xBD: JSR_EXT(); break; // JSR (Extended)
case 0xBE: EXT_OP_LD_16(X); break; // LDX (Extended)
case 0xBF: EXT_OP_ST_16(X); break; // STX (Extended)
case 0xBE: EXT_OP_LD_16(SP); break; // LDS (Extended)
case 0xBF: EXT_OP_ST_16(SP); break; // STS (Extended)
case 0xC0: REG_OP_IMD(SUB8, B); break; // SUBB (Immediate)
case 0xC1: REG_OP_IMD(CMP8, B); break; // CMPB (Immediate)
case 0xC2: REG_OP_IMD(SBC8, B); break; // SBCB (Immediate)
case 0xC3: IMD_OP_D(ADD16, D); break; // ADDD (Immediate)
case 0xC3: ILLEGAL(); break; // ILLEGAL
case 0xC4: REG_OP_IMD(AND8, B); break; // ANDB (Immediate)
case 0xC5: REG_OP_IMD(BIT, B); break; // BITB (Immediate)
case 0xC6: REG_OP_IMD(LD_8, B); break; // LDB (Immediate)
@ -227,14 +227,14 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0xC9: REG_OP_IMD(ADC8, B); break; // ADCB (Immediate)
case 0xCA: REG_OP_IMD(OR8, B); break; // ORB (Immediate)
case 0xCB: REG_OP_IMD(ADD8, B); break; // ADDB (Immediate)
case 0xCC: REG_OP_LD_16D(); break; // LDD (Immediate)
case 0xCC: ILLEGAL(); break; // ILLEGAL
case 0xCD: ILLEGAL(); break; // ILLEGAL
case 0xCE: REG_OP_LD_16(X); break; // LDX (Immediate)
case 0xCF: ILLEGAL(); break; // ILLEGAL
case 0xD0: DIRECT_MEM_4(SUB8, B); break; // SUBB (Direct)
case 0xD1: DIRECT_MEM_4(CMP8, B); break; // CMPB (Direct)
case 0xD2: DIRECT_MEM_4(SBC8, B); break; // SBCB (Direct)
case 0xD3: DIR_OP_D(ADD16, D); break; // ADDD (Direct)
case 0xD3: ILLEGAL(); break; // ILLEGAL
case 0xD4: DIRECT_MEM_4(AND8, B); break; // ANDB (Direct)
case 0xD5: DIRECT_MEM_4(BIT, B); break; // BITB (Direct)
case 0xD6: DIRECT_MEM_4(LD_8, B); break; // LDB (Direct)
@ -243,14 +243,14 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0xD9: DIRECT_MEM_4(ADC8, B); break; // ADCB (Direct)
case 0xDA: DIRECT_MEM_4(OR8, B); break; // ORB (Direct)
case 0xDB: DIRECT_MEM_4(ADD8, B); break; // ADDB (Direct)
case 0xDC: DIR_OP_LD_16D(); break; // LDD (Direct)
case 0xDD: DIR_OP_ST_16D(); break; // STD (Direct)
case 0xDC: ILLEGAL(); break; // ILLEGAL
case 0xDD: ILLEGAL(); break; // ILLEGAL
case 0xDE: DIR_OP_LD_16(X); break; // LDX (Direct)
case 0xDF: DIR_OP_ST_16(X); break; // STX (Direct)
case 0xE0: INDEX_OP_REG(I_SUB, B); break; // SUBB (Indexed)
case 0xE1: INDEX_OP_REG(I_CMP, B); break; // CMPB (Indexed)
case 0xE2: INDEX_OP_REG(I_SBC, B); break; // SBCB (Indexed)
case 0xE3: INDEX_OP_REG(I_ADDD, D); break; // ADDD (Indexed)
case 0xE3: ILLEGAL(); break; // ILLEGAL
case 0xE4: INDEX_OP_REG(I_AND, B); break; // ANDB (Indexed)
case 0xE5: INDEX_OP_REG(I_BIT, B); break; // BITB (Indexed)
case 0xE6: INDEX_OP_REG(I_LD, B); break; // LDB (Indexed)
@ -259,14 +259,14 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0xE9: INDEX_OP_REG(I_ADC, B); break; // ADCB (Indexed)
case 0xEA: INDEX_OP_REG(I_OR, B); break; // ORB (Indexed)
case 0xEB: INDEX_OP_REG(I_ADD, B); break; // ADDB (Indexed)
case 0xEC: INDEX_OP_REG(I_LD16D, D); break; // LDD (Indexed)
case 0xED: INDEX_OP_REG(I_ST16D, D); break; // STD (Indexed)
case 0xEC: ILLEGAL(); break; // ILLEGAL
case 0xED: ILLEGAL(); break; // ILLEGAL
case 0xEE: INDEX_OP_REG(I_LD16, X); break; // LDX (Indexed)
case 0xEF: INDEX_OP_REG(I_ST16, X); break; // STX (Indexed)
case 0xF0: EXT_REG(SUB8, B); break; // SUBB (Extended)
case 0xF1: EXT_REG(CMP8, B); break; // CMPB (Extended)
case 0xF2: EXT_REG(SBC8, B); break; // SBCB (Extended)
case 0xF3: EXT_OP_D(ADD16, D); break; // ADDD (Extended)
case 0xF3: ILLEGAL(); break; // ILLEGAL
case 0xF4: EXT_REG(AND8, B); break; // ANDB (Extended)
case 0xF5: EXT_REG(BIT, B); break; // BITB (Extended)
case 0xF6: EXT_REG(LD_8, B); break; // LDB (Extended)
@ -275,8 +275,8 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case 0xF9: EXT_REG(ADC8, B); break; // ADCB (Extended)
case 0xFA: EXT_REG(OR8, B); break; // ORB (Extended)
case 0xFB: EXT_REG(ADD8, B); break; // ADDB (Extended)
case 0xFC: EXT_OP_LD_16D(); break; // LDD (Extended)
case 0xFD: EXT_OP_ST_16D(); break; // STD (Extended)
case 0xFC: ILLEGAL(); break; // ILLEGAL
case 0xFD: ILLEGAL(); break; // ILLEGAL
case 0xFE: EXT_OP_LD_16(X); break; // LDX (Extended)
case 0xFF: EXT_OP_ST_16(X); break; // STX (Extended)
}

71
BizHawk.Emulation.Cores/CPUs/MC6800/MC6800.cs
View File

@ -33,7 +33,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800
public const ushort ASR = 22;
public const ushort LSR = 23;
public const ushort BIT = 24;
public const ushort CWAI = 25;
public const ushort WAI = 25;
public const ushort SYNC = 26;
public const ushort RD_INC = 27;
public const ushort RD_INC_OP = 28;
@ -44,12 +44,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800
public const ushort NEG = 33;
public const ushort TST = 34;
public const ushort CLR = 35;
public const ushort SEX = 38;
public const ushort EXG = 39;
public const ushort TFR = 40;
public const ushort ADD8BR = 41;
public const ushort ABX = 42;
public const ushort MUL = 43;
public const ushort JPE = 44;
public const ushort IDX_DCDE = 45;
public const ushort IDX_OP_BLD = 46;
@ -81,6 +76,15 @@ namespace BizHawk.Emulation.Common.Components.MC6800
public const ushort SEC = 75;
public const ushort CLI = 76;
public const ushort SEI = 77;
public const ushort SBA = 78;
public const ushort CBA = 79;
public const ushort TAB = 80;
public const ushort TBA = 81;
public const ushort ABA = 82;
public const ushort TSX = 83;
public const ushort INS = 84;
public const ushort DES = 85;
public const ushort TXS = 86;
public MC6800()
{
@ -286,9 +290,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case LEA:
LEA_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]);
break;
case EXG:
EXG_Func(cur_instr[instr_pntr++]);
break;
case IDX_OP_BLD:
Index_Op_Builder();
break;
@ -296,9 +297,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
Regs[IDX_EA] = (ushort)(Regs[indexed_reg] + Regs[ADDR]);
Index_Op_Builder();
break;
case TFR:
TFR_Func(cur_instr[instr_pntr++]);
break;
case SET_ADDR:
reg_d_ad = cur_instr[instr_pntr++];
reg_h_ad = cur_instr[instr_pntr++];
@ -318,15 +316,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
case CLR:
CLR_Func(cur_instr[instr_pntr++]);
break;
case SEX:
SEX_Func(cur_instr[instr_pntr++]);
break;
case ABX:
Regs[X] += Regs[B];
break;
case MUL:
Mul_Func();
break;
case SET_F_I:
FlagI = true; FlagF = true;
break;
@ -459,10 +448,46 @@ namespace BizHawk.Emulation.Common.Components.MC6800
instr_pntr++;
FlagI = true;
break;
case SBA:
instr_pntr++;
SBC8_Func(A, B);
break;
case CBA:
instr_pntr++;
CMP8_Func(A, B);
break;
case TAB:
instr_pntr++;
Regs[B] = Regs[A];
break;
case TBA:
instr_pntr++;
Regs[A] = Regs[B];
break;
case ABA:
instr_pntr++;
ADD8_Func(A, B);
break;
case TSX:
instr_pntr++;
Regs[X] = (ushort)(Regs[SP] + 1);
break;
case INS:
instr_pntr++;
Regs[SP] = (ushort)(Regs[SP] + 1);
break;
case DES:
instr_pntr++;
Regs[SP] = (ushort)(Regs[SP] - 1);
break;
case TXS:
instr_pntr++;
Regs[SP] = (ushort)(Regs[X] - 1);
break;
case BIT:
BIT_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]);
break;
case CWAI:
case WAI:
if (NMIPending)
{
NMIPending = false;
@ -504,7 +529,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800
}
else
{
PopulateCURINSTR(CWAI);
PopulateCURINSTR(WAI);
irq_pntr = 0;
IRQS = -1;
}

206
BizHawk.Emulation.Cores/CPUs/MC6800/OP_Tables.cs
View File

@ -23,14 +23,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 1;
}
private void SYNC_()
{
PopulateCURINSTR(IDLE,
SYNC);
IRQS = -1;
}
private void REG_OP(ushort oper, ushort src)
{
PopulateCURINSTR(oper, src);
@ -108,15 +100,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 4;
}
private void REG_OP_IMD_CC(ushort oper)
{
Regs[ALU2] = Regs[CC];
PopulateCURINSTR(RD_INC_OP, ALU, PC, oper, ALU2, ALU,
TR, CC, ALU2);
IRQS = 2;
}
private void REG_OP_IMD(ushort oper, ushort dest)
{
PopulateCURINSTR(RD_INC_OP, ALU, PC, oper, dest, ALU);
@ -124,66 +107,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 1;
}
private void IMD_OP_D(ushort oper, ushort dest)
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
oper, ADDR);
IRQS = 3;
}
private void DIR_OP_D(ushort oper, ushort dest)
{
PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
RD_INC, ALU, ADDR,
RD, ALU2, ADDR,
SET_ADDR, ADDR, ALU, ALU2,
oper, ADDR);
IRQS = 5;
}
private void EXT_OP_D(ushort oper, ushort dest)
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
RD_INC, ALU, ADDR,
RD, ALU2, ADDR,
SET_ADDR, ADDR, ALU, ALU2,
oper, ADDR);
IRQS = 6;
}
private void REG_OP_LD_16D()
{
PopulateCURINSTR(RD_INC, A, PC,
RD_INC_OP, B, PC, LD_16, ADDR, A, B);
IRQS = 2;
}
private void DIR_OP_LD_16D()
{
PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
IDLE,
RD_INC, A, ADDR,
RD_INC_OP, B, ADDR, LD_16, ADDR, A, B);
IRQS = 4;
}
private void DIR_OP_ST_16D()
{
PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
SET_ADDR, ALU, A, A,
WR_HI_INC, ADDR, ALU,
WR, ADDR, B);
IRQS = 4;
}
private void DIR_CMP_16(ushort oper, ushort dest)
{
PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
@ -254,28 +177,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 5;
}
private void EXT_OP_LD_16D()
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
IDLE,
RD_INC, A, ADDR,
RD_INC_OP, B, ADDR, LD_16, ADDR, A, B);
IRQS = 5;
}
private void EXT_OP_ST_16D()
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
SET_ADDR, ALU, A, A,
WR_HI_INC, ADDR, ALU,
WR, ADDR, B);
IRQS = 5;
}
private void EXT_CMP_16(ushort oper, ushort dest)
{
PopulateCURINSTR(RD_INC, ALU, PC,
@ -288,38 +189,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 6;
}
private void EXG_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
EXG, ALU,
IDLE,
IDLE,
IDLE,
IDLE,
IDLE);
IRQS = 7;
}
private void TFR_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
TFR, ALU,
IDLE,
IDLE,
IDLE);
IRQS = 5;
}
private void JMP_DIR_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
SET_ADDR, PC, DP, ALU);
IRQS = 2;
}
private void JMP_EXT_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
@ -329,18 +198,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 3;
}
private void JSR_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
SET_ADDR, ADDR, DP, ALU,
DEC16, SP,
TR, PC, ADDR,
WR_DEC_LO, SP, ADDR,
WR_HI, SP, ADDR);
IRQS = 6;
}
private void JSR_EXT()
{
PopulateCURINSTR(RD_INC, ALU, PC,
@ -354,27 +211,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 7;
}
private void LBR_(bool cond)
{
if (cond)
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC, ALU2, PC,
SET_ADDR, ADDR, ALU, ALU2,
ADD16BR, PC, ADDR);
IRQS = 4;
}
else
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC, ALU2, PC,
SET_ADDR, ADDR, ALU, ALU2);
IRQS = 3;
}
}
private void BR_(bool cond)
{
if (cond)
@ -405,44 +241,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 6;
}
private void LBSR_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
RD_INC, ALU2, PC,
SET_ADDR, ADDR, ALU, ALU2,
TR, ALU, PC,
ADD16BR, PC, ADDR,
DEC16, SP,
WR_DEC_LO, SP, ALU,
WR_HI, SP, ALU);
IRQS = 8;
}
private void ABX_()
{
PopulateCURINSTR(ABX,
IDLE);
IRQS = 2;
}
private void MUL_()
{
PopulateCURINSTR(MUL,
IDLE,
IDLE,
IDLE,
IDLE,
IDLE,
IDLE,
IDLE,
IDLE,
IDLE);
IRQS = 10;
}
private void RTS()
{
PopulateCURINSTR(IDLE,
@ -507,7 +305,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800
IRQS = 18;
}
private void CWAI_()
private void WAI_()
{
PopulateCURINSTR(RD_INC_OP, ALU, PC, ANDCC, ALU,
SET_E,
@ -520,7 +318,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800
WR_DEC_LO, SP, B,
WR_DEC_LO, SP, A,
WR, SP, CC,
CWAI);
WAI);
IRQS = 16;
}

164
BizHawk.Emulation.Cores/CPUs/MC6800/Operations.cs
View File

@ -144,14 +144,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800
Regs[dest] = (ushort)(Regs[dest] + (short)Regs[src]);
}
public void Mul_Func()
{
Regs[ALU] = (ushort)(Regs[A] * Regs[B]);
D = Regs[ALU];
FlagC = Regs[A] > 127;
FlagZ = D == 0;
}
public void ADD8_Func(ushort dest, ushort src)
{
int Reg16_d = Regs[dest];
@ -506,161 +498,5 @@ namespace BizHawk.Emulation.Common.Components.MC6800
FlagN = ans > 0x7FFF;
FlagV = (Regs[dest].Bit(15) != Regs[src].Bit(15)) && (Regs[dest].Bit(15) != ans.Bit(15));
}
public void EXG_Func(ushort sel)
{
ushort src = 0;
ushort dest = 0;
ushort temp = 0;
if ((Regs[sel] & 0x8) == 0)
{
switch (Regs[sel] & 0xF)
{
case 0: src = Dr; break;
case 1: src = X; break;
case 4: src = SP; break;
case 5: src = PC; break;
case 6: src = 0xFF; break;
case 7: src = 0xFF; break;
}
switch ((Regs[sel] >> 4) & 0xF)
{
case 0: dest = Dr; break;
case 1: dest = X; break;
case 4: dest = SP; break;
case 5: dest = PC; break;
case 6: dest = 0xFF; break;
case 7: dest = 0xFF; break;
default: dest = 0xFF; break;
}
}
else
{
switch (Regs[sel] & 0xF)
{
case 8: src = A; break;
case 9: src = B; break;
case 10: src = CC; break;
case 11: src = DP; break;
case 12: src = 0xFF; break;
case 13: src = 0xFF; break;
case 14: src = 0xFF; break;
case 15: src = 0xFF; break;
}
switch ((Regs[sel] >> 4) & 0xF)
{
case 8: dest = A; break;
case 9: dest = B; break;
case 10: dest = CC; break;
case 11: dest = DP; break;
case 12: dest = 0xFF; break;
case 13: dest = 0xFF; break;
case 14: dest = 0xFF; break;
case 15: dest = 0xFF; break;
default: dest = 0xFF; break;
}
}
if ((src != 0xFF) && (dest != 0xFF))
{
if (src == Dr)
{
temp = D;
D = Regs[dest];
Regs[dest] = temp;
}
else if (dest == Dr)
{
temp = D;
D = Regs[src];
Regs[src] = temp;
}
else
{
temp = Regs[src];
Regs[src] = Regs[dest];
Regs[dest] = temp;
}
}
}
public void TFR_Func(ushort sel)
{
ushort src = 0;
ushort dest = 0;
if ((Regs[sel] & 0x8) == 0)
{
switch (Regs[sel] & 0xF)
{
case 0: dest = Dr; break;
case 1: dest = X; break;
case 4: dest = SP; break;
case 5: dest = PC; break;
case 6: dest = 0xFF; break;
case 7: dest = 0xFF; break;
}
switch ((Regs[sel] >> 4) & 0xF)
{
case 0: src = Dr; break;
case 1: src = X; break;
case 4: src = SP; break;
case 5: src = PC; break;
case 6: src = 0xFF; break;
case 7: src = 0xFF; break;
default: src = 0xFF; break;
}
}
else
{
switch (Regs[sel] & 0xF)
{
case 8: dest = A; break;
case 9: dest = B; break;
case 10: dest = CC; break;
case 11: dest = DP; break;
case 12: dest = 0xFF; break;
case 13: dest = 0xFF; break;
case 14: dest = 0xFF; break;
case 15: dest = 0xFF; break;
}
switch ((Regs[sel] >> 4) & 0xF)
{
case 8: src = A; break;
case 9: src = B; break;
case 10: src = CC; break;
case 11: src = DP; break;
case 12: src = 0xFF; break;
case 13: src = 0xFF; break;
case 14: src = 0xFF; break;
case 15: src = 0xFF; break;
default: src = 0xFF; break;
}
}
if ((src != 0xFF) && (dest != 0xFF))
{
if (src == Dr)
{
Regs[dest] = D;
}
else if (dest == Dr)
{
D = Regs[src];
}
else
{
Regs[dest] = Regs[src];
}
}
}
}
}

2
BizHawk.Emulation.Cores/CPUs/MC6809/Execute.cs
View File

@ -180,7 +180,7 @@ namespace BizHawk.Emulation.Common.Components.MC6809
case 0x9A: DIRECT_MEM_4(OR8, A); break; // ORA (Direct)
case 0x9B: DIRECT_MEM_4(ADD8, A); break; // ADDA (Direct)
case 0x9C: DIR_CMP_16(CMP16, X); break; // CMPX (Direct)
case 0x9D: REG_OP(ADC8, A); break; // JSR (Direct)
case 0x9D: JSR_(); break; // JSR (Direct)
case 0x9E: DIR_OP_LD_16(X); break; // LDX (Direct)
case 0x9F: DIR_OP_ST_16(X); break; // STX (Direct)
case 0xA0: INDEX_OP_REG(I_SUB, A); break; // SUBA (Indexed)

8
BizHawk.Emulation.Cores/CPUs/MC6809/OP_Tables.cs
View File

@ -322,12 +322,12 @@ namespace BizHawk.Emulation.Common.Components.MC6809
private void JSR_()
{
PopulateCURINSTR(RD_INC, ALU, PC,
SET_ADDR, ADDR, DP, ALU,
PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
TR, ALU, PC,
DEC16, SP,
TR, PC, ADDR,
WR_DEC_LO, SP, ADDR,
WR_HI, SP, ADDR);
WR_DEC_LO, SP, ALU,
WR_HI, SP, ALU);
IRQS = 6;
}