zilmar
af1c0c2b55
RSP: Add Vmulq
2023-09-07 11:30:15 +09:30
zilmar
d468b863c2
Rsp: add vnop for vnull
2023-09-07 11:29:16 +09:30
zilmar
8b71ef3bc1
RSP: Add RSP_Vector_Reserved
2023-09-07 11:23:35 +09:30
zilmar
ab67374c8a
RSP: Update the display of RSP opcodes in debugger
2023-09-07 11:19:44 +09:30
zilmar
4f74dc4bb0
Rsp: Update display of vector in debugger
2023-09-07 11:17:08 +09:30
zilmar
ab03916a70
Core: let the stack pointer equal end of rdram
2023-09-07 11:13:54 +09:30
zilmar
7199096748
Core: Merge CheckFPUException into CheckFPUResult64
2023-08-31 18:52:34 +09:30
zilmar
91d1c6e237
Core: Add fpu exceptions to COP1_S_MUL
2023-08-31 11:09:48 +09:30
zilmar
2f7a35613f
Core: Add exception to COP1_S_SUB
2023-08-31 10:54:41 +09:30
zilmar
c28c6bb4a1
Core: Add fpu exceptions to COP1_S_ADD
2023-08-31 10:08:49 +09:30
zilmar
416c85ecda
Core: some code clean up of Load_FPR_ToTop
2023-08-31 09:30:05 +09:30
zilmar
2dcfcf250d
Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void)
2023-08-31 09:28:23 +09:30
zilmar
e49438cdab
Core: Add exit reason exception
2023-08-30 12:16:07 +09:30
zilmar
703ad4049a
PluginRSP: declare windows.h before asset.h
2023-08-30 12:15:36 +09:30
zilmar
41fa1fd5dd
Core: use m_TLB_WriteMap not m_TLB_ReadMap for NonMemory
2023-08-30 11:35:53 +09:30
zilmar
625f532d73
RSP: use __debugbreak not DebugBreak
2023-08-24 10:44:45 +09:30
zilmar
47f14016e6
RSP: Set RSP_JumpTo before register in JALR, BLTZAL, BGEZAL
2023-08-24 10:35:51 +09:30
zilmar
ae9912b068
RSP: Clean up VCR
2023-08-24 10:31:26 +09:30
zilmar
7db5876927
RSP: Clean up VCL
2023-08-24 10:07:05 +09:30
zilmar
9dab3481ae
RSP: Add class to wrap around RSP flag
2023-08-24 08:00:29 +09:30
zilmar
0cb43e0c33
RSP: Remove flag to swap vector register endian
2023-08-24 07:04:35 +09:30
zilmar
d300dc002a
Core: remove exception catch around RSP
2023-08-17 15:27:18 +09:30
zilmar
6884c8d2c9
Core: fix up how recompiler handles rounding
2023-08-17 15:24:57 +09:30
zilmar
a80860605d
RSP: fix up usage of Indx in recompiler
2023-08-17 14:38:51 +09:30
zilmar
3394be733f
RSP: Fix up AccurateEmulation for interpreter
2023-08-17 14:22:54 +09:30
zilmar
54be4d8135
Rsp: Add a rsp AccurateEmulation flag for new rsp work
2023-08-17 12:04:06 +09:30
zilmar
09ef426ac6
Rsp: Fix memory allocation of recompiler memory
2023-08-17 11:37:03 +09:30
zilmar
6b30c1ae6a
Rsp: Move Recompiler in to rsp-core
2023-08-17 08:59:22 +09:30
zilmar
1f0151e067
RSP: fix up clang formatting
2023-08-10 21:50:01 +09:30
zilmar
6bdc898248
RSP: fix LPV
2023-08-10 20:52:50 +09:30
zilmar
c6c0a4a6d2
RSP: fix LDV
2023-08-10 16:06:38 +09:30
zilmar
1d492262fd
RSP: use std::min for length calculation
2023-08-10 14:24:33 +09:30
zilmar
60192a7f33
RSP: Move more functionality in to rsp-core
2023-08-10 14:16:57 +09:30
zilmar
25e48405c5
RSP: Start to split out RSP in to core and UI for plugin
2023-08-10 10:27:11 +09:30
zilmar
bb5a16aaa2
RSP: Change RSP Registers to be an enum not define
2023-08-10 09:47:53 +09:30
zilmar
34d75780bf
Rsp: Update the element order in LSV, LLV, LRV
2023-08-03 17:32:40 +09:30
zilmar
a18f78679e
Rsp: Change the order of EleSpec
2023-08-03 17:29:55 +09:30
zilmar
05cd3a846b
Rsp: Update vmov
2023-08-03 17:27:58 +09:30
zilmar
b5db44c12d
Core: Get CheckFPUInput64Conv to return true on exception
2023-08-03 17:25:03 +09:30
zilmar
5ff45c43c4
Core: Get R4300iOp::CheckFPUInput64 to return true on exception
2023-08-03 17:11:56 +09:30
zilmar
bc1b027c94
Core: get CheckFPUInput32Conv to return true on exception
2023-08-03 16:24:54 +09:30
zilmar
930e463bbc
Core: Move TriggerException(EXC_FPE) into R4300iOp::CheckFPUInput32
2023-08-03 15:38:07 +09:30
Squall Leonhart
822b75c734
changes this callback back to BOOL so it works again. ( #2378 )
2023-07-28 06:57:31 +09:30
zilmar
bbe603c758
RSP: fix up lbv
2023-07-27 16:01:03 +09:30
zilmar
52e77bc4e0
RSP: Some clean up to lqv
2023-07-27 15:11:31 +09:30
zilmar
e1854e1589
RSP: Inline memory functions in to the opcodes
2023-07-27 13:23:53 +09:30
Squall Leonhart
562d4d4e56
Make the FPU Register Caching checkbox functional ( #2377 )
...
Adds missing line from SettingsPage-Game-Recompiler.h
Corrects entry in SettingsPage-Game-Recompiler.cpp to Game_FPURegCache
Removes : from Language file entry.
2023-07-27 09:07:14 +09:30
zilmar
5c65bebe9e
RSP: Update VAdd code (SQV/LQV order changed as well)
2023-07-21 07:25:17 +09:30
zilmar
2cf740565e
RSP: Add dummy vsut
2023-07-20 09:40:42 +09:30
zilmar
e88e827d64
RSP Add dummy LWV
2023-07-20 08:59:36 +09:30
zilmar
cf7628cc1d
RSP: Update RSP_LRV_DMEM
2023-07-18 10:05:25 +09:30
zilmar
4265bdfb43
RSP: Add lwu
2023-07-18 10:04:54 +09:30
zilmar
bd357c65b0
RSP: fix vmov
2023-07-18 09:56:31 +09:30
zilmar
6e03d6ad7b
RSP: Add method to get element specifier index from the Vector
2023-07-18 07:55:06 +09:30
zilmar
97fccb1c36
RSP: Change EleSpec to be 16 and use .e instead of rs
2023-07-18 07:36:25 +09:30
zilmar
97fbbffee8
RSP: A little clean up of VABS
2023-07-18 07:27:49 +09:30
zilmar
ee452143ff
RSP: Change the name of the opcode that register ops use
2023-07-18 07:22:27 +09:30
zilmar
b7d7884e22
RSP: Make a class for the RSP Vector
2023-07-13 21:09:18 +09:30
zilmar
353ef5ed89
RSP: When command window is entered, always step commands
2023-07-06 20:56:00 +09:30
zilmar
115881524b
RSP: Better handling on unaligned SH and SW
2023-07-06 20:55:02 +09:30
zilmar
fbb388fa0f
Rsp: Fix capitalization in rsp_UnknownOpcode
2023-07-06 20:51:17 +09:30
zilmar
07cf94bde3
RSP: only look at SP_STATUS_HALT when seeing if the RSP should run
2023-07-06 20:49:14 +09:30
zilmar
7dc30b1d6d
RSP: Update dissam of load/store vector ops
2023-07-06 17:49:15 +09:30
zilmar
f8f9688386
RSP: get RSP_LH_DMEM and RSP_LW_DMEM to handle end of memory roll over
2023-06-29 14:52:46 +09:30
zilmar
cfc63532dd
RSP: move p_func from RspTypes.h to Cpu.h
2023-06-29 12:31:25 +09:30
zilmar
02da0ccad1
RSP: Use bool instead of Boolean
2023-06-29 12:29:07 +09:30
zilmar
2ce9eaa667
RSP: Rename Types.h to RspTypes.h
2023-06-29 11:03:55 +09:30
zilmar
1c61f15ea9
RSP: Update display of vector ops
2023-06-29 10:59:54 +09:30
zilmar
080a3b69ac
RSP: Create a RSP instruction for decoding the RSP op
2023-06-15 21:09:44 +09:30
zilmar
df215c1cc5
RSP: Fix up rename of filters file
2023-06-15 14:48:07 +09:30
zilmar
ef24ec11d8
Rename RSP to Project64-rsp
2023-06-15 14:45:27 +09:30
zilmar
187bd64915
Core: Update how exceptions are handled with the recompiler
2023-06-08 16:25:05 +09:30
Nayla
18a712ce6a
Update Interface.cpp ( #2367 )
2023-06-03 07:11:57 +09:30
zilmar
f4459fe143
RSP: Update RSP name in package_zip.cmd
2023-06-02 10:52:10 +09:30
zilmar
98b96a60cb
RSP: Get the code to conform to clang-format
2023-06-01 21:16:23 +09:30
zilmar
90fefed579
RSP: Fix text when adding tab to registers
2023-06-01 19:40:53 +09:30
zilmar
1522f17b9c
RSP: Convert base code to be compiled as c++ instead of C
2023-06-01 17:11:26 +09:30
zilmar
a39ebe7d37
Core: Create InitFpuOperation
2023-05-27 10:01:19 +09:30
zilmar
e2eebe566d
Core: fix up for clang
2023-05-18 18:05:54 +09:30
zilmar
b438fddf2e
Core: Add CP2 handling
2023-05-18 18:04:41 +09:30
zilmar
3b8dfce64a
Core: Convert DoBreakException to TriggerException
2023-05-18 11:47:00 +09:30
zilmar
b2c2a03a2e
Core: convert DoFloatingPointException to TriggerException
2023-05-18 11:41:20 +09:30
zilmar
0dfab78c88
Core: Convert DoCopUnusableException to TriggerException
2023-05-18 11:26:36 +09:30
zilmar
456f25eb6b
Core: Get DoIntrException to use TriggerException
2023-05-18 11:19:26 +09:30
zilmar
252f629e14
Core: Convert DoIllegalInstructionException to TriggerException
2023-05-18 11:13:22 +09:30
zilmar
59a1277bed
Core: Convert GenerateOverflowException to TriggerException
2023-05-18 11:05:27 +09:30
zilmar
69fd74ba56
Core: Convert DoSysCallException to TriggerException
2023-05-18 10:56:06 +09:30
zilmar
17df17805d
Core: convert DoTrapException to TriggerException
2023-05-18 10:49:58 +09:30
zilmar
74912ca8c2
Core: handle jump to unaligned addresses
2023-05-18 10:33:57 +09:30
zilmar
6e58edb076
Core: Merge CheckFPUException into CheckFPUResult32
2023-05-15 23:16:54 +09:30
zilmar
62b29622ca
Core: remove usage of fpclassify in CheckFPUInput32 and CheckFPUResult32
2023-05-15 22:57:13 +09:30
zilmar
0ddeb6b981
Core: remove exception out of R4300iOp::CheckFPUInput32
2023-05-15 20:56:56 +09:30
zilmar
fdc637516f
Core: remove Double_RoundToInteger64
2023-05-09 13:05:58 +09:30
zilmar
5a23f48629
Core: remove Double_RoundToInteger32
2023-05-09 12:57:08 +09:30
zilmar
e5b1a9469a
Core: remove Float_RoundToInteger64
2023-05-09 12:50:23 +09:30
zilmar
2c19c2c362
Core: Handle CPO1 unimplemented op
2023-05-09 11:28:59 +09:30
zilmar
85f4f147a1
Core: Remove Float_RoundToInteger32
2023-05-09 09:40:10 +09:30
zilmar
49a385e743
Core: Split CheckFPUException into CheckFPUException and CheckFPUInvalidException
2023-05-09 08:06:15 +09:30
zilmar
fa25b6d2af
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
2023-05-02 11:12:13 +09:30
zilmar
02a48566c0
Core: Remove helper functions from x86 Recompiler Ops
2023-05-02 10:50:49 +09:30
zilmar
5cfb80fcfc
Core: Improve R4300iOp::COP1_S_CVT_W
2023-04-24 19:02:00 +09:30
zilmar
71ef28fd55
Core: Add R4300iOp::COP1_W_CVT_W
2023-04-24 18:55:06 +09:30
zilmar
ab8b004b71
Core: Add a setting for fpu reg caching
2023-04-17 18:47:33 +09:30
zilmar
cba01b2063
Core: Improve R4300iOp::COP1_L_CVT_D
2023-04-17 18:08:51 +09:30
zilmar
d9e69fee65
Core: Improve R4300iOp::COP1_D_CMP
2023-04-17 18:07:58 +09:30
zilmar
0cc6d21ad1
Core: Improve R4300iOp::COP1_S_CMP
2023-04-17 18:06:42 +09:30
zilmar
9297b1c4b8
Core: Improve COP1_S_CVT_D, COP1_W_CVT_D, COP1_D_CVT_S, COP1_W_CVT_S, COP1_L_CVT_S,
2023-04-11 16:20:24 +09:30
zilmar
9a04293a67
Update arm/arm64 to use asmjit
2023-04-05 10:16:21 +09:30
zilmar
2c40d47a34
Start to look at x64 recompiler
2023-04-04 17:44:42 +09:30
zilmar
fe35d950f3
x64: Change MemoryStackPos to be a pointer
2023-04-03 09:08:43 +09:30
zilmar
422a42cae3
Core: More work improve the accuracy of cop1
2023-03-28 13:12:59 +10:30
zilmar
ce69324dbe
Core: Update R4300iOp::COP1_S_MUL to handle exceptions
2023-03-21 10:49:49 +10:30
zilmar
cbf67cede4
Core: Update sub.d to handle exceptions
2023-03-20 17:17:31 +10:30
zilmar
96787690c7
Core: Fix CoprocessorUnitNumber on exception
2023-03-20 12:09:06 +10:30
zilmar
7f7aee7232
Core: remove FAKE_CAUSE_REGISTER
2023-03-14 12:14:10 +10:30
David Benepe
96792b18c8
Fixed DPI scaling issue in some debugger windows ( #2353 )
2023-03-12 16:58:32 +10:30
zilmar
9093b42d47
Core: improve the accuracy of COP1_S_SUB
2023-03-06 20:58:47 +10:30
zilmar
306f21b5fa
Core: Improve accuracy of add.d
2023-03-06 18:28:32 +10:30
zilmar
a25e5ca4c0
x64: Fix rom browser showing columns
2023-03-04 07:19:35 +10:30
Matando
f048fb26e2
Fix MBC30 transferpak support in nrage input plugin ( #2292 )
2023-03-03 09:58:24 +10:30
zilmar
ea70218d1c
Clean up warnings
2023-02-28 10:09:08 +10:30
zilmar
cb124b7009
x64: Get PluginRSP to build for x64
2023-02-27 11:25:22 +10:30
zilmar
0e5b6cd0e8
Common: update stdstr::Replace with the version of replace being used
2023-02-27 11:02:25 +10:30
zilmar
1864adcb35
Core: improve the accuracy of COP1_S_ADD
2023-02-21 14:54:22 +10:30
jarupxx
3aef396007
Add editbox to choose directory dialog ( #2340 )
2023-02-14 08:12:38 +10:30
zilmar
3acd56ae61
Core Fix up clang formatting
2023-02-14 08:05:40 +10:30
zilmar
2db5c81af5
Core: Change Project64.rdb so it use 1's and 0's instead of "Yes" or "No"
2023-02-13 21:05:57 +10:30
zilmar
e14e10f4b0
Core: Fix handling of R4300iOp::COP1_S_CMP and R4300iOp::COP1_D_CMP
2023-02-13 16:22:50 +10:30
zilmar
baa5dbe257
Core: Add some error message when failing to load rom
2023-02-13 12:04:31 +10:30
zilmar
4390a0926c
Remove _Pairib usage
2023-02-13 08:55:56 +10:30
zilmar
a8a553b316
Core: fix code to make clang happy
2023-01-31 07:54:47 +10:30
zilmar
83a7d9e3f2
Core: Start to improve the accuracy of R4300iOp::COP1_S_ADD
2023-01-30 20:36:58 +10:30
zilmar
7affd514c0
Core: Convert TEST_COP1_USABLE_EXCEPTION from a macro to a function
2023-01-30 11:40:03 +10:30
zilmar
f802b18cdc
Core: Change to using fenv.h instead of including the code directly
2023-01-30 10:07:51 +10:30
zilmar
fb6bda321c
Core: SW_Register needs to protect the register
2023-01-23 15:30:39 +10:30
zilmar
0e52bfb185
Core: Fix the allocation of rdram size if set in the rdb
2023-01-23 08:30:13 +10:30
zilmar
210ebd42de
Core: have an option for rdram to be different between known and unknown roms
2023-01-16 20:53:48 +10:30
zilmar
dbd360f676
Core: Handle exception of mov word ptr ds:[E01F4F52h],ax
2023-01-09 17:53:16 +10:30
zilmar
531a7df959
Core: Improve StoreInstruc
2023-01-09 14:26:35 +10:30
zilmar
ccae22afc5
Core: Revert SPECIAL_SRA and SPECIAL_SRAV to old version when running as 32bit
2023-01-09 13:47:41 +10:30
zilmar
b6629ac1d3
Android: Fix build warning with CX86Ops::CallThis
2023-01-03 14:49:35 +10:30
zilmar
e0373025ef
Core: Have user rom settings in Project64.rdb.user
2023-01-03 13:08:00 +10:30
zilmar
80aecdc5e3
Core: Improve R4300iOp::COP1_CT
2023-01-02 19:49:19 +10:30
zilmar
3c73c06b01
Update Project files to remove some headers that no longer exist
2023-01-02 17:56:12 +10:30
zilmar
811aaf9d36
Core: Fix up SPECIAL_SRAV for 64bit copy
2022-12-26 18:34:53 +10:30
zilmar
c619b71b26
Core: get sra to handle 64bit shift
2022-12-26 18:13:45 +10:30
zilmar
b217428fee
Core: fix up masking in CX86RecompilerOps::COP1_CT
2022-12-26 17:35:58 +10:30
zilmar
0cc7ede816
Core: Fix up BGEZALL in recompiler
2022-12-26 17:19:32 +10:30
zilmar
2c6d3429b7
Core: Fix handling of BGEZAL ra in recompiler
2022-12-26 16:14:05 +10:30
zilmar
f6e4443dda
Core: Revert Unaligned DMA to fix some hacks
2022-12-26 15:15:28 +10:30
zilmar
f380d326fe
Core: Start to handle jump in delay slot
2022-12-26 12:54:04 +10:30
zilmar
620aabcf9e
Core: Add clang script and check on building release
2022-12-19 15:51:02 +10:30
zilmar
bd1b1b4dbb
Core: Missed file for code clean up
2022-12-19 15:36:08 +10:30
zilmar
c0341bb759
Core: Code clean up for clang
2022-12-19 15:35:17 +10:30
zilmar
ae62981aef
Core: Remove unaligned dma
2022-12-19 10:15:31 +10:30
zilmar
cbacddb65e
Core: Make 32bit CPU recompiler only setting
2022-12-19 09:07:26 +10:30
zilmar
6c154f6547
Core: Add Cop2/Cop3 handling exception
2022-12-12 21:29:16 +10:30
zilmar
c8bb04b6b0
Core: Mask COP1_CT reg 31
2022-12-12 19:04:03 +10:30
zilmar
d3afe97d38
Core: Initialize FPR_Ctrl[Revision] to 0xA00
2022-12-12 15:27:07 +10:30
zilmar
ff56992542
Android: Some more core changes for asmjit
2022-12-07 09:04:55 +10:30
zilmar
72705cf66a
Android: Get it to build asmjit
2022-12-07 08:33:34 +10:30
Johan Mattsson
c100d527fc
Small fixes ( #2314 )
...
* Assign the null pointer
* Initialize variable
* Fix while-conditions
2022-12-05 19:33:48 +10:30
zilmar
6b04b908bf
Core: Handle bgezal ra in the recompiler
2022-12-05 14:09:03 +10:30
zilmar
d35d2e6abe
Core: Move ReadsGPR, WritesGPR, ReadsHI(), ReadsLO(), WritesHI(), WritesLO() out of OpInfo and into R4300iInstruction
2022-12-05 12:23:09 +10:30
zilmar
138868d9ac
Core: Get x64 compiling
2022-11-30 17:19:15 +10:30
zilmar
ed357e5d97
Core: Get recompiler to call PifRamHandler when in pif address space
2022-11-27 11:07:28 +10:30
zilmar
1e3fff2b41
Core: ignore memory stack pointer when stack pointer is reset
2022-11-25 09:34:54 +10:30
zilmar
1f2fe96d76
Merge branch 'develop' of https://github.com/project64/project64 into develop
2022-11-24 09:10:50 +10:30
zilmar
79d749e33d
Core: fix bug in CX86Ops::CallFunc when not logging opcodes
2022-11-24 09:10:15 +10:30
Squall Leonhart
8eecb0c823
Extend mempak Index Table to the intended 256 bytes, so that the default checksum is actually correct, and include the backup of that data. ( #2304 )
...
* just a test to see what happens
* duplicate the full 256 bytes.
* Didn't need to duplicate it after all.
The index table wasn't actually 256 bytes as intended, so the checksum was invalid.
Cruis'n'USA 1.0 didn't like this one bit.
* fully duplicate it after all just in case of a rare case
where a game breaks without the backup of the checksum and table.
* this looks properly duplicated now.
perhaps
2022-11-24 07:49:48 +10:30
zilmar
e3aa2514c1
Core: Fix bug in CX86RecompilerOps::SPECIAL_DIV
2022-11-23 20:16:38 +10:30
zilmar
8e94b3086b
Core: Change recompiler to use asmjit
2022-11-23 14:46:55 +10:30
zilmar
2a6d3cd519
Core: remove #ifdef toremove block in CX86RecompilerOps::SPECIAL_DMULTU()
2022-11-21 08:55:51 +10:30
zilmar
9743f12b1d
Core: Remvoe #ifdef LinkBlocks code block
2022-11-21 08:52:19 +10:30
zilmar
989827cb77
Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram
2022-11-14 21:20:28 +10:30
zilmar
97e3f50007
Core: Update mask of registers in CRegisters::Cop0_MT
2022-11-14 20:56:21 +10:30
zilmar
cabcd2cc95
Core: Handle masking of random in CSystemTimer::UpdateTimers
2022-11-14 11:19:02 +10:30
zilmar
02660c2f62
RSP: dma to either DMEM or IMEM based on address
2022-11-08 20:17:57 +10:30
zilmar
48da86bea1
Core: if Rom is larger than ISViewerHandler, then use rom handler
2022-11-08 10:54:01 +10:30
zilmar
529812fdca
Core: Switch to use asmjit registers in recompiler
2022-11-07 21:03:32 +10:30
zilmar
0e1a72a0b1
Add asmjit code
2022-11-07 16:36:46 +10:30
zilmar
a4c49a3567
Core: rearrange XorVariableToX86reg parameters
2022-11-07 16:30:09 +10:30
zilmar
2fcce6cdd5
Cote: TestVariable rearrange parameters
2022-11-07 16:25:54 +10:30
zilmar
fe1f99ae1c
Core: rearrange TestConstToX86Reg parameters
2022-11-07 16:22:51 +10:30
zilmar
ce939100c5
Core: rearrange OrVariableToX86Reg parameters
2022-11-07 16:18:54 +10:30
zilmar
697397f1dd
Core: Rearrange OrConstToX86Reg parameters
2022-11-07 16:03:45 +10:30
zilmar
40259d01ca
Core: rearrange OrConstToVariable parameters
2022-11-07 15:55:19 +10:30
zilmar
c95aae8e38
Core: rearrange MoveZxVariableToX86regHalf parameters
2022-11-07 15:48:39 +10:30
zilmar
96eed54a1d
Core: rearrange MoveZxVariableToX86regByte parameters
2022-11-07 15:44:10 +10:30
zilmar
4570d9eab5
Core: rearrange MoveZxHalfX86regPointerToX86reg variables
2022-11-07 15:40:01 +10:30
zilmar
8a2197707b
Core: rearrange MoveZxByteX86regPointerToX86reg parameters
2022-11-07 15:38:36 +10:30
zilmar
59892a266b
Core: rearrange MoveX86regToVariable parameters
2022-11-07 15:30:25 +10:30
zilmar
91a192cead
Core: rearrange MoveX86regToMemory parameters
2022-11-07 14:40:28 +10:30
zilmar
891d487fdd
Core: rearrange MoveX86regPointerToX86regDisp8 parameters
2022-11-07 14:38:34 +10:30
zilmar
d74694d16f
Core: rearrange MoveX86regPointerToX86reg parameters
2022-11-07 14:36:11 +10:30
zilmar
ebca0854d7
Core: rearrange MoveX86regHalfToX86regPointer parameters
2022-11-07 14:29:33 +10:30
zilmar
efac334136
Rearrange MoveX86regHalfToVariable parameters
2022-11-07 14:26:06 +10:30
zilmar
1966b842f3
Core: rearrange MoveX86regByteToX86regPointer parameters
2022-11-07 14:24:22 +10:30
zilmar
bb51c3d11d
Core: rearrange MoveX86regByteToVariable parameters
2022-11-07 14:23:09 +10:30
zilmar
d19fc10f0c
Core: remove MoveVariableToX86regByte, MoveVariableToX86regHalf, MoveX86regByteToN64Mem
2022-11-07 14:21:26 +10:30
zilmar
8702e6b67c
core: Rearrange MoveVariableDispToX86Reg parmeters
2022-11-07 14:18:15 +10:30
zilmar
10dd2c662a
Core: rearrange MoveSxVariableToX86regHalf parameters
2022-11-07 14:08:23 +10:30
zilmar
eb5d0ce363
Core: rearrange MoveSxVariableToX86regByte parameters
2022-11-07 14:05:08 +10:30
zilmar
1584d25cd9
Core: Rearrange MoveSxHalfX86regPointerToX86reg parameters
2022-11-07 13:41:49 +10:30
zilmar
fe7b8afa92
Core: Rearrange MoveSxByteX86regPointerToX86reg parameters
2022-11-07 13:37:29 +10:30
zilmar
288fe4d222
Core: reorder MoveConstToX86regPointer parameters
2022-11-07 11:35:11 +10:30
zilmar
b68caed6c4
Core: reorder MoveConstByteToX86regPointer parameters
2022-11-07 11:32:46 +10:30
zilmar
eb0aa05a48
Core: remove x86 functions referencing n64mem
2022-11-07 11:30:51 +10:30
zilmar
40456f12db
Core: Change order of MoveConstToVariable
2022-11-07 11:26:17 +10:30
zilmar
5c7390324a
Core: reorder MoveConstToMemoryDisp parameters
2022-11-07 10:45:28 +10:30
zilmar
8272d18aa6
Reorder MoveConstHalfToX86regPointer parameters
2022-11-07 10:43:27 +10:30
zilmar
0123100233
Core: reorder MoveConstHalfToVariable parameters
2022-11-07 10:37:29 +10:30
zilmar
bdb2d040f9
Core: reorder MoveConstByteToVariable parameters
2022-11-07 10:34:25 +10:30
zilmar
eb8b36603b
Core: remove MoveConstByteToN64Mem, MoveConstHalfToN64Mem, MoveConstToN64Mem, MoveConstToN64MemDisp
2022-11-07 10:27:22 +10:30
zilmar
9dd2df36d4
Core: remove CX86Ops::CompVariableToX86reg
2022-11-07 10:18:55 +10:30
zilmar
09fb90117e
Core: reorder CompConstToVariable parameters
2022-11-07 10:11:55 +10:30
zilmar
ade6787e6d
Core: Reorder AndVariableToX86Reg parameters
2022-11-07 10:00:35 +10:30
zilmar
513ca57f46
Core: Reorder parameters for AndVariableDispToX86Reg
2022-11-07 09:51:41 +10:30
zilmar
897fd39a0e
Core: reorder AndConstToVariable parameters
2022-11-07 09:40:12 +10:30
zilmar
c13080d7c3
Core: Reorder AddX86regToVariable parameters
2022-11-07 09:34:34 +10:30
zilmar
c7ac150b91
Core: Capitalize Reg in x86ops
2022-11-07 09:31:37 +10:30
zilmar
dbd20dd993
Core: Reorder AddConstToVariable parameters
2022-11-07 09:29:06 +10:30
zilmar
6a69e2e86a
Core: remove CX86Ops::AdcX86regToVariable
2022-11-07 09:25:31 +10:30
zilmar
b3c6858b69
Core: Change COP0 registers to use an enum
2022-11-07 09:24:58 +10:30
zilmar
fd71b2dfcb
Core: Handle branch/jump in a delay slot in the Interpreter
2022-11-01 08:59:15 +10:30
zilmar
94247ce1a6
Core: handle better CX86RecompilerOps::ResetMemoryStack
2022-10-28 16:41:24 +10:30
zilmar
edeaf14471
Update SortRdb code and add it to project
2022-10-24 21:00:51 +10:30
zilmar
6c9237f603
Core: Get recompiler to handle RESERVED31
2022-10-24 16:50:12 +10:30
zilmar
d06d1526d9
Core: Change the order of MoveVariableToX86reg parameters
2022-10-24 16:05:19 +10:30
zilmar
af3c31b0ff
Core: Change the order of MoveConstToX86Pointer
2022-10-24 15:09:24 +10:30
zilmar
538933e0a5
Core: reoder MoveConstToX86reg parameters
2022-10-24 15:05:31 +10:30
zilmar
dd61a4351d
Core: Reorder the order of MoveX86regToX86regPointer
2022-10-24 12:56:38 +10:30
zilmar
fdbc31961f
Core: Change the order of MoveX86RegToX86Reg
2022-10-24 12:48:51 +10:30
zilmar
8713878994
Core: Change order of MoveX86regToX86Pointer parameters
2022-10-24 12:13:48 +10:30
zilmar
ef8067cf12
Android: Make a skeleton for arm to start over arm recompiler
2022-10-24 11:15:46 +10:30
zilmar
ae6157427f
Recompiler: Handle stack if it is in IMEM/DMEM
2022-10-21 10:03:33 +10:30
zilmar
4525e8b6f3
Core: Move IMEM/DMEM into SPRegistersHandler
2022-10-17 17:29:05 +10:30
zilmar
96244cd6fd
Core: Update NonMemory Access to pifram
2022-10-17 11:31:54 +10:30
zilmar
53e00b8023
Core: Clean up masking of COP0 registers
2022-10-17 09:06:22 +10:30
zilmar
9186dcab39
Core: Allow reading from ISViewerHandler
2022-10-17 08:59:26 +10:30
zilmar
305648f02f
Core: Do not allow byte aligned blocks after the first block
2022-10-17 08:53:41 +10:30
zilmar
60969607c8
Core: Ignore EverDrive - 64 X7 Serial Registers in PI_DMA_READ
2022-10-17 08:48:30 +10:30
zilmar
65bbc375b9
Core: Fix R4300iOp::LWC1 to have 64bit address
2022-10-17 08:36:17 +10:30
zilmar
c16307ec0f
Core: Move Pifram code into PifRamHandler
2022-10-17 08:27:52 +10:30
zilmar
315231d439
Core: Writing to 0x0410000C was not calling AfterCallDirect()
2022-10-11 17:31:28 +10:30
zilmar
2199c9cd1f
Core: Inherit STATE_CONST_64 in CX86RecompilerOps::InheritParentInfo
2022-10-11 17:24:06 +10:30
zilmar
801a3e29fc
Core: Handle more with LW and invalid addresses
2022-10-10 20:25:16 +10:30
zilmar
082ec9c22e
Core: Handle unaligned LH
2022-10-10 17:17:56 +10:30
zilmar
ca037abf2b
Core: Update counters when updating wired
2022-10-10 15:44:52 +10:30
zilmar
29e1468338
Core: Ignore next targeting branch if last op in block
2022-10-10 14:30:20 +10:30