Core: Add fpu exceptions to COP1_S_MUL
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@ -7710,24 +7710,49 @@ void CX86RecompilerOps::COP1_S_MUL()
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uint32_t Reg1 = m_Opcode.ft == m_Opcode.fd ? m_Opcode.ft : m_Opcode.fs;
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uint32_t Reg2 = m_Opcode.ft == m_Opcode.fd ? m_Opcode.fs : m_Opcode.ft;
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CompileCop1Test();
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m_RegWorkingSet.FixRoundModel(CRegInfo::RoundDefault);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, Reg1, CRegInfo::FPU_Float);
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if (m_RegWorkingSet.RegInStack(Reg2, CRegInfo::FPU_Float))
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if (FpuExceptionInRecompiler())
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{
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m_Assembler.fmul(asmjit::x86::st0, m_RegWorkingSet.StackPosition(Reg2));
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CompileInitFpuOperation(CRegInfo::RoundDefault);
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if (m_RegWorkingSet.RegInStack(Reg2, CRegInfo::FPU_Float))
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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return;
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}
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else
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{
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asmjit::x86::Gp TempReg = m_RegWorkingSet.FPRValuePointer(Reg1, CRegInfo::FPU_Float);
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CompileCheckFPUInput32(TempReg);
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m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
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TempReg = m_RegWorkingSet.FPRValuePointer(Reg2, CRegInfo::FPU_Float);
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CompileCheckFPUInput32(TempReg);
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m_RegWorkingSet.PrepareFPTopToBe(m_Opcode.fd, Reg1, CRegInfo::FPU_Float);
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m_Assembler.fmul(asmjit::x86::dword_ptr(TempReg));
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m_RegWorkingSet.SetX86Protected(GetIndexFromX86Reg(TempReg), false);
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}
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CompileCheckFPUResult32(m_Opcode.fd);
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m_RegWorkingSet.SetFPTopAs(m_Opcode.fd);
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}
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else
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{
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m_RegWorkingSet.UnMap_FPR(Reg2, true);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Float);
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CompileCop1Test();
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m_RegWorkingSet.FixRoundModel(CRegInfo::RoundDefault);
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asmjit::x86::Gp TempReg = m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&m_Reg.m_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
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m_Assembler.fmul(asmjit::x86::dword_ptr(TempReg));
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, Reg1, CRegInfo::FPU_Float);
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if (m_RegWorkingSet.RegInStack(Reg2, CRegInfo::FPU_Float))
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{
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m_Assembler.fmul(asmjit::x86::st0, m_RegWorkingSet.StackPosition(Reg2));
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}
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else
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{
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m_RegWorkingSet.UnMap_FPR(Reg2, true);
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m_RegWorkingSet.Load_FPR_ToTop(m_Opcode.fd, m_Opcode.fd, CRegInfo::FPU_Float);
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asmjit::x86::Gp TempReg = m_RegWorkingSet.Map_TempReg(x86Reg_Unknown, -1, false, false);
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m_Assembler.MoveVariableToX86reg(TempReg, (uint8_t *)&m_Reg.m_FPR_S[Reg2], stdstr_f("_FPR_S[%d]", Reg2).c_str());
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m_Assembler.fmul(asmjit::x86::dword_ptr(TempReg));
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}
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m_RegWorkingSet.UnMap_FPR(m_Opcode.fd, true);
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}
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m_RegWorkingSet.UnMap_FPR(m_Opcode.fd, true);
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}
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void CX86RecompilerOps::COP1_S_DIV()
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