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RSP: Create a RSP instruction for decoding the RSP op

This commit is contained in:
zilmar 2023-06-15 21:09:44 +09:30
parent df215c1cc5
commit 080a3b69ac
17 changed files with 1107 additions and 849 deletions
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4
Source/Project64-rsp/Cpu.cpp
View File

@ -1,5 +1,5 @@
#include "Cpu.h"
#include "OpCode.h"
#include "cpu/RSPOpcode.h"
#include "Profiling.h"
#include "RSP Command.h"
#include "RSP registers.h"
@ -15,7 +15,7 @@
#include <windows.h>
UDWORD EleSpec[32], Indx[32];
OPCODE RSPOpC;
RSPOpcode RSPOpC;
uint32_t *PrgCount, NextInstruction, RSP_Running, RSP_MfStatusCount;
p_func RSP_Opcode[64];

5
Source/Project64-rsp/Cpu.h
View File

@ -1,4 +1,5 @@
#include "OpCode.h"
#include "cpu\RSPOpcode.h"
#include "Types.h"
#include <Windows.h>
extern UDWORD EleSpec[32], Indx[32];
@ -12,7 +13,7 @@ extern p_func RSP_Vector[64];
extern p_func RSP_Lc2[32];
extern p_func RSP_Sc2[32];
extern uint32_t *PrgCount, RSP_Running;
extern OPCODE RSPOpC;
extern RSPOpcode RSPOpC;
void SetCPU(DWORD core);
void Build_RSP(void);

4
Source/Project64-rsp/Interpreter CPU.cpp
View File

@ -7,7 +7,7 @@
#include "breakpoint.h"
#include "log.h"
#include "memory.h"
#include "opcode.h"
#include "cpu/RSPOpcode.h"
#include <float.h>
#include <stdio.h>
#include <windows.h>
@ -429,7 +429,7 @@ DWORD RunInterpreterCPU(DWORD Cycles)
RDP_LogLoc(*PrgCount);
RSP_LW_IMEM(*PrgCount, &RSPOpC.Hex);
RSP_LW_IMEM(*PrgCount, &RSPOpC.Value);
RSP_Opcode[RSPOpC.op]();
RSP_GPR[0].W = 0x00000000; // MIPS $zero hard-wired to 0

5
Source/Project64-rsp/Interpreter Ops.cpp
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@ -8,6 +8,7 @@
#include "log.h"
#include "memory.h"
#include "x86.h"
#include "cpu/RSPInstruction.h"
#include <math.h>
#include <stdio.h>
#include <windows.h>
@ -2250,12 +2251,12 @@ void rsp_UnknownOpcode(void)
if (InRSPCommandsWindow)
{
SetRSPCommandViewto(*PrgCount);
DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPOpcodeName(RSPOpC.Hex, *PrgCount));
DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*PrgCount, RSPOpC.Value).NameAndParam().c_str());
}
else
{
sprintf(Message, "Unhandled Opcode\n%s\n\nStopping emulation.\n\nWOuld you like to open the debugger?",
RSPOpcodeName(RSPOpC.Hex, *PrgCount));
RSPInstruction(*PrgCount, RSPOpC.Value).NameAndParam().c_str());
response = MessageBoxA(NULL, Message, "Error", MB_YESNO | MB_ICONERROR);
if (response == IDYES)
{

189
Source/Project64-rsp/OpCode.h
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@ -1,189 +0,0 @@
#pragma once
#include "Types.h"
#pragma warning(push)
#pragma warning(disable : 4201) // Non-standard extension used: nameless struct/union
typedef union tagOPCODE
{
uint32_t Hex;
unsigned char Ascii[4];
struct
{
unsigned immediate : 16;
unsigned rt : 5;
unsigned rs : 5;
unsigned op : 6;
};
struct
{
unsigned offset : 16;
unsigned : 5;
unsigned base : 5;
unsigned : 6;
};
struct
{
unsigned target : 26;
unsigned : 6;
};
struct
{
unsigned funct : 6;
unsigned sa : 5;
unsigned rd : 5;
unsigned : 5;
unsigned : 5;
unsigned : 6;
};
struct
{
signed voffset : 7;
unsigned del : 4;
unsigned : 5;
unsigned dest : 5;
unsigned : 5;
unsigned : 6;
};
} OPCODE;
#pragma warning(pop)
// RSP opcodes
#define RSP_SPECIAL 0
#define RSP_REGIMM 1
#define RSP_J 2
#define RSP_JAL 3
#define RSP_BEQ 4
#define RSP_BNE 5
#define RSP_BLEZ 6
#define RSP_BGTZ 7
#define RSP_ADDI 8
#define RSP_ADDIU 9
#define RSP_SLTI 10
#define RSP_SLTIU 11
#define RSP_ANDI 12
#define RSP_ORI 13
#define RSP_XORI 14
#define RSP_LUI 15
#define RSP_CP0 16
#define RSP_CP2 18
#define RSP_LB 32
#define RSP_LH 33
#define RSP_LW 35
#define RSP_LBU 36
#define RSP_LHU 37
#define RSP_SB 40
#define RSP_SH 41
#define RSP_SW 43
#define RSP_LC2 50
#define RSP_SC2 58
// RSP special opcodes
#define RSP_SPECIAL_SLL 0
#define RSP_SPECIAL_SRL 2
#define RSP_SPECIAL_SRA 3
#define RSP_SPECIAL_SLLV 4
#define RSP_SPECIAL_SRLV 6
#define RSP_SPECIAL_SRAV 7
#define RSP_SPECIAL_JR 8
#define RSP_SPECIAL_JALR 9
#define RSP_SPECIAL_BREAK 13
#define RSP_SPECIAL_ADD 32
#define RSP_SPECIAL_ADDU 33
#define RSP_SPECIAL_SUB 34
#define RSP_SPECIAL_SUBU 35
#define RSP_SPECIAL_AND 36
#define RSP_SPECIAL_OR 37
#define RSP_SPECIAL_XOR 38
#define RSP_SPECIAL_NOR 39
#define RSP_SPECIAL_SLT 42
#define RSP_SPECIAL_SLTU 43
// RSP RegImm opcodes
#define RSP_REGIMM_BLTZ 0
#define RSP_REGIMM_BGEZ 1
#define RSP_REGIMM_BLTZAL 16
#define RSP_REGIMM_BGEZAL 17
// RSP COP0 opcodes
#define RSP_COP0_MF 0
#define RSP_COP0_MT 4
// RSP COP2 opcodes
#define RSP_COP2_MF 0
#define RSP_COP2_CF 2
#define RSP_COP2_MT 4
#define RSP_COP2_CT 6
// RSP vector opcodes
#define RSP_VECTOR_VMULF 0
#define RSP_VECTOR_VMULU 1
#define RSP_VECTOR_VRNDP 2
#define RSP_VECTOR_VMULQ 3
#define RSP_VECTOR_VMUDL 4
#define RSP_VECTOR_VMUDM 5
#define RSP_VECTOR_VMUDN 6
#define RSP_VECTOR_VMUDH 7
#define RSP_VECTOR_VMACF 8
#define RSP_VECTOR_VMACU 9
#define RSP_VECTOR_VRNDN 10
#define RSP_VECTOR_VMACQ 11
#define RSP_VECTOR_VMADL 12
#define RSP_VECTOR_VMADM 13
#define RSP_VECTOR_VMADN 14
#define RSP_VECTOR_VMADH 15
#define RSP_VECTOR_VADD 16
#define RSP_VECTOR_VSUB 17
#define RSP_VECTOR_VABS 19
#define RSP_VECTOR_VADDC 20
#define RSP_VECTOR_VSUBC 21
#define RSP_VECTOR_VSAW 29
#define RSP_VECTOR_VLT 32
#define RSP_VECTOR_VEQ 33
#define RSP_VECTOR_VNE 34
#define RSP_VECTOR_VGE 35
#define RSP_VECTOR_VCL 36
#define RSP_VECTOR_VCH 37
#define RSP_VECTOR_VCR 38
#define RSP_VECTOR_VMRG 39
#define RSP_VECTOR_VAND 40
#define RSP_VECTOR_VNAND 41
#define RSP_VECTOR_VOR 42
#define RSP_VECTOR_VNOR 43
#define RSP_VECTOR_VXOR 44
#define RSP_VECTOR_VNXOR 45
#define RSP_VECTOR_VRCP 48
#define RSP_VECTOR_VRCPL 49
#define RSP_VECTOR_VRCPH 50
#define RSP_VECTOR_VMOV 51
#define RSP_VECTOR_VRSQ 52
#define RSP_VECTOR_VRSQL 53
#define RSP_VECTOR_VRSQH 54
#define RSP_VECTOR_VNOOP 55
// RSP LSC2 opcodes
#define RSP_LSC2_BV 0
#define RSP_LSC2_SV 1
#define RSP_LSC2_LV 2
#define RSP_LSC2_DV 3
#define RSP_LSC2_QV 4
#define RSP_LSC2_RV 5
#define RSP_LSC2_PV 6
#define RSP_LSC2_UV 7
#define RSP_LSC2_HV 8
#define RSP_LSC2_FV 9
#define RSP_LSC2_WV 10
#define RSP_LSC2_TV 11

4
Source/Project64-rsp/Project64-rsp.vcxproj
View File

@ -48,6 +48,7 @@
<ItemGroup>
<ClCompile Include="breakpoint.cpp" />
<ClCompile Include="Cpu.cpp" />
<ClCompile Include="cpu\RSPiInstruction.cpp" />
<ClCompile Include="dma.cpp" />
<ClCompile Include="Interpreter CPU.cpp" />
<ClCompile Include="Interpreter Ops.cpp" />
@ -68,12 +69,13 @@
<ItemGroup>
<ClInclude Include="breakpoint.h" />
<ClInclude Include="Cpu.h" />
<ClInclude Include="cpu\RSPInstruction.h" />
<ClInclude Include="cpu\RSPOpcode.h" />
<ClInclude Include="dma.h" />
<ClInclude Include="Interpreter CPU.h" />
<ClInclude Include="Interpreter Ops.h" />
<ClInclude Include="log.h" />
<ClInclude Include="memory.h" />
<ClInclude Include="OpCode.h" />
<ClInclude Include="Profiling.h" />
<ClInclude Include="Recompiler CPU.h" />
<ClInclude Include="Recompiler Ops.h" />

22
Source/Project64-rsp/Project64-rsp.vcxproj.filters
View File

@ -16,6 +16,12 @@
<UniqueIdentifier>{53b9495d-f564-4b1d-968c-42c816ca2d41}</UniqueIdentifier>
<Extensions>ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe</Extensions>
</Filter>
<Filter Include="Source Files\cpu">
<UniqueIdentifier>{150686bc-00e7-44b5-bfee-3228ba09841f}</UniqueIdentifier>
</Filter>
<Filter Include="Header Files\cpu">
<UniqueIdentifier>{3054cc35-3f98-4464-9642-ad02eaed525f}</UniqueIdentifier>
</Filter>
</ItemGroup>
<ItemGroup>
<ClInclude Include="breakpoint.h">
@ -39,9 +45,6 @@
<ClInclude Include="memory.h">
<Filter>Header Files\RSP Header Files</Filter>
</ClInclude>
<ClInclude Include="OpCode.h">
<Filter>Header Files\RSP Header Files</Filter>
</ClInclude>
<ClInclude Include="Profiling.h">
<Filter>Header Files\RSP Header Files</Filter>
</ClInclude>
@ -72,10 +75,16 @@
<ClInclude Include="Version.h">
<Filter>Header Files\RSP Header Files</Filter>
</ClInclude>
<ClInclude Include="cpu\RSPInstruction.h">
<Filter>Header Files\cpu</Filter>
</ClInclude>
<ClInclude Include="cpu\RSPOpcode.h">
<Filter>Header Files\cpu</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<ResourceCompile Include="RSP.rc">
<Filter>Resource Files</Filter>
<ResourceCompile Include="Project64-rsp.rc">
<Filter>Source Files</Filter>
</ResourceCompile>
</ItemGroup>
<ItemGroup>
@ -133,5 +142,8 @@
<ClCompile Include="X86.cpp">
<Filter>Source Files</Filter>
</ClCompile>
<ClCompile Include="cpu\RSPiInstruction.cpp">
<Filter>Source Files\cpu</Filter>
</ClCompile>
</ItemGroup>
</Project>

440
Source/Project64-rsp/RSP Command.cpp
View File

@ -9,7 +9,8 @@
#include "Types.h"
#include "breakpoint.h"
#include "memory.h"
#include "opcode.h"
#include "cpu/RSPOpcode.h"
#include "cpu/RSPInstruction.h"
#define RSP_MaxCommandLines 30
@ -141,11 +142,12 @@ int DisplayRSPCommand(DWORD location, int InsertPos)
}
if (Redraw)
{
RSPInstruction Instruction(0x1000 | location, OpCode);
RSPCommandLine[InsertPos].Location = location;
RSPCommandLine[InsertPos].status = status;
RSPCommandLine[InsertPos].opcode = OpCode;
sprintf(RSPCommandLine[InsertPos].String, " 0x%04X\t%s", 0x1000 | location,
RSPOpcodeName(OpCode, 0x1000 | location));
sprintf(RSPCommandLine[InsertPos].String, " 0x%04X\t%s\t%s", 0x1000 | location, Instruction.Name(), Instruction.Param());
if (SendMessage(hList, LB_GETCOUNT, 0, 0) <= InsertPos)
{
SendMessage(hList, LB_INSERTSTRING, (WPARAM)InsertPos, (LPARAM)location);
@ -203,7 +205,7 @@ void DumpRSPCode(void)
&string[0],
" 0x%03X\t%s\r\n",
location,
RSPOpcodeName(OpCode, location));
RSPInstruction(location, OpCode).NameAndParam().c_str());
if (characters_converted < 0)
{
@ -874,436 +876,6 @@ void RSP_Commands_Setup(HWND hDlg)
SetWindowPos(hDlg, NULL, X, Y, WindowWidth, WindowHeight, SWP_NOZORDER | SWP_SHOWWINDOW);
}
// clang-format off
static const char unused_op[] = "invalid";
static const char* mnemonics_primary[8 << 3] = {
"SPECIAL","REGIMM" ,"J" ,"JAL" ,"BEQ" ,"BNE" ,"BLEZ" ,"BGTZ" ,
"ADDI" ,"ADDIU" ,"SLTI" ,"SLTIU" ,"ANDI" ,"ORI" ,"XORI" ,"LUI" ,
"COP0" ,unused_op,"COP2" ,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
"LB" ,"LH" ,unused_op,"LW" ,"LBU" ,"LHU" ,unused_op,unused_op,
"SB" ,"SH" ,unused_op,"SW" ,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,"LWC2" ,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,"SWC2" ,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_special[8 << 3] = {
"SLL" ,unused_op,"SRL" ,"SRA" ,"SLLV" ,unused_op,"SRLV" ,"SRAV" ,
"JR" ,"JALR" ,unused_op,unused_op,unused_op,"BREAK" ,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
"ADD" ,"ADDU" ,"SUB" ,"SUBU" ,"AND" ,"OR" ,"XOR" ,"NOR" ,
unused_op,unused_op,"SLT" ,"SLTU" ,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_regimm[8 << 2] = {
"BLTZ" ,"BGEZ" ,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
"BLTZAL" ,"BGEZAL" ,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_cop0[8 << 2] = {
"MFC0" ,unused_op,unused_op,unused_op,"MTC0" ,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_cop2[8 << 2] = {
"MFC2" ,unused_op,"CFC2" ,unused_op,"MTC2" ,unused_op,"CTC2" ,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,
"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,"C2" ,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_vector[8 << 3] = {
"VMULF" ,"VMULU" ,unused_op,unused_op,"VMUDL" ,"VMUDM" ,"VMUDN" ,"VMUDH" ,
"VMACF" ,"VMACU" ,unused_op,"VMACQ" ,"VMADL" ,"VMADM" ,"VMADN" ,"VMADH" ,
"VADD" ,"VSUB" ,unused_op,"VABS" ,"VADDC" ,"VSUBC" ,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,"VSAW" ,unused_op,unused_op,
"VLT" ,"VEQ" ,"VNE" ,"VGE" ,"VCL" ,"VCH" ,"VCR" ,"VMRG" ,
"VAND" ,"VNAND" ,"VOR" ,"VNOR" ,"VXOR" ,"VNXOR" ,unused_op,unused_op,
"VRCP" ,"VRCPL" ,"VRCPH" ,"VMOV" ,"VRSQ" ,"VRSQL" ,"VRSQH" ,"VNOP" ,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_lwc2[8 << 2] = {
"LBV" ,"LSV" ,"LLV" ,"LDV" ,"LQV" ,"LRV" ,"LPV" ,"LUV" ,
"LHV" ,"LFV" ,unused_op,"LTV" ,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
static const char* mnemonics_swc2[8 << 2] = {
"SBV" ,"SSV" ,"SLV" ,"SDV" ,"SQV" ,"SRV" ,"SPV" ,"SUV" ,
"SHV" ,"SFV" ,"SWV" ,"STV" ,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,unused_op,
};/* 000 | 001 | 010 | 011 | 100 | 101 | 110 | 111 */
// clang-format on
char * RSPSpecialName(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
PC = PC; // Unused
if (strcmp(mnemonics_special[command.funct], unused_op) == 0)
{
sprintf(CommandName, "RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else if (command.Hex == 0x00000000)
{
strcpy(CommandName, "NOP");
}
else if (command.funct >= RSP_SPECIAL_SLL && command.funct < RSP_SPECIAL_SLLV)
{
sprintf(CommandName, "%s\t%s, %s, 0x%X",
mnemonics_special[command.funct],
GPR_Name(command.rd),
GPR_Name(command.rt),
command.sa);
}
else if (command.funct >= RSP_SPECIAL_SLLV && command.funct < RSP_SPECIAL_JR)
{
sprintf(CommandName, "%s\t%s, %s, %s",
mnemonics_special[command.funct],
GPR_Name(command.rd),
GPR_Name(command.rt),
GPR_Name(command.rs));
}
else if (command.funct == RSP_SPECIAL_JR)
{
sprintf(CommandName, "%s\t%s",
mnemonics_special[command.funct],
GPR_Name(command.rs));
}
else if (command.funct == RSP_SPECIAL_JALR)
{
sprintf(CommandName, "%s\t%s, %s",
mnemonics_special[command.funct],
GPR_Name(command.rd),
GPR_Name(command.rs));
}
else if (command.funct == RSP_SPECIAL_BREAK)
{
strcpy(CommandName, mnemonics_special[RSP_SPECIAL_BREAK]);
}
else
{
sprintf(CommandName, "%s\t%s, %s, %s",
mnemonics_special[command.funct],
GPR_Name(command.rd),
GPR_Name(command.rs),
GPR_Name(command.rt));
}
return CommandName;
}
char * RSPRegimmName(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
if (strcmp(mnemonics_regimm[command.rt], unused_op) == 0)
{
sprintf(
CommandName,
"RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else if (command.rt == RSP_REGIMM_BGEZAL && command.rs == 0)
{ // MIPS pseudo-instruction: BAL (branch and link)
sprintf(
CommandName,
"BAL\t0x%04X",
(PC + ((short)command.offset << 2) + 4) & 0x1FFC);
}
else
{
sprintf(
CommandName,
"%s\t%s, 0x%04X",
mnemonics_regimm[command.rt],
GPR_Name(command.rs),
(PC + ((short)command.offset << 2) + 4) & 0x1FFC);
}
return CommandName;
}
char * RSPCop0Name(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
PC = PC; // Unused
if (strcmp(mnemonics_cop0[command.rs], unused_op) == 0)
{
sprintf(
CommandName,
"RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else
{
sprintf(
CommandName,
"%s\t%s, %s",
mnemonics_cop0[command.rs],
GPR_Name(command.rt),
COP0_Name(command.rd));
}
return CommandName;
}
char * RSPCop2Name(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
PC = PC; // Unused
if ((command.rs & 0x10) == 0)
{
if (strcmp(mnemonics_cop2[command.rs], unused_op) == 0)
{
sprintf(CommandName, "RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else if (command.rs & 002) // CFC2 or CTC2
{
sprintf(CommandName, "%s\t%s, %d",
mnemonics_cop2[command.rs],
GPR_Name(command.rt),
command.rd % 4);
}
else
{
sprintf(CommandName, "%s\t%s, $v%d[%d]",
mnemonics_cop2[command.rs],
GPR_Name(command.rt),
command.rd,
command.sa >> 1);
}
}
else
{
if (strcmp(mnemonics_vector[command.funct], unused_op) == 0)
{
sprintf(CommandName, "RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else if (command.funct >= RSP_VECTOR_VRCP && command.funct < RSP_VECTOR_VNOOP)
{ // RSP division -- VRCP[L,H], VRSQ[L,H], and VMOV
sprintf(CommandName, "%s\t$v%d[%d], $v%d%s",
mnemonics_vector[command.funct],
command.sa,
command.rd & 0x7,
command.rt,
ElementSpecifier(command.rs & 0xF));
}
else if (command.funct == RSP_VECTOR_VNOOP)
{
strcpy(CommandName, mnemonics_vector[RSP_VECTOR_VNOOP]);
}
else
{
sprintf(CommandName, "%s\t$v%d, $v%d, $v%d%s",
mnemonics_vector[command.funct],
command.sa,
command.rd,
command.rt,
ElementSpecifier(command.rs & 0xF));
}
}
return CommandName;
}
char * RSPLc2Name(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
PC = PC; // Unused
if (strcmp(mnemonics_lwc2[command.rd], unused_op) == 0)
{
sprintf(
CommandName,
"RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else
{
sprintf(
CommandName,
"%s\t$v%d[%d], %c0x%03X(%s)",
mnemonics_lwc2[command.rd],
command.rt,
command.del,
(command.voffset < 0) ? '-' : '+',
abs(command.voffset),
GPR_Name(command.base));
}
return CommandName;
}
char * RSPSc2Name(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
PC = PC; // Unused
if (strcmp(mnemonics_swc2[command.rd], unused_op) == 0)
{
sprintf(
CommandName,
"RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
else
{
sprintf(
CommandName,
"%s\t$v%d[%d], %c0x%03X(%s)",
mnemonics_swc2[command.rd],
command.rt,
command.del,
(command.voffset < 0) ? '-' : '+',
abs(command.voffset),
GPR_Name(command.base));
}
return CommandName;
}
char * RSPOpcodeName(DWORD OpCode, DWORD PC)
{
OPCODE command;
command.Hex = OpCode;
switch (command.op)
{
case RSP_SPECIAL:
return RSPSpecialName(OpCode, PC);
break;
case RSP_REGIMM:
return RSPRegimmName(OpCode, PC);
break;
case RSP_J:
case RSP_JAL:
sprintf(CommandName, "%s\t0x%04X",
mnemonics_primary[command.op],
(command.target << 2) & 0x1FFC);
break;
case RSP_BEQ:
if (command.rs == 0 && command.rt == 0)
{
sprintf(CommandName, "%s\t0x%04X",
"B",
(PC + ((short)command.offset << 2) + 4) & 0x1FFC);
break;
}
else if (command.rs == 0 || command.rt == 0)
{
sprintf(CommandName, "%s\t%s, 0x%04X",
"BEQZ",
GPR_Name(command.rs == 0 ? command.rt : command.rs),
(PC + ((short)command.offset << 2) + 4) & 0x1FFC);
break;
}
// TODO: add example code?
/* else { fall through to show the full BEQ } */
case RSP_BNE:
sprintf(CommandName, "%s\t%s, %s, 0x%04X",
mnemonics_primary[command.op],
GPR_Name(command.rs),
GPR_Name(command.rt),
(PC + ((short)command.offset << 2) + 4) & 0x1FFC);
break;
case RSP_BLEZ:
case RSP_BGTZ:
sprintf(CommandName, "%s\t%s, 0x%04X",
mnemonics_primary[command.op],
GPR_Name(command.rs),
(PC + ((short)command.offset << 2) + 4) & 0x1FFC);
break;
case RSP_ADDI:
case RSP_ADDIU:
case RSP_SLTI:
case RSP_SLTIU:
case RSP_ANDI:
case RSP_ORI:
case RSP_XORI:
sprintf(CommandName, "%s\t%s, %s, 0x%04X",
mnemonics_primary[command.op],
GPR_Name(command.rt),
GPR_Name(command.rs),
command.immediate);
break;
case RSP_LUI:
sprintf(CommandName, "%s\t%s, 0x%04X",
mnemonics_primary[RSP_LUI],
GPR_Name(command.rt),
command.immediate);
break;
case RSP_CP0:
return RSPCop0Name(OpCode, PC);
break;
case RSP_CP2:
return RSPCop2Name(OpCode, PC);
break;
case RSP_LB:
case RSP_LH:
case RSP_LW:
case RSP_LBU:
case RSP_LHU:
case RSP_SB:
case RSP_SH:
case RSP_SW:
sprintf(CommandName, "%s\t%s, %c0x%04X(%s)",
mnemonics_primary[command.op],
GPR_Name(command.rt),
((int16_t)command.offset < 0) ? '-' : '+',
abs((int16_t)command.offset),
GPR_Name(command.base));
break;
case RSP_LC2:
return RSPLc2Name(OpCode, PC);
break;
case RSP_SC2:
return RSPSc2Name(OpCode, PC);
break;
default:
sprintf(CommandName, "RSP: Unknown\t%02X %02X %02X %02X",
command.Ascii[3],
command.Ascii[2],
command.Ascii[1],
command.Ascii[0]);
}
return CommandName;
}
void SetRSPCommandToRunning(void)
{
Stepping_Commands = FALSE;

2
Source/Project64-rsp/RSP Command.h
View File

@ -1,5 +1,3 @@
char * RSPOpcodeName(DWORD OpCode, DWORD PC);
void DumpRSPCode(void);
void DumpRSPData(void);
void Disable_RSP_Commands_Window(void);

105
Source/Project64-rsp/Recompiler Analysis.cpp
View File

@ -6,7 +6,8 @@
#include "Types.h"
#include "log.h"
#include "memory.h"
#include "opcode.h"
#include "cpu/RSPOpcode.h"
#include "cpu/RSPInstruction.h"
#include <windows.h>
//#define COMPARE_INSTRUCTIONS_VERBOSE
@ -19,8 +20,8 @@ Input: PC
Boolean IsOpcodeNop(DWORD PC)
{
OPCODE RspOp;
RSP_LW_IMEM(PC, &RspOp.Hex);
RSPOpcode RspOp;
RSP_LW_IMEM(PC, &RspOp.Value);
if (RspOp.op == RSP_SPECIAL && RspOp.funct == RSP_SPECIAL_SLL)
{
@ -38,14 +39,14 @@ Input: PC
Boolean IsNextInstructionMmx(DWORD PC)
{
OPCODE RspOp;
RSPOpcode RspOp;
if (IsMmxEnabled == FALSE)
return FALSE;
PC += 4;
if (PC >= 0x1000) return FALSE;
RSP_LW_IMEM(PC, &RspOp.Hex);
RSP_LW_IMEM(PC, &RspOp.Value);
if (RspOp.op != RSP_CP2)
return FALSE;
@ -126,7 +127,7 @@ Input: PC, location in accumulator
DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
{
OPCODE RspOp;
RSPOpcode RspOp;
DWORD BranchTarget = 0;
signed int BranchImmed = 0;
int Instruction_State = NextInstruction;
@ -145,7 +146,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
{
return TRUE;
}
RSP_LW_IMEM(PC, &RspOp.Hex);
RSP_LW_IMEM(PC, &RspOp.Value);
switch (RspOp.op)
{
@ -159,7 +160,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
Instruction_State = DO_DELAY_SLOT;
break;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -193,7 +194,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
break;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -230,7 +231,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
BranchImmed = (short)RspOp.offset;
if (Compiler.bAudioUcode)
{
OPCODE NextOp;
RSPOpcode NextOp;
// Ignore backward branches and pretend it's a NOP
if (BranchImmed <= 0)
@ -239,7 +240,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
}
// If the opcode (which is 8 bytes before the destination and also a J backward) then ignore this
BranchImmed = (PC + ((short)RspOp.offset << 2) + 4) & 0xFFC;
RSP_LW_IMEM(BranchImmed - 8, &NextOp.Hex);
RSP_LW_IMEM(BranchImmed - 8, &NextOp.Value);
if (RspOp.op == RSP_J && (int)(RspOp.target << 2) < PC)
{
break;
@ -321,7 +322,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
case RSP_VECTOR_VSAW:
return TRUE;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
}
@ -335,7 +336,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
case RSP_COP2_MF:
break;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
}
@ -364,7 +365,7 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
case RSP_LSC2_HV:
break;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -385,12 +386,12 @@ DWORD WriteToAccum2(int Location, int PC, Boolean RecursiveCall)
case RSP_LSC2_TV:
break;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
default:
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToAccum\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
switch (Instruction_State)
@ -480,7 +481,7 @@ Input: PC, Register
Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
{
OPCODE RspOp;
RSPOpcode RspOp;
DWORD BranchTarget = 0;
signed int BranchImmed = 0;
@ -500,7 +501,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
{
return TRUE;
}
RSP_LW_IMEM(PC, &RspOp.Hex);
RSP_LW_IMEM(PC, &RspOp.Value);
switch (RspOp.op)
{
@ -515,7 +516,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
Instruction_State = DO_DELAY_SLOT;
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -549,7 +550,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -573,7 +574,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
BranchImmed = (short)RspOp.offset;
if (Compiler.bAudioUcode)
{
OPCODE NextOp;
RSPOpcode NextOp;
// Ignore backward branches and pretend it's a NOP
if (BranchImmed <= 0)
@ -582,7 +583,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
}
// If the opcode (which is 8 bytes before the destination and also a J backward) then ignore this
BranchImmed = (PC + ((short)RspOp.offset << 2) + 4) & 0xFFC;
RSP_LW_IMEM(BranchImmed - 8, &NextOp.Hex);
RSP_LW_IMEM(BranchImmed - 8, &NextOp.Value);
if (RspOp.op == RSP_J && (int)(RspOp.target << 2) < PC)
{
break;
@ -684,7 +685,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
}
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
}
@ -705,7 +706,7 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
}
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
}
@ -732,7 +733,6 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
case RSP_LSC2_LV:
case RSP_LSC2_TV:
break;
case RSP_LSC2_PV:
case RSP_LSC2_UV:
case RSP_LSC2_HV:
@ -741,9 +741,8 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
return FALSE;
}
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -790,12 +789,12 @@ Boolean WriteToVectorDest2(DWORD DestReg, int PC, Boolean RecursiveCall)
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
switch (Instruction_State)
@ -888,7 +887,7 @@ Input: PC
// TODO: Consider delay slots and such in a branch?
Boolean UseRspFlags(int PC)
{
OPCODE RspOp;
RSPOpcode RspOp;
int Instruction_State = NextInstruction;
if (Compiler.bFlags == FALSE) return TRUE;
@ -905,7 +904,7 @@ Boolean UseRspFlags(int PC)
{
return TRUE;
}
RSP_LW_IMEM(PC, &RspOp.Hex);
RSP_LW_IMEM(PC, &RspOp.Value);
switch (RspOp.op)
{
@ -920,7 +919,7 @@ Boolean UseRspFlags(int PC)
Instruction_State = DO_DELAY_SLOT;
break;
default:
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -951,7 +950,7 @@ Boolean UseRspFlags(int PC)
break;
default:
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in WriteToVectorDest\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -1030,7 +1029,7 @@ Boolean UseRspFlags(int PC)
break;
default:
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
}
@ -1046,7 +1045,7 @@ Boolean UseRspFlags(int PC)
case RSP_COP2_MF:
break;
default:
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
}
@ -1075,7 +1074,7 @@ Boolean UseRspFlags(int PC)
case RSP_LSC2_HV:
break;
default:
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
@ -1096,12 +1095,12 @@ Boolean UseRspFlags(int PC)
case RSP_LSC2_TV:
break;
default:
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
break;
default:
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPOpcodeName(RspOp.Hex, PC));
CompilerWarning("Unknown opcode in UseRspFlags\n%s", RSPInstruction(PC, RspOp.Value).NameAndParam().c_str());
return TRUE;
}
switch (Instruction_State)
@ -1131,7 +1130,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant)
DWORD PC = 0;
DWORD References = 0;
DWORD Const = 0;
OPCODE RspOp;
RSPOpcode RspOp;
if (Compiler.bGPRConstants == FALSE)
return FALSE;
@ -1139,7 +1138,7 @@ Boolean IsRegisterConstant(DWORD Reg, DWORD * Constant)
while (PC < 0x1000)
{
RSP_LW_IMEM(PC, &RspOp.Hex);
RSP_LW_IMEM(PC, &RspOp.Value);
// Resample command in microcode likes S7
/* if (PC == 0xFBC) {
@ -1340,7 +1339,7 @@ False: Opcode is not a branch
Input: PC
*/
Boolean IsOpcodeBranch(DWORD PC, OPCODE RspOp)
Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp)
{
PC = PC; // Unused
@ -1484,7 +1483,7 @@ typedef struct
#pragma warning(pop)
void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
void GetInstructionInfo(DWORD PC, RSPOpcode * RspOp, OPCODE_INFO * info)
{
switch (RspOp->op)
{
@ -1501,7 +1500,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
break;
default:
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPOpcodeName(RspOp->Hex, PC));
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPInstruction(PC, RspOp->Value).NameAndParam().c_str());
info->flags = InvalidOpcode;
break;
}
@ -1550,7 +1549,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
break;
default:
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPOpcodeName(RspOp->Hex, PC));
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPInstruction(PC, RspOp->Value).NameAndParam().c_str());
info->flags = InvalidOpcode;
break;
}
@ -1625,7 +1624,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
{
switch (RspOp->funct)
{
case RSP_VECTOR_VNOOP:
case RSP_VECTOR_VNOP:
info->DestReg = UNUSED_OPERAND;
info->SourceReg0 = UNUSED_OPERAND;
info->SourceReg1 = UNUSED_OPERAND;
@ -1706,7 +1705,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
break;
default:
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPOpcodeName(RspOp->Hex, PC));
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPInstruction(PC, RspOp->Value).NameAndParam().c_str());
info->flags = InvalidOpcode;
break;
}
@ -1742,7 +1741,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
info->flags = VEC_Instruction | GPR_Instruction | Store_Operation;
break;
default:
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPOpcodeName(RspOp->Hex, PC));
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPInstruction(PC, RspOp->Value).NameAndParam().c_str());
info->flags = InvalidOpcode;
break;
}
@ -1787,7 +1786,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
info->flags = InvalidOpcode;
break;
default:
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPOpcodeName(RspOp->Hex, PC));
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPInstruction(PC, RspOp->Value).NameAndParam().c_str());
info->flags = InvalidOpcode;
break;
}
@ -1815,7 +1814,7 @@ void GetInstructionInfo(DWORD PC, OPCODE * RspOp, OPCODE_INFO * info)
info->flags = InvalidOpcode;
break;
default:
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPOpcodeName(RspOp->Hex, PC));
CompilerWarning("Unknown opcode in GetInstructionInfo\n%s", RSPInstruction(PC, RspOp->Value).NameAndParam().c_str());
info->flags = InvalidOpcode;
break;
}
@ -1838,7 +1837,7 @@ Input: PC
Boolean DelaySlotAffectBranch(DWORD PC)
{
OPCODE Branch, Delay;
RSPOpcode Branch, Delay;
OPCODE_INFO infoBranch, infoDelay;
if (IsOpcodeNop(PC + 4) == TRUE)
@ -1846,8 +1845,8 @@ Boolean DelaySlotAffectBranch(DWORD PC)
return FALSE;
}
RSP_LW_IMEM(PC, &Branch.Hex);
RSP_LW_IMEM(PC + 4, &Delay.Hex);
RSP_LW_IMEM(PC, &Branch.Value);
RSP_LW_IMEM(PC + 4, &Delay.Value);
memset(&infoDelay, 0, sizeof(infoDelay));
memset(&infoBranch, 0, sizeof(infoBranch));
@ -1886,7 +1885,7 @@ Input: Top, not the current operation, the one above
Bottom: The current opcode for re-ordering bubble style
*/
Boolean CompareInstructions(DWORD PC, OPCODE * Top, OPCODE * Bottom)
Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom)
{
OPCODE_INFO info0, info1;
DWORD InstructionType;

33
Source/Project64-rsp/Recompiler CPU.cpp
View File

@ -14,7 +14,8 @@
#include "Types.h"
#include "log.h"
#include "memory.h"
#include "opcode.h"
#include "cpu/RSPOpcode.h"
#include "cpu/RSPInstruction.h"
#include "x86.h"
#pragma warning(disable : 4152) // Non-standard extension, function/data pointer conversion in expression
@ -414,9 +415,9 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
{
DWORD InstructionCount = EndPC - StartPC;
DWORD Count, ReorderedOps, CurrentPC;
OPCODE PreviousOp, CurrentOp, RspOp;
RSPOpcode PreviousOp, CurrentOp, RspOp;
PreviousOp.Hex = *(DWORD *)(RSPInfo.IMEM + StartPC);
PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + StartPC);
if (TRUE == IsOpcodeBranch(StartPC, PreviousOp))
{
@ -444,14 +445,14 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
CPU_Message(" Before:");
for (Count = StartPC; Count < EndPC; Count += 4)
{
RSP_LW_IMEM(Count, &RspOp.Hex);
CPU_Message(" %X %s", Count, RSPOpcodeName(RspOp.Hex, Count));
RSP_LW_IMEM(Count, &RspOp.Value);
CPU_Message(" %X %s", Count, RSPInstruction(Count, RspOp.Value).NameAndParam().c_str());
}
for (Count = 0; Count < InstructionCount; Count += 4)
{
CurrentPC = StartPC;
PreviousOp.Hex = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
ReorderedOps = 0;
for (;;)
@ -461,13 +462,13 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
{
break;
}
CurrentOp.Hex = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
CurrentOp.Value = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
if (TRUE == CompareInstructions(CurrentPC, &PreviousOp, &CurrentOp))
{
// Move current opcode up
*(DWORD *)(RSPInfo.IMEM + CurrentPC - 4) = CurrentOp.Hex;
*(DWORD *)(RSPInfo.IMEM + CurrentPC) = PreviousOp.Hex;
*(DWORD *)(RSPInfo.IMEM + CurrentPC - 4) = CurrentOp.Value;
*(DWORD *)(RSPInfo.IMEM + CurrentPC) = PreviousOp.Value;
ReorderedOps++;
@ -475,7 +476,7 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
CPU_Message("Swapped %X and %X", CurrentPC - 4, CurrentPC);
#endif
}
PreviousOp.Hex = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
PreviousOp.Value = *(DWORD *)(RSPInfo.IMEM + CurrentPC);
if (IsOpcodeNop(CurrentPC) && IsOpcodeNop(CurrentPC + 4) && IsOpcodeNop(CurrentPC + 8))
{
@ -492,8 +493,8 @@ void ReOrderInstructions(DWORD StartPC, DWORD EndPC)
CPU_Message(" After:");
for (Count = StartPC; Count < EndPC; Count += 4)
{
RSP_LW_IMEM(Count, &RspOp.Hex);
CPU_Message(" %X %s", Count, RSPOpcodeName(RspOp.Hex, Count));
RSP_LW_IMEM(Count, &RspOp.Value);
CPU_Message(" %X %s", Count, RSPInstruction(Count, RspOp.Value).NameAndParam().c_str());
}
CPU_Message("");
}
@ -690,7 +691,7 @@ within a block that are safe.
void BuildBranchLabels(void)
{
OPCODE RspOp;
RSPOpcode RspOp;
DWORD i, Dest;
#ifdef BUILD_BRANCHLABELS_VERBOSE
@ -699,7 +700,7 @@ void BuildBranchLabels(void)
for (i = 0; i < 0x1000; i += 4)
{
RspOp.Hex = *(DWORD *)(RSPInfo.IMEM + i);
RspOp.Value = *(DWORD *)(RSPInfo.IMEM + i);
if (TRUE == IsOpcodeBranch(i, RspOp))
{
@ -859,7 +860,7 @@ void CompilerRSPBlock(void)
}
#endif
RSP_LW_IMEM(CompilePC, &RSPOpC.Hex);
RSP_LW_IMEM(CompilePC, &RSPOpC.Value);
if (LogRDP && NextInstruction != DELAY_SLOT_DONE)
{
@ -870,7 +871,7 @@ void CompilerRSPBlock(void)
AddConstToX86Reg(x86_ESP, 4);
}
if (RSPOpC.Hex == 0xFFFFFFFF)
if (RSPOpC.Value == 0xFFFFFFFF)
{
// I think this pops up an unknown OP dialog
// NextInstruction = FINISH_BLOCK;

6
Source/Project64-rsp/Recompiler CPU.h
View File

@ -1,4 +1,4 @@
#include "OpCode.h"
#include "cpu/RSPOpcode.h"
#include "Types.h"
extern uint32_t CompilePC, NextInstruction, JumpTableSize;
@ -17,8 +17,8 @@ Boolean WriteToVectorDest(DWORD DestReg, int PC);
Boolean UseRspFlags(int PC);
Boolean DelaySlotAffectBranch(DWORD PC);
Boolean CompareInstructions(DWORD PC, OPCODE * Top, OPCODE * Bottom);
Boolean IsOpcodeBranch(DWORD PC, OPCODE RspOp);
Boolean CompareInstructions(DWORD PC, RSPOpcode * Top, RSPOpcode * Bottom);
Boolean IsOpcodeBranch(DWORD PC, RSPOpcode RspOp);
Boolean IsOpcodeNop(DWORD PC);
Boolean IsNextInstructionMmx(DWORD PC);

199
Source/Project64-rsp/Recompiler Ops.cpp
View File

@ -11,6 +11,7 @@
#include "log.h"
#include "memory.h"
#include "x86.h"
#include "cpu\RSPInstruction.h"
#include <stdio.h>
#include <windows.h>
@ -115,14 +116,14 @@ void Branch_AddRef(DWORD Target, DWORD * X86Loc)
void Cheat_r4300iOpcode(p_func FunctAddress, char * FunctName)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
MoveConstToVariable(RSPOpC.Hex, &RSPOpC.Hex, "RSPOpC.Hex");
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveConstToVariable(RSPOpC.Value, &RSPOpC.Value, "RSPOpC.Value");
Call_Direct(FunctAddress, FunctName);
}
void Cheat_r4300iOpcodeNoMessage(p_func FunctAddress, char * FunctName)
{
MoveConstToVariable(RSPOpC.Hex, &RSPOpC.Hex, "RSPOpC.Hex");
MoveConstToVariable(RSPOpC.Value, &RSPOpC.Value, "RSPOpC.Value");
Call_Direct(FunctAddress, FunctName);
}
@ -188,7 +189,7 @@ void Compile_J(void)
{
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
NextInstruction = DO_DELAY_SLOT;
}
else if (NextInstruction == DELAY_SLOT_DONE)
@ -214,7 +215,7 @@ void Compile_JAL(void)
{
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveConstToVariable(CompilePC + 8, &RSP_GPR[31].UW, "RA.W");
NextInstruction = DO_DELAY_SLOT;
}
@ -254,7 +255,7 @@ void Compile_BEQ(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rs == 0 && RSPOpC.rt == 0)
{
NextInstruction = DO_DELAY_SLOT;
@ -337,7 +338,7 @@ void Compile_BNE(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rs == 0 && RSPOpC.rt == 0)
{
NextInstruction = DO_DELAY_SLOT;
@ -420,7 +421,7 @@ void Compile_BLEZ(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rs == 0)
{
NextInstruction = DO_DELAY_SLOT;
@ -480,7 +481,7 @@ void Compile_BGTZ(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rs == 0)
{
NextInstruction = DO_DELAY_SLOT;
@ -540,7 +541,7 @@ void Compile_ADDI(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -579,7 +580,7 @@ void Compile_ADDIU(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -612,7 +613,7 @@ void Compile_SLTI(void)
#endif
int Immediate;
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -638,7 +639,7 @@ void Compile_SLTIU(void)
#endif
int Immediate;
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -658,7 +659,7 @@ void Compile_ANDI(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -692,7 +693,7 @@ void Compile_ORI(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -724,7 +725,7 @@ void Compile_XORI(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
@ -756,7 +757,7 @@ void Compile_LUI(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0) return;
MoveConstToVariable(constant, &RSP_GPR[RSPOpC.rt].W, GPR_Name(RSPOpC.rt));
@ -783,7 +784,7 @@ void Compile_LB(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -818,7 +819,7 @@ void Compile_LH(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -891,7 +892,7 @@ void Compile_LW(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -976,7 +977,7 @@ void Compile_LBU(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -1013,7 +1014,7 @@ void Compile_LHU(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -1083,7 +1084,7 @@ void Compile_SB(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -1138,7 +1139,7 @@ void Compile_SH(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -1213,7 +1214,7 @@ void Compile_SW(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -1338,7 +1339,7 @@ void Compile_Special_SLL(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
if (RSPOpC.rd == RSPOpC.rt)
@ -1360,7 +1361,7 @@ void Compile_Special_SRL(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
if (RSPOpC.rd == RSPOpC.rt)
@ -1382,7 +1383,7 @@ void Compile_Special_SRA(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
if (RSPOpC.rd == RSPOpC.rt)
@ -1409,7 +1410,7 @@ void Compile_Special_SRLV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
MoveVariableToX86reg(&RSP_GPR[RSPOpC.rt].W, GPR_Name(RSPOpC.rt), x86_EAX);
@ -1437,7 +1438,7 @@ void Compile_Special_JR(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
// Transfer destination to location pointed to by PrgCount
MoveVariableToX86reg(&RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs), x86_EAX);
AndConstToX86Reg(x86_EAX, 0xFFC);
@ -1496,7 +1497,7 @@ void Compile_Special_JALR(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveConstToVariable(Const, &RSP_GPR[RSPOpC.rd].W, GPR_Name(RSPOpC.rd));
MoveVariableToX86reg(&RSP_GPR[RSPOpC.rs].W, GPR_Name(RSPOpC.rs), x86_EAX);
AndConstToX86Reg(x86_EAX, 0xFFC);
@ -1554,7 +1555,7 @@ void Compile_Special_ADD(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1599,7 +1600,7 @@ void Compile_Special_ADDU(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1644,7 +1645,7 @@ void Compile_Special_SUB(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1672,7 +1673,7 @@ void Compile_Special_SUBU(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1700,7 +1701,7 @@ void Compile_Special_AND(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1734,7 +1735,7 @@ void Compile_Special_OR(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1773,7 +1774,7 @@ void Compile_Special_XOR(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0) return;
@ -1811,7 +1812,7 @@ void Compile_Special_SLT(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rd == 0)
{
return;
@ -1859,7 +1860,7 @@ void Compile_RegImm_BLTZ(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rs == 0)
{
NextInstruction = DO_DELAY_SLOT;
@ -1916,7 +1917,7 @@ void Compile_RegImm_BGEZ(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rs == 0)
{
NextInstruction = DO_DELAY_SLOT;
@ -1973,7 +1974,7 @@ void Compile_RegImm_BLTZAL(void)
{
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveConstToVariable(CompilePC + 8, &RSP_GPR[31].UW, "RA.W");
if (RSPOpC.rs == 0)
{
@ -2018,7 +2019,7 @@ void Compile_RegImm_BGEZAL(void)
if (NextInstruction == NORMAL)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveConstToVariable(CompilePC + 8, &RSP_GPR[31].UW, "RA.W");
if (RSPOpC.rs == 0)
{
@ -2076,7 +2077,7 @@ void Compile_RegImm_BGEZAL(void)
void Compile_Cop0_MF(void)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (LogRDP)
{
char str[40];
@ -2211,7 +2212,7 @@ void Compile_Cop0_MF(void)
void Compile_Cop0_MT(void)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (LogRDP)
{
@ -2344,7 +2345,7 @@ void Compile_Cop2_MF(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (element2 != (element1 - 1))
{
@ -2379,7 +2380,7 @@ void Compile_Cop2_CF(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
switch ((RSPOpC.rd & 0x03))
{
@ -2409,7 +2410,7 @@ void Compile_Cop2_MT(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (element == 0)
{
@ -2436,7 +2437,7 @@ void Compile_Cop2_CT(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.rt == 0)
{
@ -2686,7 +2687,7 @@ void Compile_Vector_VMULF(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -2837,7 +2838,7 @@ void Compile_Vector_VMUDL(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -2991,7 +2992,7 @@ void Compile_Vector_VMUDM(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -3138,7 +3139,7 @@ void Compile_Vector_VMUDN(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -3293,7 +3294,7 @@ void Compile_Vector_VMUDH(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -3433,7 +3434,7 @@ void Compile_Vector_VMACF(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToDest == TRUE)
{
@ -3513,7 +3514,7 @@ void Compile_Vector_VMADL(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bOptimize == TRUE)
{
@ -3590,7 +3591,7 @@ void Compile_Vector_VMADM(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bOptimize == TRUE)
{
@ -3686,7 +3687,7 @@ void Compile_Vector_VMADN(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bOptimize == TRUE)
{
@ -3767,7 +3768,7 @@ void Compile_Vector_VMADH(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bOptimize == TRUE)
{
@ -3968,7 +3969,7 @@ void Compile_Vector_VADD(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE && bFlagUseage == FALSE)
{
@ -4107,7 +4108,7 @@ void Compile_Vector_VSUB(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE && bFlagUseage == FALSE)
{
@ -4280,7 +4281,7 @@ void Compile_Vector_VABS(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -4382,7 +4383,7 @@ void Compile_Vector_VADDC(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bElement == TRUE)
{
@ -4455,7 +4456,7 @@ void Compile_Vector_VSUBC(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bElement == TRUE)
{
@ -4520,7 +4521,7 @@ void Compile_Vector_VSAW(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
switch ((RSPOpC.rs & 0xF))
{
@ -4580,7 +4581,7 @@ void Compile_Vector_VLT(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
last = -1;
XorX86RegToX86Reg(x86_EBX, x86_EBX);
MoveVariableToX86reg(&RSP_Flags[0].UW, "&RSP_Flags[0].UW", x86_ESI);
@ -4681,7 +4682,7 @@ void Compile_Vector_VEQ(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveZxVariableToX86regHalf(&RSP_Flags[0].UHW[1], "&RSP_Flags[0].UHW[1]", x86_EBX);
XorConstToX86Reg(x86_EBX, 0xFFFF);
@ -4758,7 +4759,7 @@ void Compile_Vector_VNE(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveZxVariableToX86regHalf(&RSP_Flags[0].UHW[1], "&RSP_Flags[0].UHW[1]", x86_EBX);
@ -4822,7 +4823,7 @@ Boolean Compile_Vector_VGE_MMX(void)
if ((RSPOpC.rs & 0xF) >= 2 && !(RSPOpC.rs & 8) && IsMmx2Enabled == FALSE)
return FALSE;
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveConstToVariable(0, &RSP_Flags[1].UW, "RSP_Flags[1].UW");
sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.rd);
@ -4885,7 +4886,7 @@ void Compile_Vector_VGE(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
XorX86RegToX86Reg(x86_EBX, x86_EBX);
MoveVariableToX86reg(&RSP_Flags[0].UW, "&RSP_Flags[0].UW", x86_ESI);
@ -5002,7 +5003,7 @@ void Compile_Vector_VMRG(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveVariableToX86reg(&RSP_Flags[1].UW, "RSP_Flags[1].UW", x86_EDX);
for (count = 0; count < 8; count++)
@ -5089,7 +5090,7 @@ void Compile_Vector_VAND(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -5200,7 +5201,7 @@ void Compile_Vector_VNAND(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -5312,7 +5313,7 @@ void Compile_Vector_VOR(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -5418,7 +5419,7 @@ void Compile_Vector_VNOR(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum == FALSE)
{
@ -5535,7 +5536,7 @@ void Compile_Vector_VXOR(void)
DWORD count;
Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC);
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (!bWriteToAccum || ((RSPOpC.rs & 0xF) < 2 && RSPOpC.rd == RSPOpC.rt))
{
@ -5631,7 +5632,7 @@ void Compile_Vector_VNXOR(void)
DWORD count;
Boolean bWriteToAccum = WriteToAccum(Low16BitAccum, CompilePC);
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (!bWriteToAccum || ((RSPOpC.rs & 0xF) < 2 && RSPOpC.rd == RSPOpC.rt))
{
@ -5666,7 +5667,7 @@ void Compile_Vector_VRCP(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
el = EleSpec[RSPOpC.rs].B[(RSPOpC.rd & 0x7)];
sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rt, el);
@ -5736,7 +5737,7 @@ void Compile_Vector_VRCPL(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
el = EleSpec[RSPOpC.rs].B[(RSPOpC.rd & 0x7)];
sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rt, el);
@ -5812,7 +5813,7 @@ void Compile_Vector_VRCPH(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
el = EleSpec[RSPOpC.rs].B[(RSPOpC.rd & 0x7)];
sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rt, el);
@ -5855,7 +5856,7 @@ void Compile_Vector_VMOV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (bWriteToAccum)
{
@ -5881,13 +5882,13 @@ void Compile_Vector_VMOV(void)
void Compile_Vector_VRSQ(void)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
Cheat_r4300iOpcodeNoMessage(RSP_Vector_VRSQ, "RSP_Vector_VRSQ");
}
void Compile_Vector_VRSQL(void)
{
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
Cheat_r4300iOpcodeNoMessage(RSP_Vector_VRSQL, "RSP_Vector_VRSQL");
}
@ -5902,7 +5903,7 @@ void Compile_Vector_VRSQH(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
el = EleSpec[RSPOpC.rs].B[(RSPOpC.rd & 0x7)];
sprintf(Reg, "RSP_Vect[%i].UHW[%i]", RSPOpC.rt, el);
@ -5951,7 +5952,7 @@ void Compile_Opcode_LBV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX);
if (offset != 0)
@ -5980,7 +5981,7 @@ void Compile_Opcode_LSV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -6047,7 +6048,7 @@ void Compile_Opcode_LLV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if ((RSPOpC.del & 0x3) != 0)
{
@ -6116,7 +6117,7 @@ void Compile_Opcode_LDV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
//if ((RSPOpC.del & 0x7) != 0) {
// rsp_UnknownOpcode();
@ -6228,7 +6229,7 @@ void Compile_Opcode_LQV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.del != 0)
{
@ -6337,7 +6338,7 @@ void Compile_Opcode_LRV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.del != 0)
{
@ -6417,7 +6418,7 @@ void Compile_Opcode_LPV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX);
if (offset != 0)
@ -6526,7 +6527,7 @@ void Compile_Opcode_LUV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX);
if (offset != 0)
@ -6635,7 +6636,7 @@ void Compile_Opcode_LHV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
MoveVariableToX86reg(&RSP_GPR[RSPOpC.base].UW, GPR_Name(RSPOpC.base), x86_EBX);
if (offset != 0)
@ -6767,7 +6768,7 @@ void Compile_Opcode_SSV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -6833,7 +6834,7 @@ void Compile_Opcode_SLV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
// if ((RSPOpC.del & 0x3) != 0) {
// rsp_UnknownOpcode();
@ -6906,7 +6907,7 @@ void Compile_Opcode_SDV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (IsRegConst(RSPOpC.base) == TRUE)
{
@ -6987,7 +6988,7 @@ void Compile_Opcode_SQV(void)
return;
#endif
CPU_Message(" %X %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
if (RSPOpC.del != 0 && RSPOpC.del != 12)
{
@ -7165,10 +7166,10 @@ void Compile_Opcode_SWV(void)
void Compile_UnknownOpcode(void)
{
CPU_Message(" %X Unhandled Opcode: %s", CompilePC, RSPOpcodeName(RSPOpC.Hex, CompilePC));
CPU_Message(" %X Unhandled Opcode: %s", CompilePC, RSPInstruction(CompilePC, RSPOpC.Value).NameAndParam().c_str());
NextInstruction = FINISH_BLOCK;
MoveConstToVariable(CompilePC, PrgCount, "RSP PC");
MoveConstToVariable(RSPOpC.Hex, &RSPOpC.Hex, "RSPOpC.Hex");
MoveConstToVariable(RSPOpC.Value, &RSPOpC.Value, "RSPOpC.Value");
Call_Direct(rsp_UnknownOpcode, "rsp_UnknownOpcode");
Ret();
}

79
Source/Project64-rsp/Recompiler Sections.cpp
View File

@ -11,10 +11,11 @@
#include "log.h"
#include "memory.h"
#include "x86.h"
#include "cpu/RSPInstruction.h"
#pragma warning(disable : 4152) // Non-standard extension, function/data pointer conversion in expression
void RSP_Sections_VMUDH(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMUDH(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -84,7 +85,7 @@ void RSP_Sections_VMUDH(OPCODE RspOp, DWORD AccumStyle)
}
}
void RSP_Sections_VMADH(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMADH(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -155,7 +156,7 @@ void RSP_Sections_VMADH(OPCODE RspOp, DWORD AccumStyle)
MmxPaddswRegToReg(x86_MM1, x86_MM1 + 2);
}
void RSP_Sections_VMUDL(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMUDL(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -201,7 +202,7 @@ void RSP_Sections_VMUDL(OPCODE RspOp, DWORD AccumStyle)
}
}
void RSP_Sections_VMADL(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMADL(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -248,7 +249,7 @@ void RSP_Sections_VMADL(OPCODE RspOp, DWORD AccumStyle)
MmxPaddswRegToReg(x86_MM1, x86_MM1 + 2);
}
void RSP_Sections_VMUDM(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMUDM(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -361,7 +362,7 @@ void RSP_Sections_VMUDM(OPCODE RspOp, DWORD AccumStyle)
}
}
void RSP_Sections_VMADM(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMADM(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -477,7 +478,7 @@ void RSP_Sections_VMADM(OPCODE RspOp, DWORD AccumStyle)
MmxPaddswRegToReg(x86_MM1, x86_MM1 + 2);
}
void RSP_Sections_VMUDN(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMUDN(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -576,7 +577,7 @@ void RSP_Sections_VMUDN(OPCODE RspOp, DWORD AccumStyle)
}
}
void RSP_Sections_VMADN(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMADN(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -678,7 +679,7 @@ void RSP_Sections_VMADN(OPCODE RspOp, DWORD AccumStyle)
MmxPaddswRegToReg(x86_MM1, x86_MM1 + 2);
}
void RSP_Sections_VMULF(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMULF(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -751,7 +752,7 @@ void RSP_Sections_VMULF(OPCODE RspOp, DWORD AccumStyle)
MmxPsllwImmed(x86_MM1, 1);
}
void RSP_Sections_VMACF(OPCODE RspOp, DWORD AccumStyle)
void RSP_Sections_VMACF(RSPOpcode RspOp, DWORD AccumStyle)
{
char Reg[256];
@ -831,9 +832,9 @@ static DWORD Section_000_VMADN; // Yeah I know, but leave it
Boolean Check_Section_000(void)
{
DWORD i;
OPCODE op0, op1;
RSPOpcode op0, op1;
RSP_LW_IMEM(CompilePC + 0x00, &op0.Hex);
RSP_LW_IMEM(CompilePC + 0x00, &op0.Value);
// Example: (Mario audio microcode)
// 0x574 VMUDN $v30, $v3, $v23
@ -847,7 +848,7 @@ Boolean Check_Section_000(void)
for (i = 0; i < 0x20; i++)
{
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &op1.Hex);
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &op1.Value);
if (!(op1.op == RSP_CP2 && (op1.rs & 0x10) != 0 && op1.funct == RSP_VECTOR_VMADN))
{
@ -885,13 +886,13 @@ Boolean Check_Section_000(void)
void Compile_Section_000(void)
{
char Reg[256];
OPCODE vmudn, vmadn = {0};
RSPOpcode vmudn, vmadn = {0};
DWORD i;
RSP_LW_IMEM(CompilePC + 0x00, &vmudn.Hex);
RSP_LW_IMEM(CompilePC + 0x00, &vmudn.Value);
CPU_Message("Compiling: %X to ..., RSP optimization $000", CompilePC);
CPU_Message(" %X %s", CompilePC + 0x00, RSPOpcodeName(vmudn.Hex, CompilePC + 0x00));
CPU_Message(" %X %s", CompilePC + 0x00, RSPInstruction(CompilePC + 0x00, vmudn.Value).NameAndParam().c_str());
if (LogRDP)
{
char str[40];
@ -903,8 +904,8 @@ void Compile_Section_000(void)
for (i = 0; i < Section_000_VMADN; i++)
{
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &vmadn.Hex);
CPU_Message(" %X %s", CompilePC + 0x04 + (i * 4), RSPOpcodeName(vmadn.Hex, CompilePC + 0x04 + (i * 4)));
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &vmadn.Value);
CPU_Message(" %X %s", CompilePC + 0x04 + (i * 4), RSPInstruction(CompilePC + 0x04 + (i * 4), vmadn.Value).NameAndParam().c_str());
if (LogRDP)
{
@ -921,7 +922,7 @@ void Compile_Section_000(void)
for (i = 0; i < Section_000_VMADN; i++)
{
RSP_LW_IMEM(CompilePC, &vmadn.Hex);
RSP_LW_IMEM(CompilePC, &vmadn.Value);
CompilePC += 4;
RSP_Sections_VMADN(vmadn, Low16BitAccum);
if (WriteToVectorDest(vmadn.sa, CompilePC - 4) == TRUE)
@ -946,9 +947,9 @@ static DWORD Section_001_VMACF;
Boolean Check_Section_001(void)
{
DWORD i;
OPCODE op0, op1;
RSPOpcode op0, op1;
RSP_LW_IMEM(CompilePC + 0x00, &op0.Hex);
RSP_LW_IMEM(CompilePC + 0x00, &op0.Value);
// Example: (Mario audio microcode)
// 0xCC0 VMULF $v28, $v28, $v10 [6]
@ -962,7 +963,7 @@ Boolean Check_Section_001(void)
for (i = 0; i < 0x20; i++)
{
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &op1.Hex);
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &op1.Value);
if (!(op1.op == RSP_CP2 && (op1.rs & 0x10) != 0 && op1.funct == RSP_VECTOR_VMACF))
{
@ -1003,17 +1004,17 @@ void Compile_Section_001(void)
{
DWORD i;
char Reg[256];
OPCODE vmulf, vmacf;
RSPOpcode vmulf, vmacf;
RSP_LW_IMEM(CompilePC + 0x00, &vmulf.Hex);
RSP_LW_IMEM(CompilePC + 0x00, &vmulf.Value);
CPU_Message("Compiling: %X to ..., RSP optimization $001", CompilePC);
CPU_Message(" %X %s", CompilePC + 0x00, RSPOpcodeName(vmulf.Hex, CompilePC + 0x00));
CPU_Message(" %X %s", CompilePC + 0x00, RSPInstruction(CompilePC + 0x00, vmulf.Value).NameAndParam().c_str());
for (i = 0; i < Section_001_VMACF; i++)
{
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &vmacf.Hex);
CPU_Message(" %X %s", CompilePC + 0x04 + (i * 4), RSPOpcodeName(vmacf.Hex, CompilePC + 0x04 + (i * 4)));
RSP_LW_IMEM(CompilePC + 0x04 + (i * 4), &vmacf.Value);
CPU_Message(" %X %s", CompilePC + 0x04 + (i * 4), RSPInstruction(CompilePC + 0x04 + (i * 4), vmacf.Value).NameAndParam().c_str());
}
RSP_Sections_VMULF(vmulf, Middle16BitAccum);
@ -1029,7 +1030,7 @@ void Compile_Section_001(void)
for (i = 0; i < Section_001_VMACF; i++)
{
RSP_LW_IMEM(CompilePC, &vmacf.Hex);
RSP_LW_IMEM(CompilePC, &vmacf.Value);
CompilePC += 4;
RSP_Sections_VMACF(vmacf, Middle16BitAccum);
@ -1048,11 +1049,11 @@ void Compile_Section_001(void)
Boolean Check_Section_002(void)
{
DWORD Count;
OPCODE op[0x0C];
RSPOpcode op[0x0C];
for (Count = 0; Count < 0x0C; Count++)
{
RSP_LW_IMEM(CompilePC + (Count * 0x04), &op[Count].Hex);
RSP_LW_IMEM(CompilePC + (Count * 0x04), &op[Count].Value);
}
/*
@ -1120,15 +1121,15 @@ void Compile_Section_002(void)
char Reg[256];
DWORD Count;
OPCODE op[0x0C];
RSPOpcode op[0x0C];
OPCODE vmudh, vsaw;
RSPOpcode vmudh, vsaw;
CPU_Message("Compiling: %X to ..., RSP optimization $002", CompilePC);
for (Count = 0; Count < 0xC; Count++)
{
RSP_LW_IMEM(CompilePC + (Count * 0x04), &op[Count].Hex);
CPU_Message(" %X %s", CompilePC + (Count * 0x04), RSPOpcodeName(op[Count].Hex, CompilePC + (Count * 0x04)));
RSP_LW_IMEM(CompilePC + (Count * 0x04), &op[Count].Value);
CPU_Message(" %X %s", CompilePC + (Count * 0x04), RSPInstruction(CompilePC + (Count * 0x04), op[Count].Value).NameAndParam().c_str());
if (LogRDP)
{
char str[40];
@ -1164,17 +1165,17 @@ void Compile_Section_002(void)
MmxEmptyMultimediaState();
CompilePC += 12 * sizeof(OPCODE);
CompilePC += 12 * sizeof(RSPOpcode);
}
Boolean Check_Section_003(void)
{
DWORD Count;
OPCODE op[4];
RSPOpcode op[4];
for (Count = 0; Count < 4; Count++)
{
RSP_LW_IMEM(CompilePC + (Count * 0x04), &op[Count].Hex);
RSP_LW_IMEM(CompilePC + (Count * 0x04), &op[Count].Value);
}
// Example: (Zelda audio microcode)
@ -1183,7 +1184,7 @@ Boolean Check_Section_003(void)
// VMADM $v22, $v25, $v18 [4]
// VMADN $v23, $v31, $v30 [0]
if (op[0].Hex == 0x4BF7FDC5 && op[1].Hex == 0x4BF6FDCF && op[2].Hex == 0x4B92CD8D && op[3].Hex == 0x4B1EFDCE)
if (op[0].Value == 0x4BF7FDC5 && op[1].Value == 0x4BF6FDCF && op[2].Value == 0x4B92CD8D && op[3].Value == 0x4B1EFDCE)
{
if (TRUE == WriteToAccum(7, CompilePC + 0xc))
return FALSE;
@ -1245,7 +1246,7 @@ void Compile_Section_003(void)
{
CPU_Message("Compiling: %X to ..., RSP optimization $003", CompilePC);
Call_Direct(resampler_hle, "Resampler_HLE");
CompilePC += 4 * sizeof(OPCODE);
CompilePC += 4 * sizeof(RSPOpcode);
}
Boolean RSP_DoSections(void)

32
Source/Project64-rsp/cpu/RSPInstruction.h Normal file
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@ -0,0 +1,32 @@
#pragma once
#include <string>
#include <stdint.h>
#include "RSPOpcode.h"
class RSPInstruction
{
public:
RSPInstruction(uint32_t Address, uint32_t Instruction);
const char * Name();
const char * Param();
std::string NameAndParam();
private:
RSPInstruction(void);
RSPInstruction(const RSPInstruction &);
RSPInstruction & operator=(const RSPInstruction &);
void DecodeName(void);
void DecodeSpecialName(void);
void DecodeRegImmName(void);
void DecodeCop0Name(void);
void DecodeCop2Name(void);
void DecodeLC2Name(void);
void DecodeSC2Name(void);
uint32_t m_Address;
RSPOpcode m_Instruction;
char m_Name[40];
char m_Param[200];
};

195
Source/Project64-rsp/cpu/RSPOpcode.h Normal file
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@ -0,0 +1,195 @@
#pragma once
#include <stdint.h>
#pragma warning(push)
#pragma warning(disable : 4201) // Non-standard extension used: nameless struct/union
union RSPOpcode
{
uint32_t Value;
struct
{
unsigned offset : 16;
unsigned rt : 5;
unsigned rs : 5;
unsigned op : 6;
};
struct
{
unsigned immediate : 16;
unsigned : 5;
unsigned base : 5;
unsigned : 6;
};
struct
{
unsigned target : 26;
unsigned : 6;
};
struct
{
unsigned funct : 6;
unsigned sa : 5;
unsigned rd : 5;
unsigned : 5;
unsigned : 5;
unsigned : 6;
};
struct
{
signed voffset : 7;
unsigned del : 4;
unsigned : 5;
unsigned dest : 5;
unsigned : 5;
unsigned : 6;
};
};
#pragma warning(pop)
enum RSPOpCodes
{
RSP_SPECIAL = 0,
RSP_REGIMM = 1,
RSP_J = 2,
RSP_JAL = 3,
RSP_BEQ = 4,
RSP_BNE = 5,
RSP_BLEZ = 6,
RSP_BGTZ = 7,
RSP_ADDI = 8,
RSP_ADDIU = 9,
RSP_SLTI = 10,
RSP_SLTIU = 11,
RSP_ANDI = 12,
RSP_ORI = 13,
RSP_XORI = 14,
RSP_LUI = 15,
RSP_CP0 = 16,
RSP_CP2 = 18,
RSP_LB = 32,
RSP_LH = 33,
RSP_LW = 35,
RSP_LBU = 36,
RSP_LHU = 37,
RSP_SB = 40,
RSP_SH = 41,
RSP_SW = 43,
RSP_LC2 = 50,
RSP_SC2 = 58,
};
enum RSPSpecialCodes
{
RSP_SPECIAL_SLL = 0,
RSP_SPECIAL_SRL = 2,
RSP_SPECIAL_SRA = 3,
RSP_SPECIAL_SLLV = 4,
RSP_SPECIAL_SRLV = 6,
RSP_SPECIAL_SRAV = 7,
RSP_SPECIAL_JR = 8,
RSP_SPECIAL_JALR = 9,
RSP_SPECIAL_BREAK = 13,
RSP_SPECIAL_ADD = 32,
RSP_SPECIAL_ADDU = 33,
RSP_SPECIAL_SUB = 34,
RSP_SPECIAL_SUBU = 35,
RSP_SPECIAL_AND = 36,
RSP_SPECIAL_OR = 37,
RSP_SPECIAL_XOR = 38,
RSP_SPECIAL_NOR = 39,
RSP_SPECIAL_SLT = 42,
RSP_SPECIAL_SLTU = 43,
};
enum RSPRegImmOpCodes
{
RSP_REGIMM_BLTZ = 0,
RSP_REGIMM_BGEZ = 1,
RSP_REGIMM_BLTZAL = 16,
RSP_REGIMM_BGEZAL = 17,
};
enum RSPCOP0OpCodes
{
RSP_COP0_MF = 0,
RSP_COP0_MT = 4,
};
enum RSPCOP2OpCodes
{
RSP_COP2_MF = 0,
RSP_COP2_CF = 2,
RSP_COP2_MT = 4,
RSP_COP2_CT = 6,
};
enum RSPVectorOpCodes
{
RSP_VECTOR_VMULF = 0,
RSP_VECTOR_VMULU = 1,
RSP_VECTOR_VRNDP = 2,
RSP_VECTOR_VMULQ = 3,
RSP_VECTOR_VMUDL = 4,
RSP_VECTOR_VMUDM = 5,
RSP_VECTOR_VMUDN = 6,
RSP_VECTOR_VMUDH = 7,
RSP_VECTOR_VMACF = 8,
RSP_VECTOR_VMACU = 9,
RSP_VECTOR_VRNDN = 10,
RSP_VECTOR_VMACQ = 11,
RSP_VECTOR_VMADL = 12,
RSP_VECTOR_VMADM = 13,
RSP_VECTOR_VMADN = 14,
RSP_VECTOR_VMADH = 15,
RSP_VECTOR_VADD = 16,
RSP_VECTOR_VSUB = 17,
RSP_VECTOR_VABS = 19,
RSP_VECTOR_VADDC = 20,
RSP_VECTOR_VSUBC = 21,
RSP_VECTOR_VSAW = 29,
RSP_VECTOR_VLT = 32,
RSP_VECTOR_VEQ = 33,
RSP_VECTOR_VNE = 34,
RSP_VECTOR_VGE = 35,
RSP_VECTOR_VCL = 36,
RSP_VECTOR_VCH = 37,
RSP_VECTOR_VCR = 38,
RSP_VECTOR_VMRG = 39,
RSP_VECTOR_VAND = 40,
RSP_VECTOR_VNAND = 41,
RSP_VECTOR_VOR = 42,
RSP_VECTOR_VNOR = 43,
RSP_VECTOR_VXOR = 44,
RSP_VECTOR_VNXOR = 45,
RSP_VECTOR_VRCP = 48,
RSP_VECTOR_VRCPL = 49,
RSP_VECTOR_VRCPH = 50,
RSP_VECTOR_VMOV = 51,
RSP_VECTOR_VRSQ = 52,
RSP_VECTOR_VRSQL = 53,
RSP_VECTOR_VRSQH = 54,
RSP_VECTOR_VNOP = 55,
};
enum RSPLSC2OpCodes
{
RSP_LSC2_BV = 0,
RSP_LSC2_SV = 1,
RSP_LSC2_LV = 2,
RSP_LSC2_DV = 3,
RSP_LSC2_QV = 4,
RSP_LSC2_RV = 5,
RSP_LSC2_PV = 6,
RSP_LSC2_UV = 7,
RSP_LSC2_HV = 8,
RSP_LSC2_FV = 9,
RSP_LSC2_WV = 10,
RSP_LSC2_TV = 11,
};

632
Source/Project64-rsp/cpu/RSPiInstruction.cpp Normal file
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@ -0,0 +1,632 @@
#include "RSPInstruction.h"
#include "../RSP Registers.h"
#include <Common/StdString.h>
RSPInstruction::RSPInstruction(uint32_t Address, uint32_t Instruction) :
m_Address(Address)
{
m_Name[0] = '\0';
m_Param[0] = '\0';
m_Instruction.Value = Instruction;
}
const char * RSPInstruction::Name()
{
if (m_Name[0] == '\0')
{
DecodeName();
}
return m_Name;
}
const char * RSPInstruction::Param()
{
if (m_Param[0] == '\0')
{
DecodeName();
}
return m_Param;
}
std::string RSPInstruction::NameAndParam()
{
return stdstr_f("%s %s", Name(), Param());
}
void RSPInstruction::DecodeName(void)
{
switch (m_Instruction.op)
{
case RSP_SPECIAL:
DecodeSpecialName();
break;
case RSP_REGIMM:
DecodeRegImmName();
break;
case RSP_J:
strcpy(m_Name, "J");
sprintf(m_Param, "0x%04X", (m_Instruction.target << 2) & 0x1FFC);
break;
case RSP_JAL:
strcpy(m_Name, "JAL");
sprintf(m_Param, "0x%04X", (m_Instruction.target << 2) & 0x1FFC);
break;
case RSP_BEQ:
if (m_Instruction.rs == 0 && m_Instruction.rt == 0)
{
strcpy(m_Name, "B");
sprintf(m_Param, "0x%08X", (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
else if (m_Instruction.rs == 0 || m_Instruction.rt == 0)
{
strcpy(m_Name, "BEQZ");
sprintf(m_Param, "%s, 0x%08X", GPR_Name(m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
else
{
strcpy(m_Name, "BEQ");
sprintf(m_Param, "%s, %s, 0x%08X", GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
break;
case RSP_BNE:
if ((m_Instruction.rs == 0) ^ (m_Instruction.rt == 0))
{
strcpy(m_Name, "BNEZ");
sprintf(m_Param, "%s, 0x%08X", GPR_Name(m_Instruction.rs == 0 ? m_Instruction.rt : m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
else
{
strcpy(m_Name, "BNE");
sprintf(m_Param, "%s, %s, 0x%08X", GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
break;
case RSP_BLEZ:
strcpy(m_Name, "BLEZ");
sprintf(m_Param, "%s, 0x%08X", GPR_Name(m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
break;
case RSP_BGTZ:
strcpy(m_Name, "BGTZ");
sprintf(m_Param, "%s, 0x%08X", GPR_Name(m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
break;
case RSP_ADDI:
strcpy(m_Name, "ADDI");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_ADDIU:
strcpy(m_Name, "ADDIU");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_SLTI:
strcpy(m_Name, "SLTI");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_SLTIU:
strcpy(m_Name, "SLTIU");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_ANDI:
strcpy(m_Name, "ANDI");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_ORI:
strcpy(m_Name, "ORI");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_XORI:
strcpy(m_Name, "XORI");
sprintf(m_Param, "%s, %s, 0x%04X", GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs), m_Instruction.immediate);
break;
case RSP_LUI:
strcpy(m_Name, "LUI");
sprintf(m_Param, "%s, 0x%04X", GPR_Name(m_Instruction.rt), m_Instruction.immediate);
break;
case RSP_CP0:
DecodeCop0Name();
break;
case RSP_CP2:
DecodeCop2Name();
break;
case RSP_LB:
strcpy(m_Name, "LB");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_LH:
strcpy(m_Name, "LH");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_LW:
strcpy(m_Name, "LW");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_LBU:
strcpy(m_Name, "LBU");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_LHU:
strcpy(m_Name, "LHU");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_SB:
strcpy(m_Name, "SB");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_SH:
strcpy(m_Name, "SH");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_SW:
strcpy(m_Name, "SW");
sprintf(m_Param, "%s, 0x%04X (%s)", GPR_Name(m_Instruction.rt), m_Instruction.offset, GPR_Name(m_Instruction.base));
break;
case RSP_LC2:
DecodeLC2Name();
break;
case RSP_SC2:
DecodeSC2Name();
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
void RSPInstruction::DecodeSpecialName(void)
{
switch (m_Instruction.funct)
{
case RSP_SPECIAL_SLL:
if (m_Instruction.Value != 0)
{
strcpy(m_Name, "SLL");
sprintf(m_Param, "%s, %s, 0x%X", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rt), m_Instruction.sa);
}
else
{
strcpy(m_Name, "NOP");
}
break;
case RSP_SPECIAL_SRL:
strcpy(m_Name, "SRL");
sprintf(m_Param, "%s, %s, 0x%X", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rt), m_Instruction.sa);
break;
case RSP_SPECIAL_SRA:
strcpy(m_Name, "SRA");
sprintf(m_Param, "%s, %s, 0x%X", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rt), m_Instruction.sa);
break;
case RSP_SPECIAL_SLLV:
strcpy(m_Name, "SLLV");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd),GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs));
break;
case RSP_SPECIAL_SRLV:
strcpy(m_Name, "SRLV");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs));
break;
case RSP_SPECIAL_SRAV:
strcpy(m_Name, "SRAV");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rt), GPR_Name(m_Instruction.rs));
break;
case RSP_SPECIAL_JR:
strcpy(m_Name, "JR");
sprintf(m_Param, "%s", GPR_Name(m_Instruction.rs));
break;
case RSP_SPECIAL_JALR:
strcpy(m_Name, "JALR");
sprintf(m_Param, "%s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs));
break;
case RSP_SPECIAL_BREAK:
strcpy(m_Name, "BREAK");
break;
case RSP_SPECIAL_ADD:
strcpy(m_Name, "ADD");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_ADDU:
strcpy(m_Name, "ADDU");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_SUB:
strcpy(m_Name, "SUB");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_SUBU:
strcpy(m_Name, "SUBU");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_AND:
strcpy(m_Name, "AND");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_OR:
strcpy(m_Name, "OR");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_XOR:
strcpy(m_Name, "XOR");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_NOR:
strcpy(m_Name, "NOR");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_SLT:
strcpy(m_Name, "SLT");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
case RSP_SPECIAL_SLTU:
strcpy(m_Name, "SLTU");
sprintf(m_Param, "%s, %s, %s", GPR_Name(m_Instruction.rd), GPR_Name(m_Instruction.rs), GPR_Name(m_Instruction.rt));
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
void RSPInstruction::DecodeRegImmName(void)
{
switch (m_Instruction.rt)
{
case RSP_REGIMM_BLTZ:
strcpy(m_Name, "BLTZ");
sprintf(m_Param, "%s, 0x%04X", GPR_Name(m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
break;
case RSP_REGIMM_BGEZ:
if (m_Instruction.rs == 0)
{
strcpy(m_Name, "B");
sprintf(m_Param, "0x%04X", (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
else
{
strcpy(m_Name, "BGEZ");
sprintf(m_Param, "%s, 0x%04X", GPR_Name(m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
break;
case RSP_REGIMM_BLTZAL:
strcpy(m_Name, "BLTZAL");
sprintf(m_Param, "%s, 0x%04X", GPR_Name(m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
break;
case RSP_REGIMM_BGEZAL:
if (m_Instruction.rs == 0)
{
strcpy(m_Name, "BAL");
sprintf(m_Param, "0x%04X", (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
else
{
strcpy(m_Name, "BGEZAL");
sprintf(m_Param, "%s, 0x%04X", GPR_Name(m_Instruction.rs), (m_Address + ((short)m_Instruction.offset << 2) + 4) & 0x1FFC);
}
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
void RSPInstruction::DecodeCop0Name(void)
{
switch (m_Instruction.rs)
{
case RSP_COP0_MF:
strcpy(m_Name, "MFC0");
sprintf(m_Param, "%s, %s", GPR_Name(m_Instruction.rt), COP0_Name(m_Instruction.rd));
break;
case RSP_COP0_MT:
strcpy(m_Name, "MTC0");
sprintf(m_Param, "%s, %s", GPR_Name(m_Instruction.rt), COP0_Name(m_Instruction.rd));
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
void RSPInstruction::DecodeCop2Name(void)
{
if ((m_Instruction.rs & 0x10) == 0)
{
switch (m_Instruction.rs)
{
case RSP_COP2_MF:
strcpy(m_Name, "MFC2");
sprintf(m_Param, "%s, $v%d[%d]", GPR_Name(m_Instruction.rt), m_Instruction.rd, m_Instruction.sa >> 1);
break;
case RSP_COP2_CF:
strcpy(m_Name, "CFC2");
sprintf(m_Param, "%s, %d", GPR_Name(m_Instruction.rt), m_Instruction.rd % 4);
break;
case RSP_COP2_MT:
strcpy(m_Name, "MTC2");
sprintf(m_Param, "%s, $v%d[%d]", GPR_Name(m_Instruction.rt), m_Instruction.rd, m_Instruction.sa >> 1);
break;
case RSP_COP2_CT:
strcpy(m_Name, "CTC2");
sprintf(m_Param, "%s, %d", GPR_Name(m_Instruction.rt), m_Instruction.rd % 4);
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
else
{
switch (m_Instruction.funct)
{
case RSP_VECTOR_VMULF:
strcpy(m_Name, "VMULF");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMULU:
strcpy(m_Name, "VMULU");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMUDL:
strcpy(m_Name, "VMUDL");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMUDM:
strcpy(m_Name, "VMUDM");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMUDN:
strcpy(m_Name, "VMUDN");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMUDH:
strcpy(m_Name, "VMUDH");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMACF:
strcpy(m_Name, "VMACF");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMACU:
strcpy(m_Name, "VMACU");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMACQ:
strcpy(m_Name, "VMACQ");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMADL:
strcpy(m_Name, "VMADL");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMADM:
strcpy(m_Name, "VMADM");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMADN:
strcpy(m_Name, "VMADN");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMADH:
strcpy(m_Name, "VMADH");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VADD:
strcpy(m_Name, "VADD");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VSUB:
strcpy(m_Name, "VSUB");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VABS:
strcpy(m_Name, "VABS");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VADDC:
strcpy(m_Name, "VADDC");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VSUBC:
strcpy(m_Name, "VSUBC");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VSAW:
strcpy(m_Name, "VSAW");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VLT:
strcpy(m_Name, "VLT");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VEQ:
strcpy(m_Name, "VEQ");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VNE:
strcpy(m_Name, "VNE");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VGE:
strcpy(m_Name, "VGE");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VCL:
strcpy(m_Name, "VCL");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VCH:
strcpy(m_Name, "VCH");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VCR:
strcpy(m_Name, "VCR");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VMRG:
strcpy(m_Name, "VMRG");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VAND:
strcpy(m_Name, "VAND");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VNAND:
strcpy(m_Name, "VNAND");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VOR:
strcpy(m_Name, "VOR");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VNOR:
strcpy(m_Name, "VNOR");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VXOR:
strcpy(m_Name, "VXOR");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VNXOR:
strcpy(m_Name, "VNXOR");
sprintf(m_Param, "$v%d, $v%d, $v%d%s", m_Instruction.sa, m_Instruction.rd, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF));
break;
case RSP_VECTOR_VRCP:
strcpy(m_Name, "VRCP");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
case RSP_VECTOR_VRCPL:
strcpy(m_Name, "VRCPL");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
break;
case RSP_VECTOR_VRCPH:
strcpy(m_Name, "VRCPH");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
break;
case RSP_VECTOR_VMOV:
strcpy(m_Name, "VMOV");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
break;
case RSP_VECTOR_VRSQ:
strcpy(m_Name, "VRSQ");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
break;
case RSP_VECTOR_VRSQL:
strcpy(m_Name, "VRSQL");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
break;
case RSP_VECTOR_VRSQH:
strcpy(m_Name, "VRSQH");
sprintf(m_Param, "$v%d[%d], $v%d%s", m_Instruction.sa, m_Instruction.rd & 0x7, m_Instruction.rt, ElementSpecifier(m_Instruction.rs & 0xF)); break;
break;
case RSP_VECTOR_VNOP:
strcpy(m_Name, "VNOP");
strcpy(m_Param, "");
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
}
void RSPInstruction::DecodeLC2Name(void)
{
switch (m_Instruction.rd)
{
case RSP_LSC2_BV:
strcpy(m_Name, "LBV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_SV:
strcpy(m_Name, "LSV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_LV:
strcpy(m_Name, "LLV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_DV:
strcpy(m_Name, "LDV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_QV:
strcpy(m_Name, "LQV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_RV:
strcpy(m_Name, "LRV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_PV:
strcpy(m_Name, "LPV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_UV:
strcpy(m_Name, "LUV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_HV:
strcpy(m_Name, "LHV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_FV:
strcpy(m_Name, "LFV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_TV:
strcpy(m_Name, "LTV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}
void RSPInstruction::DecodeSC2Name(void)
{
switch (m_Instruction.rd)
{
case RSP_LSC2_BV:
strcpy(m_Name, "SBV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_SV:
strcpy(m_Name, "SSV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_LV:
strcpy(m_Name, "SLV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_DV:
strcpy(m_Name, "SDV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_QV:
strcpy(m_Name, "SQV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_RV:
strcpy(m_Name, "SRV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_PV:
strcpy(m_Name, "SPV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_UV:
strcpy(m_Name, "SUV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_HV:
strcpy(m_Name, "SHV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_FV:
strcpy(m_Name, "SFV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
case RSP_LSC2_TV:
strcpy(m_Name, "STV");
sprintf(m_Param, "$v%d[%d], %c0x%03X(%s)", m_Instruction.rt, m_Instruction.del, (m_Instruction.voffset < 0) ? '-' : '+', abs(m_Instruction.voffset), GPR_Name(m_Instruction.base));
break;
default:
strcpy(m_Name, "UNKNOWN");
sprintf(m_Param, "0x%08X", m_Instruction.Value);
}
}