RSP: Make a class for the RSP Vector
This commit is contained in:
parent
353ef5ed89
commit
b7d7884e22
|
@ -5,7 +5,7 @@
|
|||
#include "RSP registers.h"
|
||||
#include "Recompiler CPU.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "breakpoint.h"
|
||||
#include "log.h"
|
||||
#include "memory.h"
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
#include "cpu\RSPOpcode.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RSPOpcode.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include <Windows.h>
|
||||
|
||||
extern UDWORD EleSpec[32], Indx[32];
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -20,7 +20,7 @@
|
|||
#include "RSP Registers.h"
|
||||
#include "Recompiler CPU.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "Version.h"
|
||||
#include "breakpoint.h"
|
||||
#include "log.h"
|
||||
|
|
|
@ -49,6 +49,7 @@
|
|||
<ClCompile Include="breakpoint.cpp" />
|
||||
<ClCompile Include="Cpu.cpp" />
|
||||
<ClCompile Include="cpu\RSPiInstruction.cpp" />
|
||||
<ClCompile Include="cpu\RspTypes.cpp" />
|
||||
<ClCompile Include="dma.cpp" />
|
||||
<ClCompile Include="Interpreter CPU.cpp" />
|
||||
<ClCompile Include="Interpreter Ops.cpp" />
|
||||
|
@ -84,7 +85,6 @@
|
|||
<ClInclude Include="RSP Registers.h" />
|
||||
<ClInclude Include="Rsp.h" />
|
||||
<ClInclude Include="RspTypes.h" />
|
||||
<ClInclude Include="Version.h" />
|
||||
<ClInclude Include="X86.h" />
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
|
|
|
@ -9,9 +9,6 @@
|
|||
<UniqueIdentifier>{0baf5ca2-d686-4cb5-b3d2-1617c3b17dc0}</UniqueIdentifier>
|
||||
<Extensions>h;hpp;hxx;hm;inl</Extensions>
|
||||
</Filter>
|
||||
<Filter Include="Header Files\RSP Header Files">
|
||||
<UniqueIdentifier>{d213ff3a-6660-487a-9efc-5f05821cef48}</UniqueIdentifier>
|
||||
</Filter>
|
||||
<Filter Include="Resource Files">
|
||||
<UniqueIdentifier>{53b9495d-f564-4b1d-968c-42c816ca2d41}</UniqueIdentifier>
|
||||
<Extensions>ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe</Extensions>
|
||||
|
@ -24,54 +21,6 @@
|
|||
</Filter>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="breakpoint.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Cpu.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="dma.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Interpreter CPU.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Interpreter Ops.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="log.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="memory.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Profiling.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Recompiler CPU.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Recompiler Ops.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="resource.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="RSP Command.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="RSP Registers.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Rsp.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="X86.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Version.h">
|
||||
<Filter>Header Files\RSP Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="cpu\RSPInstruction.h">
|
||||
<Filter>Header Files\cpu</Filter>
|
||||
</ClInclude>
|
||||
|
@ -81,6 +30,51 @@
|
|||
<ClInclude Include="RspTypes.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="breakpoint.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Cpu.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="dma.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Interpreter CPU.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Interpreter Ops.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="log.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="memory.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Profiling.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Recompiler CPU.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Recompiler Ops.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="resource.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="RSP Command.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="RSP Registers.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Rsp.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="X86.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ResourceCompile Include="Project64-rsp.rc">
|
||||
|
@ -145,5 +139,8 @@
|
|||
<ClCompile Include="cpu\RSPiInstruction.cpp">
|
||||
<Filter>Source Files\cpu</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="cpu\RspTypes.cpp">
|
||||
<Filter>Source Files\cpu</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
</Project>
|
|
@ -6,7 +6,7 @@
|
|||
#include "RSP Command.h"
|
||||
#include "RSP Registers.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "breakpoint.h"
|
||||
#include "memory.h"
|
||||
#include "cpu/RSPOpcode.h"
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#include <windows.h>
|
||||
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include <commctrl.h>
|
||||
#include <stdio.h>
|
||||
|
||||
|
@ -40,7 +40,7 @@ WNDPROC RefreshProc;
|
|||
// RSP registers
|
||||
UWORD32 RSP_GPR[32], RSP_Flags[4];
|
||||
UDWORD RSP_ACCUM[8];
|
||||
VECTOR RSP_Vect[32] alignas(16);
|
||||
RSPVector RSP_Vect[32];
|
||||
|
||||
char * GPR_Strings[32] = {
|
||||
"R0", "AT", "V0", "V1", "A0", "A1", "A2", "A3",
|
||||
|
@ -122,7 +122,10 @@ void HideRSP_RegisterPanel(int Panel)
|
|||
void InitilizeRSPRegisters(void)
|
||||
{
|
||||
memset(RSP_GPR, 0, sizeof(RSP_GPR));
|
||||
memset(RSP_Vect, 0, sizeof(RSP_Vect));
|
||||
for (size_t i = 0, n = sizeof(RSP_Vect) / sizeof(RSP_Vect[0]); i < n; i++)
|
||||
{
|
||||
RSP_Vect[i] = RSPVector();
|
||||
}
|
||||
}
|
||||
|
||||
void PaintRSP_HiddenPanel(HWND hWnd)
|
||||
|
@ -711,16 +714,16 @@ void UpdateRSPRegistersScreen(void)
|
|||
case Vector1:
|
||||
for (count = 0; count < 16; count++)
|
||||
{
|
||||
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", RSP_Vect[count].W[3],
|
||||
RSP_Vect[count].W[2], RSP_Vect[count].W[1], RSP_Vect[count].W[0]);
|
||||
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", RSP_Vect[count].s32(3),
|
||||
RSP_Vect[count].s32(2), RSP_Vect[count].s32(1), RSP_Vect[count].s32(0));
|
||||
SetWindowTextA(hVECT1[count], RegisterValue);
|
||||
}
|
||||
break;
|
||||
case Vector2:
|
||||
for (count = 0; count < 16; count++)
|
||||
{
|
||||
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", RSP_Vect[count + 16].W[3],
|
||||
RSP_Vect[count + 16].W[2], RSP_Vect[count + 16].W[1], RSP_Vect[count + 16].W[0]);
|
||||
sprintf(RegisterValue, " 0x%08X - %08X - %08X - %08X", RSP_Vect[count + 16].s32(3),
|
||||
RSP_Vect[count + 16].s32(2), RSP_Vect[count + 16].s32(1), RSP_Vect[count + 16].s32(0));
|
||||
SetWindowTextA(hVECT2[count], RegisterValue);
|
||||
}
|
||||
break;
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
|
||||
#define SP_STATUS_HALT 0x001 // Bit 0: Halt
|
||||
#define SP_STATUS_BROKE 0x002 // Bit 1: Broke
|
||||
|
@ -111,4 +111,4 @@ void UpdateRSPRegistersScreen(void);
|
|||
// RSP registers
|
||||
extern UWORD32 RSP_GPR[32], RSP_Flags[4];
|
||||
extern UDWORD RSP_ACCUM[8];
|
||||
extern VECTOR RSP_Vect[32];
|
||||
extern RSPVector RSP_Vect[32];
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
#include "RSP Command.h"
|
||||
#include "Recompiler CPU.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "log.h"
|
||||
#include "memory.h"
|
||||
#include "cpu/RSPOpcode.h"
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
#include "Recompiler CPU.h"
|
||||
#include "Recompiler Ops.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "log.h"
|
||||
#include "memory.h"
|
||||
#include "cpu/RSPOpcode.h"
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
#include "cpu/RSPOpcode.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
|
||||
extern uint32_t CompilePC, NextInstruction, JumpTableSize;
|
||||
extern bool ChangedPC;
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -6,7 +6,7 @@
|
|||
#include "RSP Registers.h"
|
||||
#include "Recompiler CPU.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "dma.h"
|
||||
#include "log.h"
|
||||
#include "memory.h"
|
||||
|
@ -32,17 +32,17 @@ void RSP_Sections_VMUDH(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMUDH
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
if (AccumStyle == Middle16BitAccum)
|
||||
{
|
||||
|
@ -100,17 +100,17 @@ void RSP_Sections_VMADH(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMUDH
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
if (AccumStyle == Middle16BitAccum)
|
||||
{
|
||||
|
@ -173,17 +173,17 @@ void RSP_Sections_VMUDL(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMUDL
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
MmxPmullwRegToReg(x86_MM0, x86_MM2);
|
||||
MmxPmullwRegToReg(x86_MM1, x86_MM3);
|
||||
|
@ -217,17 +217,17 @@ void RSP_Sections_VMADL(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMADL
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
MmxPmullwRegToReg(x86_MM0 + 2, x86_MM2 + 2);
|
||||
MmxPmullwRegToReg(x86_MM1 + 2, x86_MM3 + 2);
|
||||
|
@ -266,9 +266,9 @@ void RSP_Sections_VMUDM(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMUDM
|
||||
if (AccumStyle != Middle16BitAccum)
|
||||
|
@ -276,9 +276,9 @@ void RSP_Sections_VMUDM(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
MmxPmullwRegToReg(x86_MM0, x86_MM2);
|
||||
MmxPmullwRegToReg(x86_MM1, x86_MM3);
|
||||
|
@ -301,9 +301,9 @@ void RSP_Sections_VMUDM(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
if ((RSPOpC.rs & 0xF) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM4, &RSP_Vect[RSPOpC.rt].UHW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM4, &RSP_Vect[RSPOpC.rt].u16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM5, &RSP_Vect[RSPOpC.rt].UHW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM5, &RSP_Vect[RSPOpC.rt].u16(4), Reg);
|
||||
|
||||
// Copy the signed portion
|
||||
MmxMoveRegToReg(x86_MM2, x86_MM0);
|
||||
|
@ -379,9 +379,9 @@ void RSP_Sections_VMADM(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMADM
|
||||
if (AccumStyle != Middle16BitAccum)
|
||||
|
@ -389,9 +389,9 @@ void RSP_Sections_VMADM(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
MmxPmullwRegToReg(x86_MM0 + 2, x86_MM2 + 2);
|
||||
MmxPmullwRegToReg(x86_MM1 + 2, x86_MM3 + 2);
|
||||
|
@ -414,9 +414,9 @@ void RSP_Sections_VMADM(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
if ((RSPOpC.rs & 0xF) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM4 + 2, &RSP_Vect[RSPOpC.rt].UHW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM4 + 2, &RSP_Vect[RSPOpC.rt].u16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM5 + 2, &RSP_Vect[RSPOpC.rt].UHW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM5 + 2, &RSP_Vect[RSPOpC.rt].u16(4), Reg);
|
||||
|
||||
// Copy the signed portion
|
||||
MmxMoveRegToReg(x86_MM2 + 2, x86_MM0 + 2);
|
||||
|
@ -499,16 +499,16 @@ void RSP_Sections_VMUDN(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
MmxPmullwRegToReg(x86_MM0, x86_MM2);
|
||||
MmxPmullwRegToReg(x86_MM1, x86_MM3);
|
||||
|
@ -536,16 +536,16 @@ void RSP_Sections_VMUDN(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM4, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM4, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM5, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM5, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
if ((RSPOpC.rs & 0xF) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rt].UHW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RSPOpC.rt].u16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RSPOpC.rt].UHW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RSPOpC.rt].u16(4), Reg);
|
||||
}
|
||||
else if ((RSPOpC.rs & 0xF) >= 8)
|
||||
{
|
||||
|
@ -595,16 +595,16 @@ void RSP_Sections_VMADN(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
{
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
MmxPmullwRegToReg(x86_MM0 + 2, x86_MM2 + 2);
|
||||
MmxPmullwRegToReg(x86_MM1 + 2, x86_MM3 + 2);
|
||||
|
@ -632,16 +632,16 @@ void RSP_Sections_VMADN(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM4 + 2, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM4 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM5 + 2, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM5 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
if ((RSPOpC.rs & 0xF) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[0]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RSPOpC.rt].UHW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RSPOpC.rt].u16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].UHW[4]", RSPOpC.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RSPOpC.rt].UHW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RSPOpC.rt].u16(4), Reg);
|
||||
}
|
||||
else if ((RSPOpC.rs & 0xF) >= 8)
|
||||
{
|
||||
|
@ -696,17 +696,17 @@ void RSP_Sections_VMULF(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMULF
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
if (AccumStyle != Middle16BitAccum)
|
||||
{
|
||||
|
@ -767,17 +767,17 @@ void RSP_Sections_VMACF(RSPOpcode RspOp, DWORD AccumStyle)
|
|||
|
||||
// Load source registers
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM0 + 2, &RSP_Vect[RspOp.rd].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rd);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM1 + 2, &RSP_Vect[RspOp.rd].s16(4), Reg);
|
||||
|
||||
// VMACF
|
||||
if ((RspOp.rs & 0x0f) < 2)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].HW[0], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM2 + 2, &RSP_Vect[RspOp.rt].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RspOp.rt);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].HW[4], Reg);
|
||||
MmxMoveQwordVariableToReg(x86_MM3 + 2, &RSP_Vect[RspOp.rt].s16(4), Reg);
|
||||
|
||||
if (AccumStyle != Middle16BitAccum)
|
||||
{
|
||||
|
@ -928,16 +928,16 @@ void Compile_Section_000(void)
|
|||
if (WriteToVectorDest(vmadn.sa, CompilePC - 4) == true)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmadn.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].HW[0], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmadn.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmadn.sa].HW[4], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmadn.sa].s16(4), Reg);
|
||||
}
|
||||
}
|
||||
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmadn.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].HW[0], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmadn.sa].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmadn.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmadn.sa].HW[4], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmadn.sa].s16(4), Reg);
|
||||
|
||||
MmxEmptyMultimediaState();
|
||||
}
|
||||
|
@ -1022,9 +1022,9 @@ void Compile_Section_001(void)
|
|||
if (WriteToVectorDest(vmulf.sa, CompilePC) == true)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmulf.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmulf.sa].HW[0], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmulf.sa].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmulf.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmulf.sa].HW[4], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmulf.sa].s16(4), Reg);
|
||||
}
|
||||
CompilePC += 4;
|
||||
|
||||
|
@ -1037,9 +1037,9 @@ void Compile_Section_001(void)
|
|||
if (WriteToVectorDest(vmacf.sa, CompilePC - 4) == true)
|
||||
{
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", vmacf.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmacf.sa].HW[0], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vmacf.sa].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", vmacf.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmacf.sa].HW[4], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vmacf.sa].s16(4), Reg);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1153,15 +1153,15 @@ void Compile_Section_002(void)
|
|||
vsaw = op[10];
|
||||
MmxXorRegToReg(x86_MM4, x86_MM4);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM4, &RSP_Vect[vsaw.sa].HW[0], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM4, &RSP_Vect[vsaw.sa].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RSPOpC.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM4, &RSP_Vect[vsaw.sa].HW[4], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM4, &RSP_Vect[vsaw.sa].s16(4), Reg);
|
||||
|
||||
vsaw = op[11];
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[0]", RSPOpC.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vsaw.sa].HW[0], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM0, &RSP_Vect[vsaw.sa].s16(0), Reg);
|
||||
sprintf(Reg, "RSP_Vect[%i].HW[4]", RSPOpC.sa);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vsaw.sa].HW[4], Reg);
|
||||
MmxMoveQwordRegToVariable(x86_MM1, &RSP_Vect[vsaw.sa].s16(4), Reg);
|
||||
|
||||
MmxEmptyMultimediaState();
|
||||
|
||||
|
@ -1197,47 +1197,46 @@ bool Check_Section_003(void)
|
|||
static void resampler_hle()
|
||||
{
|
||||
UDWORD accum, initial;
|
||||
DWORD const2 = (DWORD)RSP_Vect[18].UHW[4 ^ 7];
|
||||
__int64 const3 = (__int64)((int)RSP_Vect[30].HW[0 ^ 7]) << 16;
|
||||
int i;
|
||||
DWORD const2 = (DWORD)RSP_Vect[18].u16(4 ^ 7);
|
||||
__int64 const3 = (__int64)((int)RSP_Vect[30].s16(0 ^ 7)) << 16;
|
||||
|
||||
// VMUDM $v23, $v31, $v23 [7]
|
||||
initial.DW = (__int64)((DWORD)RSP_Vect[23].UHW[7 ^ 7]) << 16;
|
||||
initial.DW = (__int64)((DWORD)RSP_Vect[23].u16(7 ^ 7)) << 16;
|
||||
// VMADH $v23, $v31, $v22 [7]
|
||||
initial.W[1] += (int)RSP_Vect[22].HW[7 ^ 7];
|
||||
initial.W[1] += (int)RSP_Vect[22].s16(7 ^ 7);
|
||||
|
||||
for (i = 0; i < 8; i++)
|
||||
for (uint8_t i = 0; i < 8; i++)
|
||||
{
|
||||
accum.DW = initial.DW;
|
||||
|
||||
// VMADM $v22, $v25, $v18 [4]
|
||||
accum.DW += (__int64)((int)RSP_Vect[25].HW[i] * const2) << 16;
|
||||
accum.DW += (__int64)((int)RSP_Vect[25].s16(i) * const2) << 16;
|
||||
if (accum.W[1] > 0x7FFF)
|
||||
{
|
||||
RSP_Vect[22].HW[i] = 0x7FFF;
|
||||
RSP_Vect[22].s16(i) = 0x7FFF;
|
||||
}
|
||||
else if (accum.W[1] < -0x8000)
|
||||
{
|
||||
RSP_Vect[22].HW[i] = -0x8000;
|
||||
RSP_Vect[22].s16(i) = -0x8000;
|
||||
}
|
||||
else
|
||||
{
|
||||
RSP_Vect[22].HW[i] = accum.HW[2];
|
||||
RSP_Vect[22].s16(i) = accum.HW[2];
|
||||
}
|
||||
|
||||
// VMADN $v23, $v31, $v30 [0]
|
||||
accum.DW += const3;
|
||||
if (accum.W[1] > 0x7FFF)
|
||||
{
|
||||
RSP_Vect[23].HW[i] = 0xFFFF;
|
||||
RSP_Vect[23].s16(i) = 0xFFFF;
|
||||
}
|
||||
else if (accum.W[1] < -0x8000)
|
||||
{
|
||||
RSP_Vect[23].HW[i] = 0;
|
||||
RSP_Vect[23].s16(i) = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
RSP_Vect[23].HW[i] = accum.HW[1];
|
||||
RSP_Vect[23].s16(i) = accum.HW[1];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#pragma once
|
||||
#include <Project64-plugin-spec/Rsp.h>
|
||||
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include <stdint.h>
|
||||
|
||||
// Profiling
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
|
||||
#include "RSP registers.h"
|
||||
#include "Rsp.h"
|
||||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
#include "log.h"
|
||||
#include "memory.h"
|
||||
#include "x86.h"
|
||||
|
|
|
@ -0,0 +1,37 @@
|
|||
#include "RspTypes.h"
|
||||
|
||||
RSPVector::RSPVector()
|
||||
{
|
||||
m_Reg[0] = 0;
|
||||
m_Reg[1] = 0;
|
||||
}
|
||||
|
||||
int8_t & RSPVector::s8(uint8_t Index)
|
||||
{
|
||||
return ((int8_t*)&m_Reg)[15 - Index];
|
||||
}
|
||||
|
||||
uint8_t & RSPVector::u8(uint8_t Index)
|
||||
{
|
||||
return ((uint8_t*)&m_Reg)[15 - Index];
|
||||
}
|
||||
|
||||
int16_t & RSPVector::s16(uint8_t Index)
|
||||
{
|
||||
return ((int16_t*)&m_Reg)[7 - Index];
|
||||
}
|
||||
|
||||
uint16_t & RSPVector::u16(uint8_t Index)
|
||||
{
|
||||
return ((uint16_t*)&m_Reg)[7 - Index];
|
||||
}
|
||||
|
||||
int32_t & RSPVector::s32(uint8_t Index)
|
||||
{
|
||||
return ((int32_t*)&m_Reg)[3 - Index];
|
||||
}
|
||||
|
||||
uint64_t & RSPVector::u64(uint8_t Index)
|
||||
{
|
||||
return m_Reg[1 - Index];
|
||||
}
|
|
@ -1,5 +1,4 @@
|
|||
#ifndef __Types_h
|
||||
#define __Types_h
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
@ -25,16 +24,18 @@ typedef union tagUDWORD
|
|||
uint8_t UB[8];
|
||||
} UDWORD;
|
||||
|
||||
typedef union tagVect
|
||||
class RSPVector
|
||||
{
|
||||
int64_t DW[2];
|
||||
uint64_t UDW[2];
|
||||
int32_t W[4];
|
||||
uint32_t UW[4];
|
||||
int16_t HW[8];
|
||||
uint16_t UHW[8];
|
||||
int8_t B[16];
|
||||
uint8_t UB[16];
|
||||
} VECTOR;
|
||||
public:
|
||||
RSPVector();
|
||||
|
||||
#endif
|
||||
int8_t & s8(uint8_t Index);
|
||||
uint8_t & u8(uint8_t Index);
|
||||
int16_t & s16(uint8_t Index);
|
||||
uint16_t & u16(uint8_t Index);
|
||||
int32_t & s32(uint8_t Index);
|
||||
uint64_t & u64(uint8_t Index);
|
||||
|
||||
private:
|
||||
uint64_t m_Reg[2] alignas(16);
|
||||
};
|
|
@ -115,14 +115,14 @@ void RSP_LB_DMEM(uint32_t Addr, uint8_t * Value)
|
|||
*Value = *(uint8_t *)(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
}
|
||||
|
||||
void RSP_LBV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LBV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
RSP_Vect[vect].B[15 - element] = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
RSP_Vect[vect].s8(15 - element) = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
}
|
||||
|
||||
void RSP_LDV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LDV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count;
|
||||
uint8_t length, Count;
|
||||
|
||||
length = 8;
|
||||
if (length > 16 - element)
|
||||
|
@ -131,15 +131,15 @@ void RSP_LDV_DMEM(uint32_t Addr, int vect, int element)
|
|||
}
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
RSP_Vect[vect].B[15 - Count] = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
RSP_Vect[vect].s8(15 - Count) = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_LFV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LFV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, count;
|
||||
VECTOR Temp;
|
||||
uint8_t length, count;
|
||||
RSPVector Temp;
|
||||
|
||||
length = 8;
|
||||
if (length > 16 - element)
|
||||
|
@ -147,18 +147,18 @@ void RSP_LFV_DMEM(uint32_t Addr, int vect, int element)
|
|||
length = 16 - element;
|
||||
}
|
||||
|
||||
Temp.HW[7] = *(RSPInfo.DMEM + (((Addr + element) ^ 3) & 0xFFF)) << 7;
|
||||
Temp.HW[6] = *(RSPInfo.DMEM + (((Addr + ((0x4 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.HW[5] = *(RSPInfo.DMEM + (((Addr + ((0x8 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.HW[4] = *(RSPInfo.DMEM + (((Addr + ((0xC - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.HW[3] = *(RSPInfo.DMEM + (((Addr + ((0x8 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.HW[2] = *(RSPInfo.DMEM + (((Addr + ((0xC - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.HW[1] = *(RSPInfo.DMEM + (((Addr + ((0x10 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.HW[0] = *(RSPInfo.DMEM + (((Addr + ((0x4 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(7) = *(RSPInfo.DMEM + (((Addr + element) ^ 3) & 0xFFF)) << 7;
|
||||
Temp.s16(6) = *(RSPInfo.DMEM + (((Addr + ((0x4 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(5) = *(RSPInfo.DMEM + (((Addr + ((0x8 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(4) = *(RSPInfo.DMEM + (((Addr + ((0xC - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(3) = *(RSPInfo.DMEM + (((Addr + ((0x8 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(2) = *(RSPInfo.DMEM + (((Addr + ((0xC - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(1) = *(RSPInfo.DMEM + (((Addr + ((0x10 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
Temp.s16(0) = *(RSPInfo.DMEM + (((Addr + ((0x4 - element) ^ 3) & 0xf)) & 0xFFF)) << 7;
|
||||
|
||||
for (count = element; count < (length + element); count++)
|
||||
{
|
||||
RSP_Vect[vect].B[15 - count] = Temp.B[15 - count];
|
||||
RSP_Vect[vect].s8(15 - count) = Temp.s8(15 - count);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -173,21 +173,21 @@ void RSP_LH_DMEM(uint32_t Addr, uint16_t * Value)
|
|||
*Value = *(uint16_t *)(RSPInfo.DMEM + ((Addr ^ 2) & 0xFFF));
|
||||
}
|
||||
|
||||
void RSP_LHV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LHV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
RSP_Vect[vect].HW[7] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[6] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 2) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[5] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 4) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[4] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 6) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[3] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 8) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[2] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 10) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[1] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 12) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[0] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 14) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(7) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(6) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 2) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(5) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 4) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(4) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 6) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(3) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 8) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(2) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 10) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(1) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 12) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(0) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 14) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
}
|
||||
|
||||
void RSP_LLV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LLV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count;
|
||||
uint8_t length, Count;
|
||||
|
||||
length = 4;
|
||||
if (length > 16 - element)
|
||||
|
@ -196,56 +196,54 @@ void RSP_LLV_DMEM(uint32_t Addr, int vect, int element)
|
|||
}
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
RSP_Vect[vect].B[15 - Count] = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
RSP_Vect[vect].s8(15 - Count) = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_LPV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LPV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
RSP_Vect[vect].HW[7] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[6] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 1) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[5] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 2) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[4] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 3) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[3] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 4) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[2] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 5) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[1] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 6) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].HW[0] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 7) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(7) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(6) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 1) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(5) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 2) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(4) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 3) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(3) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 4) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(2) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 5) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(1) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 6) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
RSP_Vect[vect].s16(0) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 7) & 0xF) ^ 3) & 0xFFF)) << 8;
|
||||
}
|
||||
|
||||
void RSP_LRV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LRV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count, offset;
|
||||
uint8_t length, Count, offset;
|
||||
|
||||
offset = (Addr & 0xF) - 1;
|
||||
length = (Addr & 0xF) - element;
|
||||
Addr &= 0xFF0;
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
RSP_Vect[vect].B[offset - Count] = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
RSP_Vect[vect].s8(offset - Count) = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_LQV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LQV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count;
|
||||
|
||||
length = ((Addr + 0x10) & ~0xF) - Addr;
|
||||
uint32_t length = ((Addr + 0x10) & ~0xF) - Addr;
|
||||
if (length > 16 - element)
|
||||
{
|
||||
length = 16 - element;
|
||||
}
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
for (uint8_t Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
RSP_Vect[vect].B[15 - Count] = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
RSP_Vect[vect].s8(15 - Count) = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_LSV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LSV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count;
|
||||
uint8_t length, Count;
|
||||
|
||||
length = 2;
|
||||
if (length > 16 - element)
|
||||
|
@ -254,14 +252,14 @@ void RSP_LSV_DMEM(uint32_t Addr, int vect, int element)
|
|||
}
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
RSP_Vect[vect].B[15 - Count] = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
RSP_Vect[vect].s8(15 - Count) = *(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_LTV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LTV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int del, count, length;
|
||||
uint8_t del, count, length;
|
||||
|
||||
length = 8;
|
||||
if (length > 32 - vect)
|
||||
|
@ -273,22 +271,22 @@ void RSP_LTV_DMEM(uint32_t Addr, int vect, int element)
|
|||
for (count = 0; count < length; count++)
|
||||
{
|
||||
del = ((8 - (element >> 1) + count) << 1) & 0xF;
|
||||
RSP_Vect[vect + count].B[15 - del] = *(RSPInfo.DMEM + (Addr ^ 3));
|
||||
RSP_Vect[vect + count].B[14 - del] = *(RSPInfo.DMEM + ((Addr + 1) ^ 3));
|
||||
RSP_Vect[vect + count].s8(15 - del) = *(RSPInfo.DMEM + (Addr ^ 3));
|
||||
RSP_Vect[vect + count].s8(14 - del) = *(RSPInfo.DMEM + ((Addr + 1) ^ 3));
|
||||
Addr += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_LUV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_LUV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
RSP_Vect[vect].HW[7] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[6] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 1) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[5] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 2) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[4] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 3) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[3] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 4) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[2] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 5) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[1] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 6) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].HW[0] = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 7) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(7) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(6) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 1) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(5) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 2) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(4) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 3) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(3) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 4) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(2) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 5) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(1) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 6) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
RSP_Vect[vect].s16(0) = *(RSPInfo.DMEM + ((Addr + ((0x10 - element + 7) & 0xF) ^ 3) & 0xFFF)) << 7;
|
||||
}
|
||||
|
||||
void RSP_LW_DMEM(uint32_t Addr, uint32_t * Value)
|
||||
|
@ -318,23 +316,23 @@ void RSP_SB_DMEM(uint32_t Addr, uint8_t Value)
|
|||
*(uint8_t *)(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = Value;
|
||||
}
|
||||
|
||||
void RSP_SBV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SBV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].B[15 - element];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].s8(15 - element);
|
||||
}
|
||||
|
||||
void RSP_SDV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SDV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int Count;
|
||||
|
||||
for (Count = element; Count < (8 + element); Count++)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].B[15 - (Count & 0xF)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].s8(15 - (Count & 0xF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_SFV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SFV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int offset = Addr & 0xF;
|
||||
Addr &= 0xFF0;
|
||||
|
@ -342,16 +340,16 @@ void RSP_SFV_DMEM(uint32_t Addr, int vect, int element)
|
|||
switch (element)
|
||||
{
|
||||
case 0:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[7] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[6] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[5] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[4] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(7) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(6) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(5) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(4) >> 7) & 0xFF;
|
||||
break;
|
||||
case 1:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[1] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[0] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[3] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[2] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(1) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(0) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(3) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(2) >> 7) & 0xFF;
|
||||
break;
|
||||
case 2:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = 0;
|
||||
|
@ -366,16 +364,16 @@ void RSP_SFV_DMEM(uint32_t Addr, int vect, int element)
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF) ^ 3))) = 0;
|
||||
break;
|
||||
case 4:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[6] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[5] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[4] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[7] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(6) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(5) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(4) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(7) >> 7) & 0xFF;
|
||||
break;
|
||||
case 5:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[0] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[3] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[2] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[1] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(0) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(3) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(2) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(1) >> 7) & 0xFF;
|
||||
break;
|
||||
case 6:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = 0;
|
||||
|
@ -390,10 +388,10 @@ void RSP_SFV_DMEM(uint32_t Addr, int vect, int element)
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = 0;
|
||||
break;
|
||||
case 8:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[3] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[2] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[1] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[0] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(3) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(2) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(1) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(0) >> 7) & 0xFF;
|
||||
break;
|
||||
case 9:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = 0;
|
||||
|
@ -408,16 +406,16 @@ void RSP_SFV_DMEM(uint32_t Addr, int vect, int element)
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = 0;
|
||||
break;
|
||||
case 11:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[4] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[7] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[6] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[5] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(4) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(7) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(6) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(5) >> 7) & 0xFF;
|
||||
break;
|
||||
case 12:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[2] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[1] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[0] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[3] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(2) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(1) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(0) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(3) >> 7) & 0xFF;
|
||||
break;
|
||||
case 13:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = 0;
|
||||
|
@ -432,10 +430,10 @@ void RSP_SFV_DMEM(uint32_t Addr, int vect, int element)
|
|||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = 0;
|
||||
break;
|
||||
case 15:
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].UHW[7] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[6] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[5] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].UHW[4] >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + offset) ^ 3)) = (RSP_Vect[vect].u16(7) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 4) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(6) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 8) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(5) >> 7) & 0xFF;
|
||||
*(RSPInfo.DMEM + ((Addr + ((offset + 12) & 0xF)) ^ 3)) = (RSP_Vect[vect].u16(4) >> 7) & 0xFF;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -453,38 +451,38 @@ void RSP_SH_DMEM(uint32_t Addr, uint16_t Value)
|
|||
}
|
||||
}
|
||||
|
||||
void RSP_SHV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SHV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(15 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(14 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 2) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(13 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(12 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 4) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(11 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(10 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 6) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(9 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(8 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 8) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(7 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(6 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 10) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(5 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(4 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 12) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(3 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(2 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 14) ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[(1 - element) & 0xF] << 1) +
|
||||
(RSP_Vect[vect].UB[(0 - element) & 0xF] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((15 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((14 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 2) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((13 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((12 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 4) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((11 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((10 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 6) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((9 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((8 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 8) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((7 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((6 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 10) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((5 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((4 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 12) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((3 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((2 - element) & 0xF) >> 7);
|
||||
*(RSPInfo.DMEM + (((Addr + 14) ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8((1 - element) & 0xF) << 1) +
|
||||
(RSP_Vect[vect].u8((0 - element) & 0xF) >> 7);
|
||||
}
|
||||
|
||||
void RSP_SLV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SLV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int Count;
|
||||
|
||||
for (Count = element; Count < (4 + element); Count++)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].B[15 - (Count & 0xF)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].s8(15 - (Count & 0xF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_SPV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SPV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int Count;
|
||||
|
||||
|
@ -492,30 +490,30 @@ void RSP_SPV_DMEM(uint32_t Addr, int vect, int element)
|
|||
{
|
||||
if (((Count)&0xF) < 8)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].UB[15 - ((Count & 0xF) << 1)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].u8(15 - ((Count & 0xF) << 1));
|
||||
}
|
||||
else
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = (RSP_Vect[vect].UB[15 - ((Count & 0x7) << 1)] << 1) +
|
||||
(RSP_Vect[vect].UB[14 - ((Count & 0x7) << 1)] >> 7);
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = (RSP_Vect[vect].u8(15 - ((Count & 0x7) << 1)) << 1) +
|
||||
(RSP_Vect[vect].u8(14 - ((Count & 0x7) << 1)) >> 7);
|
||||
}
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_SQV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SQV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count;
|
||||
|
||||
length = ((Addr + 0x10) & ~0xF) - Addr;
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].B[15 - (Count & 0xF)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].s8(15 - (Count & 0xF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_SRV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SRV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int length, Count, offset;
|
||||
|
||||
|
@ -524,25 +522,25 @@ void RSP_SRV_DMEM(uint32_t Addr, int vect, int element)
|
|||
Addr &= 0xFF0;
|
||||
for (Count = element; Count < (length + element); Count++)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].B[15 - ((Count + offset) & 0xF)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].s8(15 - ((Count + offset) & 0xF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_SSV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SSV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int Count;
|
||||
|
||||
for (Count = element; Count < (2 + element); Count++)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].B[15 - (Count & 0xF)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].s8(15 - (Count & 0xF));
|
||||
Addr += 1;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_STV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_STV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int del, count, length;
|
||||
uint8_t del, count, length;
|
||||
|
||||
length = 8;
|
||||
if (length > 32 - vect)
|
||||
|
@ -553,28 +551,26 @@ void RSP_STV_DMEM(uint32_t Addr, int vect, int element)
|
|||
del = element >> 1;
|
||||
for (count = 0; count < length; count += 2)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect + del].UB[15 - count];
|
||||
*(RSPInfo.DMEM + (((Addr + 1) ^ 3) & 0xFFF)) = RSP_Vect[vect + del].UB[14 - count];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect + del].u8(15 - count);
|
||||
*(RSPInfo.DMEM + (((Addr + 1) ^ 3) & 0xFFF)) = RSP_Vect[vect + del].u8(14 - count);
|
||||
del = (del + 1) & 7;
|
||||
Addr += 2;
|
||||
}
|
||||
}
|
||||
|
||||
void RSP_SUV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SUV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int Count;
|
||||
|
||||
for (Count = element; Count < (8 + element); Count++)
|
||||
for (uint8_t Count = element; Count < (8 + element); Count++)
|
||||
{
|
||||
if (((Count)&0xF) < 8)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = ((RSP_Vect[vect].UB[15 - ((Count & 0x7) << 1)] << 1) +
|
||||
(RSP_Vect[vect].UB[14 - ((Count & 0x7) << 1)] >> 7)) &
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = ((RSP_Vect[vect].u8(15 - ((Count & 0x7) << 1)) << 1) +
|
||||
(RSP_Vect[vect].u8(14 - ((Count & 0x7) << 1)) >> 7)) &
|
||||
0xFF;
|
||||
}
|
||||
else
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].UB[15 - ((Count & 0x7) << 1)];
|
||||
*(RSPInfo.DMEM + ((Addr ^ 3) & 0xFFF)) = RSP_Vect[vect].u8(15 - ((Count & 0x7) << 1));
|
||||
}
|
||||
Addr += 1;
|
||||
}
|
||||
|
@ -595,7 +591,7 @@ void RSP_SW_DMEM(uint32_t Addr, uint32_t Value)
|
|||
}
|
||||
}
|
||||
|
||||
void RSP_SWV_DMEM(uint32_t Addr, int vect, int element)
|
||||
void RSP_SWV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element)
|
||||
{
|
||||
int Count, offset;
|
||||
|
||||
|
@ -603,7 +599,7 @@ void RSP_SWV_DMEM(uint32_t Addr, int vect, int element)
|
|||
Addr &= 0xFF0;
|
||||
for (Count = element; Count < (16 + element); Count++)
|
||||
{
|
||||
*(RSPInfo.DMEM + ((Addr + (offset & 0xF)) ^ 3)) = RSP_Vect[vect].B[15 - (Count & 0xF)];
|
||||
*(RSPInfo.DMEM + ((Addr + (offset & 0xF)) ^ 3)) = RSP_Vect[vect].s8(15 - (Count & 0xF));
|
||||
offset += 1;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
#include "RspTypes.h"
|
||||
#include "cpu/RspTypes.h"
|
||||
|
||||
int AllocateMemory(void);
|
||||
void FreeMemory(void);
|
||||
|
@ -9,32 +9,32 @@ extern void ** JumpTable;
|
|||
extern uint32_t Table;
|
||||
|
||||
void RSP_LB_DMEM(uint32_t Addr, uint8_t * Value);
|
||||
void RSP_LBV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LDV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LFV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LBV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LDV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LFV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LH_DMEM(uint32_t Addr, uint16_t * Value);
|
||||
void RSP_LHV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LLV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LPV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LRV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LQV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LSV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LTV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LUV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_LHV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LLV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LPV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LRV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LQV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LSV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LTV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LUV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_LW_DMEM(uint32_t Addr, uint32_t * Value);
|
||||
void RSP_LW_IMEM(uint32_t Addr, uint32_t * Value);
|
||||
void RSP_SB_DMEM(uint32_t Addr, uint8_t Value);
|
||||
void RSP_SBV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SDV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SFV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SBV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SDV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SFV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SH_DMEM(uint32_t Addr, uint16_t Value);
|
||||
void RSP_SHV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SLV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SPV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SQV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SRV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SSV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_STV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SUV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SHV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SLV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SPV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SQV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SRV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SSV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_STV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SUV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
void RSP_SW_DMEM(uint32_t Addr, uint32_t Value);
|
||||
void RSP_SWV_DMEM(uint32_t Addr, int vect, int element);
|
||||
void RSP_SWV_DMEM(uint32_t Addr, uint8_t vect, uint8_t element);
|
||||
|
|
Loading…
Reference in New Issue