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Core: Convert DoCopUnusableException to TriggerException

This commit is contained in:
zilmar 2023-05-18 11:26:36 +09:30
parent 456f25eb6b
commit 0dfab78c88
4 changed files with 6 additions and 49 deletions
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19
Source/Project64-core/N64System/Interpreter/InterpreterOps.cpp
View File

@ -80,9 +80,7 @@ void R4300iOp::COP2()
{
if ((g_Reg->STATUS_REGISTER & STATUS_CU2) == 0)
{
g_Reg->DoCopUnusableException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP, 2);
g_System->m_PipelineStage = PIPELINE_STAGE_JUMP;
g_System->m_JumpToLocation = (*_PROGRAM_COUNTER);
g_Reg->TriggerException(EXC_CPU, 2);
}
else
{
@ -92,16 +90,7 @@ void R4300iOp::COP2()
void R4300iOp::COP3()
{
if ((g_Reg->STATUS_REGISTER & STATUS_CU3) == 0)
{
g_Reg->DoCopUnusableException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP, 3);
g_System->m_PipelineStage = PIPELINE_STAGE_JUMP;
g_System->m_JumpToLocation = (*_PROGRAM_COUNTER);
}
else
{
UnknownOpcode();
}
g_Reg->TriggerException(EXC_II);
}
void R4300iOp::COP1_BC()
@ -3142,9 +3131,7 @@ bool R4300iOp::TestCop1UsableException(void)
{
if ((g_Reg->STATUS_REGISTER & STATUS_CU1) == 0)
{
g_Reg->DoCopUnusableException(g_System->m_PipelineStage == PIPELINE_STAGE_JUMP, 1);
g_System->m_PipelineStage = PIPELINE_STAGE_JUMP;
g_System->m_JumpToLocation = (*_PROGRAM_COUNTER);
g_Reg->TriggerException(EXC_CPU, 1);
return true;
}
return false;

30
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -641,36 +641,6 @@ void CRegisters::DoFloatingPointException(bool DelaySlot)
m_PROGRAM_COUNTER = 0x80000180;
}
void CRegisters::DoCopUnusableException(bool DelaySlot, int32_t Coprocessor)
{
if (HaveDebugger())
{
if ((STATUS_REGISTER & STATUS_EXL) != 0)
{
g_Notify->DisplayError("EXL set in break exception");
}
if ((STATUS_REGISTER & STATUS_ERL) != 0)
{
g_Notify->DisplayError("ERL set in break exception");
}
}
CAUSE_REGISTER.ExceptionCode = EXC_CPU;
CAUSE_REGISTER.CoprocessorUnitNumber = Coprocessor;
if (DelaySlot)
{
CAUSE_REGISTER.BranchDelay = 1;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER - 4);
}
else
{
CAUSE_REGISTER.BranchDelay = 0;
EPC_REGISTER = (int64_t)((int32_t)m_PROGRAM_COUNTER);
}
STATUS_REGISTER |= STATUS_EXL;
m_PROGRAM_COUNTER = 0x80000180;
}
bool CRegisters::DoIntrException(bool DelaySlot)
{
if ((STATUS_REGISTER & STATUS_IE) == 0 || (STATUS_REGISTER & STATUS_EXL) != 0 || (STATUS_REGISTER & STATUS_ERL) != 0)

1
Source/Project64-core/N64System/Mips/Register.h
View File

@ -406,7 +406,6 @@ public:
void DoAddressError(bool DelaySlot, uint64_t BadVaddr, bool FromRead);
void DoBreakException(bool DelaySlot);
void DoFloatingPointException(bool DelaySlot);
void DoCopUnusableException(bool DelaySlot, int32_t Coprocessor);
bool DoIntrException(bool DelaySlot);
void DoTLBReadMiss(bool DelaySlot, uint64_t BadVaddr);
void DoTLBWriteMiss(bool DelaySlot, uint64_t BadVaddr);

5
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

@ -9484,9 +9484,10 @@ void CX86RecompilerOps::CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo
ExitCodeBlock();
break;
case ExitReason_COP1Unuseable:
m_Assembler.MoveConstToVariable(&g_System->m_PipelineStage, "System->m_PipelineStage", m_PipelineStage == PIPELINE_STAGE_JUMP || m_PipelineStage == PIPELINE_STAGE_DELAY_SLOT ? PIPELINE_STAGE_JUMP : PIPELINE_STAGE_NORMAL);
m_Assembler.push(1);
m_Assembler.PushImm32(InDelaySlot ? "true" : "false", InDelaySlot);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::DoCopUnusableException), "CRegisters::DoCopUnusableException", 12);
m_Assembler.PushImm32("EXC_CPU", EXC_CPU);
m_Assembler.CallThis((uint32_t)g_Reg, AddressOf(&CRegisters::TriggerException), "CRegisters::TriggerException", 12);
ExitCodeBlock();
break;
case ExitReason_ResetRecompCode: