Commit Graph

115 Commits

Author SHA1 Message Date
zilmar cffeceef70 Core: Handle rom written to better 2022-08-01 10:15:56 +09:30
zilmar 7b851e6b6e Core: Break on unhandled memory 2022-08-01 10:00:07 +09:30
zilmar 63051df71e Core: Another fix at 64dd 2022-07-25 22:00:41 +09:30
zilmar 15466b6a9b Core: Fix unaligned rom access with LH/LB 2022-07-25 14:08:09 +09:30
zilmar acd5f8ecd5 Core: Add ISViewerHandler 2022-07-18 19:06:34 +09:30
zilmar 7f3b8e3601 Core: Start to add R4300iInstruction to do analysis of an opcode 2022-07-18 18:01:00 +09:30
zilmar 079e493728 Core: Improve PI Dma 2022-07-04 17:14:27 +09:30
zilmar 837e93d775 Core: Move PI_DMA_READ & PI_DMA_WRITE into PeripheralInterfaceHandler 2022-06-20 09:10:01 +09:30
zilmar 86aa483a38 Core: Move memory exceptions out of interrupter ops and in to Memory Manager 2022-06-13 11:24:36 +09:30
zilmar dc106c0df8 Core: Start to add store instruction self mod 2022-06-06 11:41:09 +09:30
zilmar 603ed853bc Core: Some code clean up for load/store non memory 2022-05-30 20:20:25 +09:30
zilmar cc0c139f7e Core: modularize store memory values using CompileStoreMemoryValue 2022-05-23 06:24:56 +09:30
zilmar f95c0f7ef1 Core: Fix bug in SDC1 2022-05-20 10:32:15 +09:30
zilmar 1617e63b84 Core: make memory reads/write to go through new CMipsMemoryVM::MemoryPtr 2022-05-16 15:26:20 +09:30
zilmar 1fe8fd1299 Core: have MemoryValue32 be able to read from rom 2022-05-16 11:00:20 +09:30
zilmar 718d7e0359 [Core] Clean up load/store usage in MemoryVirtualMem 2022-05-09 10:06:10 +09:30
zilmar de366db6c1 [Core] Clean up some warnings 2022-05-03 22:46:12 +09:30
zilmar 5a49331c0b Core: Direct tlb method to read and write to memory 2022-05-02 20:22:31 +09:30
zilmar bac3517c86 [Core] Change tlb empty to be -1 and remove rdram from tlb value 2022-05-02 19:10:35 +09:30
zilmar b74a2dc69f [Core] Change TranslateVaddr to VAddrToPAddr 2022-05-02 07:36:50 +09:30
zilmar 2f1074a287 Core: Add handler for cartridge domains 2022-04-25 17:12:07 +09:30
zilmar e9d2b9793f Core: Add Pif Ram Handler 2022-04-19 09:37:57 +09:30
zilmar 653e15a296 Core: Add RomMemoryHandler 2022-04-18 20:57:59 +09:30
zilmar fbf65bce12 Core: Add a look up table for Memory Reads or Writes 2022-04-04 10:30:27 +09:30
zilmar a249705bce Core: Add CartridgeDomain2Address1Handler 2022-03-21 20:57:57 +10:30
zilmar 2b646677ac Core: remove Write32SerialInterface 2022-03-21 15:22:42 +10:30
zilmar e1d3222a8a Core: Move Serial interface into handler 2022-03-21 15:04:59 +10:30
zilmar fcdda04da5 Core: Move Audio Interface code in to handler 2022-03-21 10:59:02 +10:30
zilmar d7e732a7eb Core: Add callback when game resets/loads state 2022-03-14 21:07:06 +10:30
zilmar 80d8e6edaa Core: Move Video Interface code in to handler 2022-03-08 10:18:56 +10:30
zilmar 928dfe3a16 Core: Add MIPSInterfaceHandler 2022-03-04 22:53:30 +10:30
zilmar db50dac063 Core: Add DisplayControlRegHandler 2022-02-21 21:56:25 +10:30
zilmar 390fe897a2 Core: Add RDRAMRegistersHandler 2022-02-21 19:47:14 +10:30
zilmar 2b008cc278 Core: Create Memory handler for SP Registers 2022-01-24 23:13:10 +10:30
LuigiBlood 16667ec4f9
[Core] Proper Dezaemon 3D SRAM 96KB save support (#2165) 2022-01-12 07:33:56 +10:30
zilmar 40683ecf79 Core: Remove legacy code 2022-01-05 08:59:12 +10:30
zilmar 226ebe68d9 Core: Remove ROM_IN_MAPSPACE 2022-01-05 08:31:27 +10:30
zilmar beb4c4378f Core: Remove Old CFB_READ code 2022-01-05 08:24:58 +10:30
zilmar 79b03c9ee0 Core: Move Peripheral Interface handling in to handler file 2022-01-05 08:14:03 +10:30
zilmar eafcb96c01 Project64-core: Move handling of RDRam Interface Register handling to its own file 2022-01-04 16:11:52 +10:30
zilmar 09f90d9b53 Project64-core: Make Setting_EnableDisk be a setting in GameSettings 2022-01-04 10:07:52 +10:30
zilmar ee864797ab vgturtle127's Beautification 14 - Source\Project64-video directory and final cleanup 2021-05-18 21:21:36 +09:30
zilmar c512a592a7 Move class out of file names 2021-04-14 15:04:15 +09:30
zilmar cf58754414 Change NULL to nullptr 2021-04-12 21:05:39 +09:30
zilmar 5c60ea213f Update copyright date 2021-03-02 12:43:17 +10:30
LuigiBlood b428c14a27 [Disk] Put Mecha Interrupt management in DiskCommand(), delay seek times 2020-06-05 14:36:49 +02:00
KrimtonZ 33d4fed24c fix physical address offset calculations 2019-12-27 09:41:21 -06:00
KrimtonZ dd076add39 fix miscalculated offset, implement shygoo's recommendation for open bus read 2019-12-18 19:51:47 -06:00
KrimtonZ 58d66635df emulate n64 behavior when cartridge domain 2 address 2 addresses are accessed 2019-12-17 09:32:09 -06:00
KrimtonZ 4f23b39bb3 remove incorrect assumption that all of Cartridge Domain 2 Address 2 is for save data 2019-12-16 15:19:01 -06:00