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Core: Move Peripheral Interface handling in to handler file

This commit is contained in:
zilmar 2022-01-05 08:14:03 +10:30
parent eafcb96c01
commit 79b03c9ee0
9 changed files with 232 additions and 174 deletions
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48
Source/Project64-core/Logging.cpp
View File

@ -175,31 +175,6 @@ void CLogging::Log_LW(uint32_t PC, uint32_t VAddr)
case 0xA4500014: LogMessage("%08X: read from AI_BITRATE_REG (%08X)", PC, Value); return;
}
}
if (VAddr >= 0xA4600000 && VAddr <= 0xA4600030)
{
if (!LogPerInterface())
{
return;
}
g_MMU->LW_VAddr(VAddr, Value);
switch (VAddr)
{
case 0xA4600000: LogMessage("%08X: read from PI_DRAM_ADDR_REG (%08X)", PC, Value); return;
case 0xA4600004: LogMessage("%08X: read from PI_CART_ADDR_REG (%08X)", PC, Value); return;
case 0xA4600008: LogMessage("%08X: read from PI_RD_LEN_REG (%08X)", PC, Value); return;
case 0xA460000C: LogMessage("%08X: read from PI_WR_LEN_REG (%08X)", PC, Value); return;
case 0xA4600010: LogMessage("%08X: read from PI_STATUS_REG (%08X)", PC, Value); return;
case 0xA4600014: LogMessage("%08X: read from PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG (%08X)", PC, Value); return;
case 0xA4600018: LogMessage("%08X: read from PI_BSD_DOM1_PWD_REG (%08X)", PC, Value); return;
case 0xA460001C: LogMessage("%08X: read from PI_BSD_DOM1_PGS_REG (%08X)", PC, Value); return;
case 0xA4600020: LogMessage("%08X: read from PI_BSD_DOM1_RLS_REG (%08X)", PC, Value); return;
case 0xA4600024: LogMessage("%08X: read from PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG (%08X)", PC, Value); return;
case 0xA4600028: LogMessage("%08X: read from PI_BSD_DOM2_PWD_REG (%08X)", PC, Value); return;
case 0xA460002C: LogMessage("%08X: read from PI_BSD_DOM2_PGS_REG (%08X)", PC, Value); return;
case 0xA4600030: LogMessage("%08X: read from PI_BSD_DOM2_RLS_REG (%08X)", PC, Value); return;
}
}
if (VAddr == 0xA4800000)
{
if (!LogSerialInterface())
@ -451,29 +426,6 @@ void CLogging::Log_SW(uint32_t PC, uint32_t VAddr, uint32_t Value)
}
}
if (VAddr >= 0xA4600000 && VAddr <= 0xA4600030)
{
if (!LogPerInterface())
{
return;
}
switch (VAddr)
{
case 0xA4600000: LogMessage("%08X: Writing 0x%08X to PI_DRAM_ADDR_REG", PC, Value); return;
case 0xA4600004: LogMessage("%08X: Writing 0x%08X to PI_CART_ADDR_REG", PC, Value); return;
case 0xA4600008: LogMessage("%08X: Writing 0x%08X to PI_RD_LEN_REG", PC, Value); return;
case 0xA460000C: LogMessage("%08X: Writing 0x%08X to PI_WR_LEN_REG", PC, Value); return;
case 0xA4600010: LogMessage("%08X: Writing 0x%08X to PI_STATUS_REG", PC, Value); return;
case 0xA4600014: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG", PC, Value); return;
case 0xA4600018: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_PWD_REG", PC, Value); return;
case 0xA460001C: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_PGS_REG", PC, Value); return;
case 0xA4600020: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM1_RLS_REG", PC, Value); return;
case 0xA4600024: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG", PC, Value); return;
case 0xA4600028: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_PWD_REG", PC, Value); return;
case 0xA460002C: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_PGS_REG", PC, Value); return;
case 0xA4600030: LogMessage("%08X: Writing 0x%08X to PI_BSD_DOM2_RLS_REG", PC, Value); return;
}
}
if (VAddr == 0xA4800000)
{
if (!LogSerialInterface())

158
Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.cpp Normal file
View File

@ -0,0 +1,158 @@
#include "stdafx.h"
#include <Project64-core\N64System\SystemGlobals.h>
#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
#include <Project64-core\N64System\Mips\Register.h>
#include <Project64-core\N64System\Mips\Disk.h>
#include "PeripheralInterfaceHandler.h"
PeripheralInterfaceReg::PeripheralInterfaceReg(uint32_t * PeripheralInterface) :
PI_DRAM_ADDR_REG(PeripheralInterface[0]),
PI_CART_ADDR_REG(PeripheralInterface[1]),
PI_RD_LEN_REG(PeripheralInterface[2]),
PI_WR_LEN_REG(PeripheralInterface[3]),
PI_STATUS_REG(PeripheralInterface[4]),
PI_BSD_DOM1_LAT_REG(PeripheralInterface[5]),
PI_DOMAIN1_REG(PeripheralInterface[5]),
PI_BSD_DOM1_PWD_REG(PeripheralInterface[6]),
PI_BSD_DOM1_PGS_REG(PeripheralInterface[7]),
PI_BSD_DOM1_RLS_REG(PeripheralInterface[8]),
PI_BSD_DOM2_LAT_REG(PeripheralInterface[9]),
PI_DOMAIN2_REG(PeripheralInterface[9]),
PI_BSD_DOM2_PWD_REG(PeripheralInterface[10]),
PI_BSD_DOM2_PGS_REG(PeripheralInterface[11]),
PI_BSD_DOM2_RLS_REG(PeripheralInterface[12])
{
}
PeripheralInterfaceHandler::PeripheralInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg) :
PeripheralInterfaceReg(Reg.m_Peripheral_Interface),
m_MMU(MMU),
m_Reg(Reg),
m_PC(Reg.m_PROGRAM_COUNTER)
{
}
bool PeripheralInterfaceHandler::Read32(uint32_t Address, uint32_t & Value)
{
switch (Address & 0x1FFFFFFF)
{
case 0x04600000: Value = PI_DRAM_ADDR_REG; break;
case 0x04600004: Value = PI_CART_ADDR_REG; break;
case 0x04600008: Value = PI_RD_LEN_REG; break;
case 0x0460000C: Value = PI_WR_LEN_REG; break;
case 0x04600010: Value = PI_STATUS_REG; break;
case 0x04600014: Value = PI_DOMAIN1_REG; break;
case 0x04600018: Value = PI_BSD_DOM1_PWD_REG; break;
case 0x0460001C: Value = PI_BSD_DOM1_PGS_REG; break;
case 0x04600020: Value = PI_BSD_DOM1_RLS_REG; break;
case 0x04600024: Value = PI_DOMAIN2_REG; break;
case 0x04600028: Value = PI_BSD_DOM2_PWD_REG; break;
case 0x0460002C: Value = PI_BSD_DOM2_PGS_REG; break;
case 0x04600030: Value = PI_BSD_DOM2_RLS_REG; break;
default:
Value = 0;
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
if (GenerateLog() && LogPerInterface())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04600000: LogMessage("%08X: read from PI_DRAM_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04600004: LogMessage("%08X: read from PI_CART_ADDR_REG (%08X)", m_PC, Value); break;
case 0x04600008: LogMessage("%08X: read from PI_RD_LEN_REG (%08X)", m_PC, Value); break;
case 0x0460000C: LogMessage("%08X: read from PI_WR_LEN_REG (%08X)", m_PC, Value); break;
case 0x04600010: LogMessage("%08X: read from PI_STATUS_REG (%08X)", m_PC, Value); break;
case 0x04600014: LogMessage("%08X: read from PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG (%08X)", m_PC, Value); break;
case 0x04600018: LogMessage("%08X: read from PI_BSD_DOM1_PWD_REG (%08X)", m_PC, Value); break;
case 0x0460001C: LogMessage("%08X: read from PI_BSD_DOM1_PGS_REG (%08X)", m_PC, Value); break;
case 0x04600020: LogMessage("%08X: read from PI_BSD_DOM1_RLS_REG (%08X)", m_PC, Value); break;
case 0x04600024: LogMessage("%08X: read from PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG (%08X)", m_PC, Value); break;
case 0x04600028: LogMessage("%08X: read from PI_BSD_DOM2_PWD_REG (%08X)", m_PC, Value); break;
case 0x0460002C: LogMessage("%08X: read from PI_BSD_DOM2_PGS_REG (%08X)", m_PC, Value); break;
case 0x04600030: LogMessage("%08X: read from PI_BSD_DOM2_RLS_REG (%08X)", m_PC, Value); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
return true;
}
bool PeripheralInterfaceHandler::Write32(uint32_t Address, uint32_t Value, uint32_t Mask)
{
if (GenerateLog() && LogPerInterface())
{
switch (Address & 0x1FFFFFFF)
{
case 0x04600000: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_DRAM_ADDR_REG", m_PC, Value, Mask); break;
case 0x04600004: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_CART_ADDR_REG", m_PC, Value, Mask); break;
case 0x04600008: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_RD_LEN_REG", m_PC, Value, Mask); break;
case 0x0460000C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_WR_LEN_REG", m_PC, Value, Mask); break;
case 0x04600010: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_STATUS_REG", m_PC, Value, Mask); break;
case 0x04600014: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_LAT_REG/PI_DOMAIN1_REG", m_PC, Value, Mask); break;
case 0x04600018: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_PWD_REG", m_PC, Value, Mask); break;
case 0x0460001C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_PGS_REG", m_PC, Value, Mask); break;
case 0x04600020: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM1_RLS_REG", m_PC, Value, Mask); break;
case 0x04600024: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_LAT_REG/PI_DOMAIN2_REG", m_PC, Value, Mask); break;
case 0x04600028: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_PWD_REG", m_PC, Value, Mask); break;
case 0x0460002C: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_PGS_REG", m_PC, Value, Mask); break;
case 0x04600030: LogMessage("%08X: Writing 0x%08X (Mask: 0x%08X) to PI_BSD_DOM2_RLS_REG", m_PC, Value, Mask); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
switch (Address & 0x1FFFFFFF)
{
case 0x04600000: PI_DRAM_ADDR_REG = (PI_DRAM_ADDR_REG & ~Mask) | (Value & Mask); break;
case 0x04600004:
PI_CART_ADDR_REG = (PI_CART_ADDR_REG & ~Mask) | (Value & Mask);
if (EnableDisk())
{
DiskDMACheck();
}
break;
case 0x04600008:
PI_RD_LEN_REG = (PI_RD_LEN_REG & ~Mask) | (Value & Mask);
m_MMU.PI_DMA_READ();
break;
case 0x0460000C:
PI_WR_LEN_REG = (PI_WR_LEN_REG & ~Mask) | (Value & Mask);
m_MMU.PI_DMA_WRITE();
break;
case 0x04600010:
//if ((Value & PI_SET_RESET) != 0 )
//{
// g_Notify->DisplayError("reset Controller");
//}
if ((Value & PI_CLR_INTR) != 0)
{
g_Reg->MI_INTR_REG &= ~MI_INTR_PI;
g_Reg->CheckInterrupts();
}
break;
case 0x04600014: PI_DOMAIN1_REG = ((PI_DOMAIN1_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x04600018: PI_BSD_DOM1_PWD_REG = ((PI_BSD_DOM1_PWD_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x0460001C: PI_BSD_DOM1_PGS_REG = ((PI_BSD_DOM1_PGS_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x04600020: PI_BSD_DOM1_RLS_REG = ((PI_BSD_DOM1_RLS_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x04600024: PI_DOMAIN2_REG = ((PI_DOMAIN2_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x04600028: PI_BSD_DOM2_PWD_REG = ((PI_BSD_DOM2_PWD_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x0460002C: PI_BSD_DOM2_PGS_REG = ((PI_BSD_DOM2_PGS_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
case 0x04600030: PI_BSD_DOM2_RLS_REG = ((PI_BSD_DOM2_RLS_REG & ~Mask) | (Value & Mask)) & 0xFF; break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
return true;
}

59
Source/Project64-core/N64System/MemoryHandler/PeripheralInterfaceHandler.h Normal file
View File

@ -0,0 +1,59 @@
#pragma once
#include <Project64-core\Settings\GameSettings.h>
#include <Project64-core\Settings\DebugSettings.h>
#include <Project64-core\Logging.h>
#include "MemoryHandler.h"
#include <stdint.h>
class PeripheralInterfaceReg
{
protected:
PeripheralInterfaceReg(uint32_t * PeripheralInterface);
public:
uint32_t & PI_DRAM_ADDR_REG;
uint32_t & PI_CART_ADDR_REG;
uint32_t & PI_RD_LEN_REG;
uint32_t & PI_WR_LEN_REG;
uint32_t & PI_STATUS_REG;
uint32_t & PI_BSD_DOM1_LAT_REG;
uint32_t & PI_DOMAIN1_REG;
uint32_t & PI_BSD_DOM1_PWD_REG;
uint32_t & PI_BSD_DOM1_PGS_REG;
uint32_t & PI_BSD_DOM1_RLS_REG;
uint32_t & PI_BSD_DOM2_LAT_REG;
uint32_t & PI_DOMAIN2_REG;
uint32_t & PI_BSD_DOM2_PWD_REG;
uint32_t & PI_BSD_DOM2_PGS_REG;
uint32_t & PI_BSD_DOM2_RLS_REG;
private:
PeripheralInterfaceReg();
PeripheralInterfaceReg(const PeripheralInterfaceReg&);
PeripheralInterfaceReg& operator=(const PeripheralInterfaceReg&);
};
class CRegisters;
class CMipsMemoryVM;
class PeripheralInterfaceHandler :
public MemoryHandler,
private CGameSettings,
private CDebugSettings,
private CLogging,
private PeripheralInterfaceReg
{
public:
PeripheralInterfaceHandler(CMipsMemoryVM & MMU, CRegisters & Reg);
bool Read32(uint32_t Address, uint32_t & Value);
bool Write32(uint32_t Address, uint32_t Value, uint32_t Mask);
private:
PeripheralInterfaceHandler();
PeripheralInterfaceHandler(const PeripheralInterfaceHandler &);
PeripheralInterfaceHandler & operator=(const PeripheralInterfaceHandler &);
CMipsMemoryVM & m_MMU;
CRegisters & m_Reg;
uint32_t & m_PC;
};

78
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -28,6 +28,7 @@ CMipsMemoryVM::CMipsMemoryVM(CRegisters & Reg, bool SavesReadOnly) :
CDMA(*this, *this),
m_Reg(Reg),
m_RomMapped(false),
m_PeripheralInterfaceHandler(*this, Reg),
m_RDRAMInterfaceHandler(Reg),
m_Rom(nullptr),
m_RomSize(0),
@ -698,7 +699,7 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
case 0x04300000: Load32MIPSInterface(); break;
case 0x04400000: Load32VideoInterface(); break;
case 0x04500000: Load32AudioInterface(); break;
case 0x04600000: Load32PeripheralInterface(); break;
case 0x04600000: m_PeripheralInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
case 0x04700000: m_RDRAMInterfaceHandler.Read32(PAddr, m_MemLookupValue.UW[0]); break;
case 0x04800000: Load32SerialInterface(); break;
case 0x05000000: Load32CartridgeDomain2Address1(); break;
@ -862,7 +863,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
case 0x04300000: Write32MIPSInterface(); break;
case 0x04400000: Write32VideoInterface(); break;
case 0x04500000: Write32AudioInterface(); break;
case 0x04600000: Write32PeripheralInterface(); break;
case 0x04600000: m_PeripheralInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
case 0x04700000: m_RDRAMInterfaceHandler.Write32(PAddr, Value, 0xFFFFFFFF); break;
case 0x04800000: Write32SerialInterface(); break;
case 0x05000000: Write32CartridgeDomain2Address1(); break;
@ -1371,32 +1372,6 @@ void CMipsMemoryVM::Load32AudioInterface(void)
}
}
void CMipsMemoryVM::Load32PeripheralInterface(void)
{
switch (m_MemLookupAddress & 0x1FFFFFFF)
{
case 0x04600000: m_MemLookupValue.UW[0] = g_Reg->PI_DRAM_ADDR_REG; break;
case 0x04600004: m_MemLookupValue.UW[0] = g_Reg->PI_CART_ADDR_REG; break;
case 0x04600008: m_MemLookupValue.UW[0] = g_Reg->PI_RD_LEN_REG; break;
case 0x0460000C: m_MemLookupValue.UW[0] = g_Reg->PI_WR_LEN_REG; break;
case 0x04600010: m_MemLookupValue.UW[0] = g_Reg->PI_STATUS_REG; break;
case 0x04600014: m_MemLookupValue.UW[0] = g_Reg->PI_DOMAIN1_REG; break;
case 0x04600018: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM1_PWD_REG; break;
case 0x0460001C: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM1_PGS_REG; break;
case 0x04600020: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM1_RLS_REG; break;
case 0x04600024: m_MemLookupValue.UW[0] = g_Reg->PI_DOMAIN2_REG; break;
case 0x04600028: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM2_PWD_REG; break;
case 0x0460002C: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM2_PGS_REG; break;
case 0x04600030: m_MemLookupValue.UW[0] = g_Reg->PI_BSD_DOM2_RLS_REG; break;
default:
m_MemLookupValue.UW[0] = 0;
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CMipsMemoryVM::Load32SerialInterface(void)
{
switch (m_MemLookupAddress & 0x1FFFFFFF)
@ -2024,53 +1999,6 @@ void CMipsMemoryVM::Write32AudioInterface(void)
}
}
void CMipsMemoryVM::Write32PeripheralInterface(void)
{
switch (m_MemLookupAddress & 0xFFFFFFF)
{
case 0x04600000: g_Reg->PI_DRAM_ADDR_REG = m_MemLookupValue.UW[0]; break;
case 0x04600004:
g_Reg->PI_CART_ADDR_REG = m_MemLookupValue.UW[0];
if (EnableDisk())
{
DiskDMACheck();
}
break;
case 0x04600008:
g_Reg->PI_RD_LEN_REG = m_MemLookupValue.UW[0];
g_MMU->PI_DMA_READ();
break;
case 0x0460000C:
g_Reg->PI_WR_LEN_REG = m_MemLookupValue.UW[0];
g_MMU->PI_DMA_WRITE();
break;
case 0x04600010:
//if ((Value & PI_SET_RESET) != 0 )
//{
// g_Notify->DisplayError("reset Controller");
//}
if ((m_MemLookupValue.UW[0] & PI_CLR_INTR) != 0)
{
g_Reg->MI_INTR_REG &= ~MI_INTR_PI;
g_Reg->CheckInterrupts();
}
break;
case 0x04600014: g_Reg->PI_DOMAIN1_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x04600018: g_Reg->PI_BSD_DOM1_PWD_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x0460001C: g_Reg->PI_BSD_DOM1_PGS_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x04600020: g_Reg->PI_BSD_DOM1_RLS_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x04600024: g_Reg->PI_DOMAIN2_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x04600028: g_Reg->PI_BSD_DOM2_PWD_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x0460002C: g_Reg->PI_BSD_DOM2_PGS_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
case 0x04600030: g_Reg->PI_BSD_DOM2_RLS_REG = (m_MemLookupValue.UW[0] & 0xFF); break;
default:
if (HaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}
}
void CMipsMemoryVM::Write32SerialInterface(void)
{
switch (m_MemLookupAddress & 0xFFFFFFF)

6
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -7,6 +7,7 @@
#include <Project64-core\N64System\Mips\FlashRam.h>
#include <Project64-core\N64System\Mips\Sram.h>
#include <Project64-core\N64System\Mips\Dma.h>
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
#include <Project64-core\Settings\GameSettings.h>
@ -42,7 +43,7 @@ class CMipsMemoryVM :
private CPifRam,
private CFlashram,
private CSram,
private CDMA,
public CDMA,
private CGameSettings
{
public:
@ -138,7 +139,6 @@ private:
static void Load32MIPSInterface(void);
static void Load32VideoInterface(void);
static void Load32AudioInterface(void);
static void Load32PeripheralInterface(void);
static void Load32SerialInterface(void);
static void Load32CartridgeDomain1Address1(void);
static void Load32CartridgeDomain1Address3(void);
@ -153,7 +153,6 @@ private:
static void Write32MIPSInterface(void);
static void Write32VideoInterface(void);
static void Write32AudioInterface(void);
static void Write32PeripheralInterface(void);
static void Write32SerialInterface(void);
static void Write32CartridgeDomain2Address1(void);
static void Write32CartridgeDomain2Address2(void);
@ -185,6 +184,7 @@ private:
static uint8_t * m_Reserve1, *m_Reserve2;
CRegisters & m_Reg;
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
uint32_t m_AllocatedRdramSize;

19
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -137,25 +137,6 @@ AudioInterfaceReg::AudioInterfaceReg(uint32_t * _AudioInterface) :
{
}
PeripheralInterfaceReg::PeripheralInterfaceReg(uint32_t * PeripheralInterface) :
PI_DRAM_ADDR_REG(PeripheralInterface[0]),
PI_CART_ADDR_REG(PeripheralInterface[1]),
PI_RD_LEN_REG(PeripheralInterface[2]),
PI_WR_LEN_REG(PeripheralInterface[3]),
PI_STATUS_REG(PeripheralInterface[4]),
PI_BSD_DOM1_LAT_REG(PeripheralInterface[5]),
PI_DOMAIN1_REG(PeripheralInterface[5]),
PI_BSD_DOM1_PWD_REG(PeripheralInterface[6]),
PI_BSD_DOM1_PGS_REG(PeripheralInterface[7]),
PI_BSD_DOM1_RLS_REG(PeripheralInterface[8]),
PI_BSD_DOM2_LAT_REG(PeripheralInterface[9]),
PI_DOMAIN2_REG(PeripheralInterface[9]),
PI_BSD_DOM2_PWD_REG(PeripheralInterface[10]),
PI_BSD_DOM2_PGS_REG(PeripheralInterface[11]),
PI_BSD_DOM2_RLS_REG(PeripheralInterface[12])
{
}
DisplayControlReg::DisplayControlReg(uint32_t * _DisplayProcessor) :
DPC_START_REG(_DisplayProcessor[0]),
DPC_END_REG(_DisplayProcessor[1]),

30
Source/Project64-core/N64System/Mips/Register.h
View File

@ -2,6 +2,7 @@
#include <Common/Platform.h>
#include <Project64-core\N64System\N64Types.h>
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
#include <Project64-core\Settings\DebugSettings.h>
#include <Project64-core\Settings\GameSettings.h>
@ -312,35 +313,6 @@ enum
AI_STATUS_DMA_BUSY = 0x40000000, // Bit 30: Busy
};
// Audio interface registers
class PeripheralInterfaceReg
{
protected:
PeripheralInterfaceReg (uint32_t * PeripheralInterface);
public:
uint32_t & PI_DRAM_ADDR_REG;
uint32_t & PI_CART_ADDR_REG;
uint32_t & PI_RD_LEN_REG;
uint32_t & PI_WR_LEN_REG;
uint32_t & PI_STATUS_REG;
uint32_t & PI_BSD_DOM1_LAT_REG;
uint32_t & PI_DOMAIN1_REG;
uint32_t & PI_BSD_DOM1_PWD_REG;
uint32_t & PI_BSD_DOM1_PGS_REG;
uint32_t & PI_BSD_DOM1_RLS_REG;
uint32_t & PI_BSD_DOM2_LAT_REG;
uint32_t & PI_DOMAIN2_REG;
uint32_t & PI_BSD_DOM2_PWD_REG;
uint32_t & PI_BSD_DOM2_PGS_REG;
uint32_t & PI_BSD_DOM2_RLS_REG;
private:
PeripheralInterfaceReg();
PeripheralInterfaceReg(const PeripheralInterfaceReg&);
PeripheralInterfaceReg& operator=(const PeripheralInterfaceReg&);
};
// Signal processor interface
class SigProcessor_InterfaceReg

2
Source/Project64-core/Project64-core.vcxproj
View File

@ -53,6 +53,7 @@
<ClCompile Include="N64System\Interpreter\InterpreterCPU.cpp" />
<ClCompile Include="N64System\Interpreter\InterpreterOps.cpp" />
<ClCompile Include="N64System\Interpreter\InterpreterOps32.cpp" />
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp" />
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp" />
<ClCompile Include="N64System\Mips\Audio.cpp" />
<ClCompile Include="N64System\Mips\Disk.cpp" />
@ -150,6 +151,7 @@
<ClInclude Include="N64System\Interpreter\InterpreterOps32.h" />
<ClInclude Include="N64System\Interpreter\InterpreterOps.h" />
<ClInclude Include="N64System\MemoryHandler\MemoryHandler.h" />
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h" />
<ClInclude Include="N64System\MemoryHandler\RDRAMInterfaceHandler.h" />
<ClInclude Include="N64System\Mips\Audio.h" />
<ClInclude Include="N64System\Mips\Disk.h" />

6
Source/Project64-core/Project64-core.vcxproj.filters
View File

@ -360,6 +360,9 @@
<ClCompile Include="N64System\MemoryHandler\RDRAMInterfaceHandler.cpp">
<Filter>Source Files\N64 System\MemoryHandler</Filter>
</ClCompile>
<ClCompile Include="N64System\MemoryHandler\PeripheralInterfaceHandler.cpp">
<Filter>Source Files\N64 System\MemoryHandler</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="stdafx.h">
@ -683,6 +686,9 @@
<ClInclude Include="N64System\MemoryHandler\MemoryHandler.h">
<Filter>Header Files\N64 System\MemoryHandler</Filter>
</ClInclude>
<ClInclude Include="N64System\MemoryHandler\PeripheralInterfaceHandler.h">
<Filter>Header Files\N64 System\MemoryHandler</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<None Include="Version.h.in">