2015-05-24 04:55:12 +00:00
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// Copyright 2009 Dolphin Emulator Project
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2015-05-17 23:08:10 +00:00
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// Licensed under GPLv2+
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2013-04-18 03:09:55 +00:00
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// Refer to the license.txt file included.
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2009-07-06 02:10:26 +00:00
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#include <cmath>
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2014-05-25 01:55:13 +00:00
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#include "Common/StringUtil.h"
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2014-02-17 10:18:15 +00:00
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#include "Common/Thread.h"
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2014-09-09 04:24:49 +00:00
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#include "Core/ConfigManager.h"
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2014-05-03 19:10:19 +00:00
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#include "Core/Core.h"
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2015-09-07 15:05:47 +00:00
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#include "Core/FifoPlayer/FifoRecorder.h"
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2014-02-17 10:18:15 +00:00
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#include "Core/HW/Memmap.h"
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2014-09-17 01:04:37 +00:00
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#include "VideoCommon/BoundingBox.h"
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2014-02-17 10:18:15 +00:00
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#include "VideoCommon/BPFunctions.h"
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#include "VideoCommon/BPStructs.h"
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2014-07-08 14:49:33 +00:00
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#include "VideoCommon/Fifo.h"
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2014-12-14 20:23:13 +00:00
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#include "VideoCommon/GeometryShaderManager.h"
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2014-02-17 10:18:15 +00:00
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#include "VideoCommon/PerfQueryBase.h"
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#include "VideoCommon/PixelEngine.h"
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#include "VideoCommon/PixelShaderManager.h"
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#include "VideoCommon/RenderBase.h"
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#include "VideoCommon/Statistics.h"
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2015-08-31 14:41:16 +00:00
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#include "VideoCommon/TextureCacheBase.h"
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2014-02-17 10:18:15 +00:00
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#include "VideoCommon/TextureDecoder.h"
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#include "VideoCommon/VertexShaderManager.h"
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#include "VideoCommon/VideoCommon.h"
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#include "VideoCommon/VideoConfig.h"
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2009-07-06 02:10:26 +00:00
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using namespace BPFunctions;
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2013-10-29 05:23:17 +00:00
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static const float s_gammaLUT[] =
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2010-12-31 07:06:53 +00:00
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{
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1.0f,
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1.7f,
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2.2f,
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1.0f
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};
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2009-07-06 02:10:26 +00:00
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void BPInit()
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{
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2010-06-05 01:38:22 +00:00
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memset(&bpmem, 0, sizeof(bpmem));
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bpmem.bpMask = 0xFFFFFF;
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2009-07-06 02:10:26 +00:00
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}
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2014-05-03 20:36:29 +00:00
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static void BPWritten(const BPCmd& bp)
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2009-07-06 02:10:26 +00:00
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{
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2010-06-05 01:38:22 +00:00
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/*
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----------------------------------------------------------------------------------------------------------------
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Purpose: Writes to the BP registers
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Called: At the end of every: OpcodeDecoding.cpp ExecuteDisplayList > Decode() > LoadBPReg
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How It Works: First the pipeline is flushed then update the bpmem with the new value.
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Some of the BP cases have to call certain functions while others just update the bpmem.
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some bp cases check the changes variable, because they might not have to be updated all the time
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NOTE: it seems not all bp cases like checking changes, so calling if (bp.changes == 0 ? false : true)
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had to be ditched and the games seem to work fine with out it.
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2014-06-07 02:30:39 +00:00
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NOTE2: Yet Another GameCube Documentation calls them Bypass Raster State Registers but possibly completely wrong
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2010-06-05 01:38:22 +00:00
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NOTE3: This controls the register groups: RAS1/2, SU, TF, TEV, C/Z, PEC
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TODO: Turn into function table. The (future) DisplayList (DL) jit can then call the functions directly,
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getting rid of dynamic dispatch. Unfortunately, few games use DLs properly - most\
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just stuff geometry in them and don't put state changes there
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----------------------------------------------------------------------------------------------------------------
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*/
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2013-10-29 05:23:17 +00:00
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2012-12-21 20:04:53 +00:00
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// check for invalid state, else unneeded configuration are built
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2012-12-23 12:32:23 +00:00
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g_video_backend->CheckInvalidState();
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2009-07-06 02:10:26 +00:00
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2014-01-15 21:22:28 +00:00
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if (((s32*)&bpmem)[bp.address] == bp.newvalue)
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2012-05-18 21:13:53 +00:00
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{
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2014-03-10 11:30:55 +00:00
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if (!(bp.address == BPMEM_TRIGGER_EFB_COPY ||
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bp.address == BPMEM_CLEARBBOX1 ||
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bp.address == BPMEM_CLEARBBOX2 ||
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bp.address == BPMEM_SETDRAWDONE ||
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bp.address == BPMEM_PE_TOKEN_ID ||
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bp.address == BPMEM_PE_TOKEN_INT_ID ||
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bp.address == BPMEM_LOADTLUT0 ||
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bp.address == BPMEM_LOADTLUT1 ||
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bp.address == BPMEM_TEXINVALIDATE ||
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bp.address == BPMEM_PRELOAD_MODE ||
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bp.address == BPMEM_CLEAR_PIXEL_PERF))
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2012-05-18 21:13:53 +00:00
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{
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2014-01-15 21:22:28 +00:00
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return;
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2012-05-18 21:13:53 +00:00
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}
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}
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2010-08-05 03:24:13 +00:00
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2014-01-15 21:22:28 +00:00
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FlushPipeline();
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2010-06-05 01:38:22 +00:00
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((u32*)&bpmem)[bp.address] = bp.newvalue;
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2013-10-29 05:23:17 +00:00
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2009-07-06 02:10:26 +00:00
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switch (bp.address)
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{
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case BPMEM_GENMODE: // Set the Generation Mode
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2014-05-20 15:28:08 +00:00
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PRIM_LOG("genmode: texgen=%d, col=%d, multisampling=%d, tev=%d, cullmode=%d, ind=%d, zfeeze=%d",
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(u32)bpmem.genMode.numtexgens, (u32)bpmem.genMode.numcolchans,
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(u32)bpmem.genMode.multisampling, (u32)bpmem.genMode.numtevstages+1, (u32)bpmem.genMode.cullmode,
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(u32)bpmem.genMode.numindstages, (u32)bpmem.genMode.zfreeze);
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// Only call SetGenerationMode when cull mode changes.
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if (bp.changes & 0xC000)
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SetGenerationMode();
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_IND_MTXA: // Index Matrix Changed
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case BPMEM_IND_MTXB:
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case BPMEM_IND_MTXC:
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case BPMEM_IND_MTXA+3:
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case BPMEM_IND_MTXB+3:
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case BPMEM_IND_MTXC+3:
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case BPMEM_IND_MTXA+6:
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case BPMEM_IND_MTXB+6:
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case BPMEM_IND_MTXC+6:
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2014-03-10 11:30:55 +00:00
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if (bp.changes)
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2013-10-07 19:57:18 +00:00
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PixelShaderManager::SetIndMatrixChanged((bp.address - BPMEM_IND_MTXA) / 3);
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_RAS1_SS0: // Index Texture Coordinate Scale 0
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2014-03-10 11:30:55 +00:00
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if (bp.changes)
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2013-10-12 15:56:41 +00:00
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PixelShaderManager::SetIndTexScaleChanged(false);
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_RAS1_SS1: // Index Texture Coordinate Scale 1
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2014-03-10 11:30:55 +00:00
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if (bp.changes)
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2013-10-12 15:56:41 +00:00
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PixelShaderManager::SetIndTexScaleChanged(true);
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-26 09:52:35 +00:00
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// ----------------
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// Scissor Control
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// ----------------
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2009-07-06 02:10:26 +00:00
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case BPMEM_SCISSORTL: // Scissor Rectable Top, Left
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case BPMEM_SCISSORBR: // Scissor Rectable Bottom, Right
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case BPMEM_SCISSOROFFSET: // Scissor Offset
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2011-09-05 20:04:28 +00:00
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SetScissor();
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2013-10-24 12:06:48 +00:00
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VertexShaderManager::SetViewportChanged();
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2014-12-14 20:23:13 +00:00
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GeometryShaderManager::SetViewportChanged();
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_LINEPTWIDTH: // Line Width
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2014-12-14 20:44:33 +00:00
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GeometryShaderManager::SetLinePtWidthChanged();
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_ZMODE: // Depth Control
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2014-03-24 19:21:34 +00:00
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PRIM_LOG("zmode: test=%d, func=%d, upd=%d", (int)bpmem.zmode.testenable,
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(int)bpmem.zmode.func, (int)bpmem.zmode.updateenable);
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2012-01-01 20:46:02 +00:00
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SetDepthMode();
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_BLENDMODE: // Blending Control
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2014-05-20 15:28:08 +00:00
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if (bp.changes & 0xFFFF)
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2009-07-06 02:10:26 +00:00
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{
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2014-05-20 15:28:08 +00:00
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PRIM_LOG("blendmode: en=%d, open=%d, colupd=%d, alphaupd=%d, dst=%d, src=%d, sub=%d, mode=%d",
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(int)bpmem.blendmode.blendenable, (int)bpmem.blendmode.logicopenable, (int)bpmem.blendmode.colorupdate,
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(int)bpmem.blendmode.alphaupdate, (int)bpmem.blendmode.dstfactor, (int)bpmem.blendmode.srcfactor,
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(int)bpmem.blendmode.subtract, (int)bpmem.blendmode.logicmode);
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// Set LogicOp Blending Mode
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if (bp.changes & 0xF002) // logicopenable | logicmode
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SetLogicOpMode();
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// Set Dithering Mode
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if (bp.changes & 4) // dither
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SetDitherMode();
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// Set Blending Mode
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if (bp.changes & 0xFF1) // blendenable | alphaupdate | dstfactor | srcfactor | subtract
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2013-01-17 23:44:35 +00:00
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SetBlendMode();
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2014-05-20 15:28:08 +00:00
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// Set Color Mask
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if (bp.changes & 0x18) // colorupdate | alphaupdate
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SetColorMask();
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2009-07-06 02:10:26 +00:00
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}
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2014-05-20 15:23:47 +00:00
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return;
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2014-05-20 15:28:08 +00:00
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case BPMEM_CONSTANTALPHA: // Set Destination Alpha
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PRIM_LOG("constalpha: alp=%d, en=%d", bpmem.dstalpha.alpha, bpmem.dstalpha.enable);
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if (bp.changes & 0xFF)
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PixelShaderManager::SetDestAlpha();
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if (bp.changes & 0x100)
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SetBlendMode();
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2014-05-20 15:23:47 +00:00
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return;
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2014-05-20 15:28:08 +00:00
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2009-07-06 02:10:26 +00:00
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// This is called when the game is done drawing the new frame (eg: like in DX: Begin(); Draw(); End();)
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// Triggers an interrupt on the PPC side so that the game knows when the GPU has finished drawing.
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// Tokens are similar.
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2010-06-05 01:38:22 +00:00
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case BPMEM_SETDRAWDONE:
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2009-07-06 02:10:26 +00:00
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switch (bp.newvalue & 0xFF)
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2010-06-05 01:38:22 +00:00
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{
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case 0x02:
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Add the 'desynced GPU thread' mode.
It's a relatively big commit (less big with -w), but it's hard to test
any of this separately...
The basic problem is that in netplay or movies, the state of the CPU
must be deterministic, including when the game receives notification
that the GPU has processed FIFO data. Dual core mode notifies the game
whenever the GPU thread actually gets around to doing the work, so it
isn't deterministic. Single core mode is because it notifies the game
'instantly' (after processing the data synchronously), but it's too slow
for many systems and games.
My old dc-netplay branch worked as follows: everything worked as normal
except the state of the CP registers was a lie, and the CPU thread only
delivered results when idle detection triggered (waiting for the GPU if
they weren't ready at that point). Usually, a game is idle iff all the
work for the frame has been done, except for a small amount of work
depending on the GPU result, so neither the CPU or the GPU waiting on
the other affected performance much. However, it's possible that the
game could be waiting for some earlier interrupt, and any of several
games which, for whatever reason, never went into a detectable idle
(even when I tried to improve the detection) would never receive results
at all. (The current method should have better compatibility, but it
also has slightly higher overhead and breaks some other things, so I
want to reimplement this, hopefully with less impact on the code, in the
future.)
With this commit, the basic idea is that the CPU thread acts as if the
work has been done instantly, like single core mode, but actually hands
it off asynchronously to the GPU thread (after backing up some data that
the game might change in memory before it's actually done). Since the
work isn't done, any feedback from the GPU to the CPU, such as real
XFB/EFB copies (virtual are OK), EFB pokes, performance queries, etc. is
broken; but most games work with these options disabled, and there is no
need to try to detect what the CPU thread is doing.
Technically: when the flag g_use_deterministic_gpu_thread (currently
stuck on) is on, the CPU thread calls RunGpu like in single core mode.
This function synchronously copies the data from the FIFO to the
internal video buffer and updates the CP registers, interrupts, etc.
However, instead of the regular ReadDataFromFifo followed by running the
opcode decoder, it runs ReadDataFromFifoOnCPU ->
OpcodeDecoder_Preprocess, which relatively quickly scans through the
FIFO data, detects SetFinish calls etc., which are immediately fired,
and saves certain associated data from memory (e.g. display lists) in
AuxBuffers (a parallel stream to the main FIFO, which is a bit slow at
the moment), before handing the data off to the GPU thread to actually
render. That makes up the bulk of this commit.
In various circumstances, including the aforementioned EFB pokes and
performance queries as well as swap requests (i.e. the end of a frame -
we don't want the CPU potentially pumping out frames too quickly and the
GPU falling behind*), SyncGPU is called to wait for actual completion.
The overhead mainly comes from OpcodeDecoder_Preprocess (which is,
again, synchronous), as well as the actual copying.
Currently, display lists and such are escrowed from main memory even
though they usually won't change over the course of a frame, and
textures are not even though they might, resulting in a small chance of
graphical glitches. When the texture locking (i.e. fault on write) code
lands, I can make this all correct and maybe a little faster.
* This suggests an alternate determinism method of just delaying results
until a short time before the end of each frame. For all I know this
might mostly work - I haven't tried it - but if any significant work
hinges on the competion of render to texture etc., the frame will be
missed.
2014-08-28 02:56:19 +00:00
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if (!g_use_deterministic_gpu_thread)
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PixelEngine::SetFinish(); // may generate interrupt
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2010-06-05 01:38:22 +00:00
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DEBUG_LOG(VIDEO, "GXSetDrawDone SetPEFinish (value: 0x%02X)", (bp.newvalue & 0xFFFF));
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2014-05-20 15:23:47 +00:00
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return;
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2010-06-05 01:38:22 +00:00
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default:
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WARN_LOG(VIDEO, "GXSetDrawDone ??? (value 0x%02X)", (bp.newvalue & 0xFFFF));
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2014-05-20 15:23:47 +00:00
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return;
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2010-06-05 01:38:22 +00:00
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}
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2014-05-20 15:23:47 +00:00
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return;
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2009-07-06 02:10:26 +00:00
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case BPMEM_PE_TOKEN_ID: // Pixel Engine Token ID
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Add the 'desynced GPU thread' mode.
It's a relatively big commit (less big with -w), but it's hard to test
any of this separately...
The basic problem is that in netplay or movies, the state of the CPU
must be deterministic, including when the game receives notification
that the GPU has processed FIFO data. Dual core mode notifies the game
whenever the GPU thread actually gets around to doing the work, so it
isn't deterministic. Single core mode is because it notifies the game
'instantly' (after processing the data synchronously), but it's too slow
for many systems and games.
My old dc-netplay branch worked as follows: everything worked as normal
except the state of the CP registers was a lie, and the CPU thread only
delivered results when idle detection triggered (waiting for the GPU if
they weren't ready at that point). Usually, a game is idle iff all the
work for the frame has been done, except for a small amount of work
depending on the GPU result, so neither the CPU or the GPU waiting on
the other affected performance much. However, it's possible that the
game could be waiting for some earlier interrupt, and any of several
games which, for whatever reason, never went into a detectable idle
(even when I tried to improve the detection) would never receive results
at all. (The current method should have better compatibility, but it
also has slightly higher overhead and breaks some other things, so I
want to reimplement this, hopefully with less impact on the code, in the
future.)
With this commit, the basic idea is that the CPU thread acts as if the
work has been done instantly, like single core mode, but actually hands
it off asynchronously to the GPU thread (after backing up some data that
the game might change in memory before it's actually done). Since the
work isn't done, any feedback from the GPU to the CPU, such as real
XFB/EFB copies (virtual are OK), EFB pokes, performance queries, etc. is
broken; but most games work with these options disabled, and there is no
need to try to detect what the CPU thread is doing.
Technically: when the flag g_use_deterministic_gpu_thread (currently
stuck on) is on, the CPU thread calls RunGpu like in single core mode.
This function synchronously copies the data from the FIFO to the
internal video buffer and updates the CP registers, interrupts, etc.
However, instead of the regular ReadDataFromFifo followed by running the
opcode decoder, it runs ReadDataFromFifoOnCPU ->
OpcodeDecoder_Preprocess, which relatively quickly scans through the
FIFO data, detects SetFinish calls etc., which are immediately fired,
and saves certain associated data from memory (e.g. display lists) in
AuxBuffers (a parallel stream to the main FIFO, which is a bit slow at
the moment), before handing the data off to the GPU thread to actually
render. That makes up the bulk of this commit.
In various circumstances, including the aforementioned EFB pokes and
performance queries as well as swap requests (i.e. the end of a frame -
we don't want the CPU potentially pumping out frames too quickly and the
GPU falling behind*), SyncGPU is called to wait for actual completion.
The overhead mainly comes from OpcodeDecoder_Preprocess (which is,
again, synchronous), as well as the actual copying.
Currently, display lists and such are escrowed from main memory even
though they usually won't change over the course of a frame, and
textures are not even though they might, resulting in a small chance of
graphical glitches. When the texture locking (i.e. fault on write) code
lands, I can make this all correct and maybe a little faster.
* This suggests an alternate determinism method of just delaying results
until a short time before the end of each frame. For all I know this
might mostly work - I haven't tried it - but if any significant work
hinges on the competion of render to texture etc., the frame will be
missed.
2014-08-28 02:56:19 +00:00
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if (!g_use_deterministic_gpu_thread)
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PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), false);
|
2010-06-05 01:38:22 +00:00
|
|
|
DEBUG_LOG(VIDEO, "SetPEToken 0x%04x", (bp.newvalue & 0xFFFF));
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2010-06-05 01:38:22 +00:00
|
|
|
case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
|
Add the 'desynced GPU thread' mode.
It's a relatively big commit (less big with -w), but it's hard to test
any of this separately...
The basic problem is that in netplay or movies, the state of the CPU
must be deterministic, including when the game receives notification
that the GPU has processed FIFO data. Dual core mode notifies the game
whenever the GPU thread actually gets around to doing the work, so it
isn't deterministic. Single core mode is because it notifies the game
'instantly' (after processing the data synchronously), but it's too slow
for many systems and games.
My old dc-netplay branch worked as follows: everything worked as normal
except the state of the CP registers was a lie, and the CPU thread only
delivered results when idle detection triggered (waiting for the GPU if
they weren't ready at that point). Usually, a game is idle iff all the
work for the frame has been done, except for a small amount of work
depending on the GPU result, so neither the CPU or the GPU waiting on
the other affected performance much. However, it's possible that the
game could be waiting for some earlier interrupt, and any of several
games which, for whatever reason, never went into a detectable idle
(even when I tried to improve the detection) would never receive results
at all. (The current method should have better compatibility, but it
also has slightly higher overhead and breaks some other things, so I
want to reimplement this, hopefully with less impact on the code, in the
future.)
With this commit, the basic idea is that the CPU thread acts as if the
work has been done instantly, like single core mode, but actually hands
it off asynchronously to the GPU thread (after backing up some data that
the game might change in memory before it's actually done). Since the
work isn't done, any feedback from the GPU to the CPU, such as real
XFB/EFB copies (virtual are OK), EFB pokes, performance queries, etc. is
broken; but most games work with these options disabled, and there is no
need to try to detect what the CPU thread is doing.
Technically: when the flag g_use_deterministic_gpu_thread (currently
stuck on) is on, the CPU thread calls RunGpu like in single core mode.
This function synchronously copies the data from the FIFO to the
internal video buffer and updates the CP registers, interrupts, etc.
However, instead of the regular ReadDataFromFifo followed by running the
opcode decoder, it runs ReadDataFromFifoOnCPU ->
OpcodeDecoder_Preprocess, which relatively quickly scans through the
FIFO data, detects SetFinish calls etc., which are immediately fired,
and saves certain associated data from memory (e.g. display lists) in
AuxBuffers (a parallel stream to the main FIFO, which is a bit slow at
the moment), before handing the data off to the GPU thread to actually
render. That makes up the bulk of this commit.
In various circumstances, including the aforementioned EFB pokes and
performance queries as well as swap requests (i.e. the end of a frame -
we don't want the CPU potentially pumping out frames too quickly and the
GPU falling behind*), SyncGPU is called to wait for actual completion.
The overhead mainly comes from OpcodeDecoder_Preprocess (which is,
again, synchronous), as well as the actual copying.
Currently, display lists and such are escrowed from main memory even
though they usually won't change over the course of a frame, and
textures are not even though they might, resulting in a small chance of
graphical glitches. When the texture locking (i.e. fault on write) code
lands, I can make this all correct and maybe a little faster.
* This suggests an alternate determinism method of just delaying results
until a short time before the end of each frame. For all I know this
might mostly work - I haven't tried it - but if any significant work
hinges on the competion of render to texture etc., the frame will be
missed.
2014-08-28 02:56:19 +00:00
|
|
|
if (!g_use_deterministic_gpu_thread)
|
|
|
|
PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), true);
|
2010-06-05 01:38:22 +00:00
|
|
|
DEBUG_LOG(VIDEO, "SetPEToken + INT 0x%04x", (bp.newvalue & 0xFFFF));
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
|
|
|
|
2009-07-06 02:10:26 +00:00
|
|
|
// ------------------------
|
|
|
|
// EFB copy command. This copies a rectangle from the EFB to either RAM in a texture format or to XFB as YUYV.
|
|
|
|
// It can also optionally clear the EFB while copying from it. To emulate this, we of course copy first and clear afterwards.
|
2010-06-05 01:38:22 +00:00
|
|
|
case BPMEM_TRIGGER_EFB_COPY: // Copy EFB Region or Render to the XFB or Clear the screen.
|
2009-07-06 02:10:26 +00:00
|
|
|
{
|
|
|
|
// The bottom right is within the rectangle
|
|
|
|
// The values in bpmem.copyTexSrcXY and bpmem.copyTexSrcWH are updated in case 0x49 and 0x4a in this function
|
2009-07-15 00:51:24 +00:00
|
|
|
|
2014-05-03 21:16:18 +00:00
|
|
|
u32 destAddr = bpmem.copyTexDest << 5;
|
2015-08-31 14:41:16 +00:00
|
|
|
u32 destStride = bpmem.copyMipMapStrideChannels << 5;
|
2014-05-03 21:16:18 +00:00
|
|
|
|
|
|
|
EFBRectangle srcRect;
|
|
|
|
srcRect.left = (int)bpmem.copyTexSrcXY.x;
|
|
|
|
srcRect.top = (int)bpmem.copyTexSrcXY.y;
|
2013-10-29 05:23:17 +00:00
|
|
|
|
2010-12-18 18:23:22 +00:00
|
|
|
// Here Width+1 like Height, otherwise some textures are corrupted already since the native resolution.
|
2014-01-03 07:15:19 +00:00
|
|
|
// TODO: What's the behavior of out of bound access?
|
2014-05-03 21:16:18 +00:00
|
|
|
srcRect.right = (int)(bpmem.copyTexSrcXY.x + bpmem.copyTexSrcWH.x + 1);
|
|
|
|
srcRect.bottom = (int)(bpmem.copyTexSrcXY.y + bpmem.copyTexSrcWH.y + 1);
|
2009-07-15 00:51:24 +00:00
|
|
|
|
2009-10-10 21:19:39 +00:00
|
|
|
UPE_Copy PE_copy = bpmem.triggerEFBCopy;
|
2009-07-06 02:10:26 +00:00
|
|
|
|
|
|
|
// Check if we are to copy from the EFB or draw to the XFB
|
|
|
|
if (PE_copy.copy_to_xfb == 0)
|
|
|
|
{
|
2015-08-31 14:41:16 +00:00
|
|
|
// bpmem.zcontrol.pixel_format to PEControl::Z24 is when the game wants to copy from ZBuffer (Zbuffer uses 24-bit Format)
|
2015-11-06 00:28:05 +00:00
|
|
|
TextureCacheBase::CopyRenderTargetToTexture(destAddr, PE_copy.tp_realFormat(), destStride,
|
|
|
|
bpmem.zcontrol.pixel_format, srcRect,
|
|
|
|
!!PE_copy.intensity_fmt, !!PE_copy.half_scale);
|
2009-07-06 02:10:26 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
// We should be able to get away with deactivating the current bbox tracking
|
|
|
|
// here. Not sure if there's a better spot to put this.
|
|
|
|
// the number of lines copied is determined by the y scale * source efb height
|
2013-10-29 05:23:17 +00:00
|
|
|
|
2014-09-14 16:52:51 +00:00
|
|
|
BoundingBox::active = false;
|
2009-07-18 20:38:35 +00:00
|
|
|
|
|
|
|
float yScale;
|
2009-07-19 08:24:30 +00:00
|
|
|
if (PE_copy.scale_invert)
|
2009-07-18 20:38:35 +00:00
|
|
|
yScale = 256.0f / (float)bpmem.dispcopyyscale;
|
|
|
|
else
|
|
|
|
yScale = (float)bpmem.dispcopyyscale / 256.0f;
|
|
|
|
|
2015-09-04 13:32:30 +00:00
|
|
|
float num_xfb_lines = 1.0f + bpmem.copyTexSrcWH.y * yScale;
|
2014-08-20 03:16:50 +00:00
|
|
|
|
|
|
|
u32 height = static_cast<u32>(num_xfb_lines);
|
|
|
|
if (height > MAX_XFB_HEIGHT)
|
2009-07-18 20:38:35 +00:00
|
|
|
{
|
2014-08-20 03:16:50 +00:00
|
|
|
INFO_LOG(VIDEO, "Tried to scale EFB to too many XFB lines: %d (%f)",
|
|
|
|
height, num_xfb_lines);
|
|
|
|
height = MAX_XFB_HEIGHT;
|
2009-07-18 20:38:35 +00:00
|
|
|
}
|
|
|
|
|
2015-07-27 02:22:40 +00:00
|
|
|
DEBUG_LOG(VIDEO, "RenderToXFB: destAddr: %08x | srcRect {%d %d %d %d} | fbWidth: %u | fbStride: %u | fbHeight: %u",
|
2015-08-31 14:41:16 +00:00
|
|
|
destAddr, srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, bpmem.copyTexSrcWH.x + 1, destStride, height);
|
|
|
|
Renderer::RenderToXFB(destAddr, srcRect, destStride, height, s_gammaLUT[PE_copy.gamma]);
|
2009-07-06 02:10:26 +00:00
|
|
|
}
|
|
|
|
|
2009-09-13 21:18:04 +00:00
|
|
|
// Clear the rectangular region after copying it.
|
2009-07-06 02:10:26 +00:00
|
|
|
if (PE_copy.clear)
|
2009-09-13 21:18:04 +00:00
|
|
|
{
|
2014-05-03 21:16:18 +00:00
|
|
|
ClearScreen(srcRect);
|
2009-09-13 21:18:04 +00:00
|
|
|
}
|
2009-07-06 02:10:26 +00:00
|
|
|
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
}
|
2009-12-28 19:13:06 +00:00
|
|
|
case BPMEM_LOADTLUT0: // This one updates bpmem.tlutXferSrc, no need to do anything here.
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-12-28 19:13:06 +00:00
|
|
|
case BPMEM_LOADTLUT1: // Load a Texture Look Up Table
|
2010-06-05 01:38:22 +00:00
|
|
|
{
|
|
|
|
u32 tlutTMemAddr = (bp.newvalue & 0x3FF) << 9;
|
|
|
|
u32 tlutXferCount = (bp.newvalue & 0x1FFC00) >> 5;
|
2014-10-28 13:20:49 +00:00
|
|
|
u32 addr = bpmem.tmem_config.tlut_src << 5;
|
2009-07-06 02:10:26 +00:00
|
|
|
|
2014-10-28 13:20:49 +00:00
|
|
|
// The GameCube ignores the upper bits of this address. Some games (WW, MKDD) set them.
|
2015-06-12 11:56:53 +00:00
|
|
|
if (!SConfig::GetInstance().bWii)
|
2014-10-28 13:20:49 +00:00
|
|
|
addr = addr & 0x01FFFFFF;
|
2009-07-06 02:10:26 +00:00
|
|
|
|
2014-10-28 13:20:49 +00:00
|
|
|
Memory::CopyFromEmu(texMem + tlutTMemAddr, addr, tlutXferCount);
|
2009-07-06 02:10:26 +00:00
|
|
|
|
2015-09-07 15:05:47 +00:00
|
|
|
if (g_bRecordFifoData)
|
|
|
|
FifoRecorder::GetInstance().UseMemory(addr, tlutXferCount, MemoryUpdate::TMEM);
|
|
|
|
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2010-06-05 01:38:22 +00:00
|
|
|
}
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_FOGRANGE: // Fog Settings Control
|
2010-05-24 14:53:27 +00:00
|
|
|
case BPMEM_FOGRANGE+1:
|
|
|
|
case BPMEM_FOGRANGE+2:
|
|
|
|
case BPMEM_FOGRANGE+3:
|
|
|
|
case BPMEM_FOGRANGE+4:
|
|
|
|
case BPMEM_FOGRANGE+5:
|
2014-05-03 19:08:11 +00:00
|
|
|
if (bp.changes)
|
2011-01-29 04:31:56 +00:00
|
|
|
PixelShaderManager::SetFogRangeAdjustChanged();
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_FOGPARAM0:
|
|
|
|
case BPMEM_FOGBMAGNITUDE:
|
|
|
|
case BPMEM_FOGBEXPONENT:
|
|
|
|
case BPMEM_FOGPARAM3:
|
2014-05-03 19:08:11 +00:00
|
|
|
if (bp.changes)
|
2009-07-06 02:10:26 +00:00
|
|
|
PixelShaderManager::SetFogParamChanged();
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_FOGCOLOR: // Fog Color
|
2014-05-03 19:08:11 +00:00
|
|
|
if (bp.changes)
|
2009-12-09 13:51:28 +00:00
|
|
|
PixelShaderManager::SetFogColorChanged();
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_ALPHACOMPARE: // Compare Alpha Values
|
2014-03-24 19:21:34 +00:00
|
|
|
PRIM_LOG("alphacmp: ref0=%d, ref1=%d, comp0=%d, comp1=%d, logic=%d",
|
|
|
|
(int)bpmem.alpha_test.ref0, (int)bpmem.alpha_test.ref1,
|
|
|
|
(int)bpmem.alpha_test.comp0, (int)bpmem.alpha_test.comp1,
|
|
|
|
(int)bpmem.alpha_test.logic);
|
2014-03-10 11:30:55 +00:00
|
|
|
if (bp.changes & 0xFFFF)
|
2013-10-12 15:56:41 +00:00
|
|
|
PixelShaderManager::SetAlpha();
|
2014-03-10 11:30:55 +00:00
|
|
|
if (bp.changes)
|
2013-10-07 19:57:18 +00:00
|
|
|
g_renderer->SetColorMask();
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_BIAS: // BIAS
|
|
|
|
PRIM_LOG("ztex bias=0x%x", bpmem.ztex1.bias);
|
2014-03-10 11:30:55 +00:00
|
|
|
if (bp.changes)
|
2013-10-12 15:56:41 +00:00
|
|
|
PixelShaderManager::SetZTextureBias();
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_ZTEX2: // Z Texture type
|
|
|
|
{
|
2010-06-05 01:38:22 +00:00
|
|
|
if (bp.changes & 3)
|
2009-07-06 02:10:26 +00:00
|
|
|
PixelShaderManager::SetZTextureTypeChanged();
|
2013-10-29 05:23:17 +00:00
|
|
|
#if defined(_DEBUG) || defined(DEBUGFAST)
|
2009-07-06 02:10:26 +00:00
|
|
|
const char* pzop[] = {"DISABLE", "ADD", "REPLACE", "?"};
|
|
|
|
const char* pztype[] = {"Z8", "Z16", "Z24", "?"};
|
|
|
|
PRIM_LOG("ztex op=%s, type=%s", pzop[bpmem.ztex2.op], pztype[bpmem.ztex2.type]);
|
|
|
|
#endif
|
|
|
|
}
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
// ----------------------------------
|
2009-07-26 09:52:35 +00:00
|
|
|
// Display Copy Filtering Control - GX_SetCopyFilter(u8 aa,u8 sample_pattern[12][2],u8 vf,u8 vfilter[7])
|
2009-07-06 02:10:26 +00:00
|
|
|
// Fields: Destination, Frame2Field, Gamma, Source
|
|
|
|
// ----------------------------------
|
2014-05-03 19:53:42 +00:00
|
|
|
case BPMEM_DISPLAYCOPYFILTER: // if (aa) { use sample_pattern } else { use 666666 }
|
|
|
|
case BPMEM_DISPLAYCOPYFILTER+1: // if (aa) { use sample_pattern } else { use 666666 }
|
|
|
|
case BPMEM_DISPLAYCOPYFILTER+2: // if (aa) { use sample_pattern } else { use 666666 }
|
|
|
|
case BPMEM_DISPLAYCOPYFILTER+3: // if (aa) { use sample_pattern } else { use 666666 }
|
2014-05-20 15:23:47 +00:00
|
|
|
case BPMEM_COPYFILTER0: // if (vf) { use vfilter } else { use 595000 }
|
|
|
|
case BPMEM_COPYFILTER1: // if (vf) { use vfilter } else { use 000015 }
|
|
|
|
return;
|
2009-07-26 09:52:35 +00:00
|
|
|
// -----------------------------------
|
|
|
|
// Interlacing Control
|
|
|
|
// -----------------------------------
|
|
|
|
case BPMEM_FIELDMASK: // GX_SetFieldMask(u8 even_mask,u8 odd_mask)
|
|
|
|
case BPMEM_FIELDMODE: // GX_SetFieldMode(u8 field_mode,u8 half_aspect_ratio)
|
2014-05-20 15:23:47 +00:00
|
|
|
// TODO
|
|
|
|
return;
|
2009-07-26 09:52:35 +00:00
|
|
|
// ----------------------------------------
|
|
|
|
// Unimportant regs (Clock, Perf, ...)
|
|
|
|
// ----------------------------------------
|
|
|
|
case BPMEM_BUSCLOCK0: // TB Bus Clock ?
|
|
|
|
case BPMEM_BUSCLOCK1: // TB Bus Clock ?
|
|
|
|
case BPMEM_PERF0_TRI: // Perf: Triangles
|
|
|
|
case BPMEM_PERF0_QUAD: // Perf: Quads
|
|
|
|
case BPMEM_PERF1: // Perf: Some Clock, Texels, TX, TC
|
2009-07-06 02:10:26 +00:00
|
|
|
break;
|
|
|
|
// ----------------
|
|
|
|
// EFB Copy config
|
|
|
|
// ----------------
|
|
|
|
case BPMEM_EFB_TL: // EFB Source Rect. Top, Left
|
|
|
|
case BPMEM_EFB_BR: // EFB Source Rect. Bottom, Right (w, h - 1)
|
|
|
|
case BPMEM_EFB_ADDR: // EFB Target Address
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
// --------------
|
|
|
|
// Clear Config
|
|
|
|
// --------------
|
|
|
|
case BPMEM_CLEAR_AR: // Alpha and Red Components
|
|
|
|
case BPMEM_CLEAR_GB: // Green and Blue Components
|
|
|
|
case BPMEM_CLEAR_Z: // Z Components (24-bit Zbuffer)
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
// -------------------------
|
2009-07-26 09:52:35 +00:00
|
|
|
// Bounding Box Control
|
2009-07-06 02:10:26 +00:00
|
|
|
// -------------------------
|
|
|
|
case BPMEM_CLEARBBOX1:
|
2010-07-06 13:14:51 +00:00
|
|
|
case BPMEM_CLEARBBOX2:
|
Rewrote bounding box algotithm. Fixes issues 5967, 6154, 6196, 6211.
Instead of being vertex-based, it is now primitive (point, line or dissected triangle) based, with proper clipping.
Also, screen position is now calculated based on viewport values, instead of "guesstimating".
This fixes many graphical glitches in Paper Mario: TTYD and Super Paper Mario.
Also, the new code allows Mickey's Magical Mirror and Disney's Hide & Sneak to work (mostly) bug-free. I changed their inis to use bbox.
These changes have a slight cost in performance when bbox is being used (rare), mostly due to the new clipping algorithm.
Please check for any regressions or crashes.
2014-01-25 15:36:23 +00:00
|
|
|
// Don't compute bounding box if this frame is being skipped!
|
|
|
|
// Wrong but valid values are better than bogus values...
|
2014-09-14 16:52:51 +00:00
|
|
|
if (!g_bSkipCurrentFrame)
|
2010-07-06 13:14:51 +00:00
|
|
|
{
|
Rewrote bounding box algotithm. Fixes issues 5967, 6154, 6196, 6211.
Instead of being vertex-based, it is now primitive (point, line or dissected triangle) based, with proper clipping.
Also, screen position is now calculated based on viewport values, instead of "guesstimating".
This fixes many graphical glitches in Paper Mario: TTYD and Super Paper Mario.
Also, the new code allows Mickey's Magical Mirror and Disney's Hide & Sneak to work (mostly) bug-free. I changed their inis to use bbox.
These changes have a slight cost in performance when bbox is being used (rare), mostly due to the new clipping algorithm.
Please check for any regressions or crashes.
2014-01-25 15:36:23 +00:00
|
|
|
u8 offset = bp.address & 2;
|
2014-09-14 16:52:51 +00:00
|
|
|
BoundingBox::active = true;
|
2014-11-13 22:26:49 +00:00
|
|
|
|
2015-04-06 00:17:57 +00:00
|
|
|
if (g_ActiveConfig.backend_info.bSupportsBBox && g_ActiveConfig.bBBoxEnable)
|
2014-11-22 14:17:57 +00:00
|
|
|
{
|
|
|
|
g_renderer->BBoxWrite(offset, bp.newvalue & 0x3ff);
|
|
|
|
g_renderer->BBoxWrite(offset + 1, bp.newvalue >> 10);
|
|
|
|
}
|
2009-07-06 02:10:26 +00:00
|
|
|
}
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2012-08-07 16:57:53 +00:00
|
|
|
case BPMEM_TEXINVALIDATE:
|
|
|
|
// TODO: Needs some restructuring in TextureCacheBase.
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2010-12-27 21:56:20 +00:00
|
|
|
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_ZCOMPARE: // Set the Z-Compare and EFB pixel format
|
2012-01-01 20:46:02 +00:00
|
|
|
OnPixelFormatChange();
|
2014-03-10 11:30:55 +00:00
|
|
|
if (bp.changes & 7)
|
2013-04-24 13:21:54 +00:00
|
|
|
{
|
2013-01-17 23:44:35 +00:00
|
|
|
SetBlendMode(); // dual source could be activated by changing to PIXELFMT_RGBA6_Z24
|
2013-03-16 23:36:13 +00:00
|
|
|
g_renderer->SetColorMask(); // alpha writing needs to be disabled if the new pixel format doesn't have an alpha channel
|
|
|
|
}
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2010-12-27 21:56:20 +00:00
|
|
|
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_MIPMAP_STRIDE: // MipMap Stride Channel
|
|
|
|
case BPMEM_COPYYSCALE: // Display Copy Y Scale
|
2014-05-20 15:28:08 +00:00
|
|
|
|
|
|
|
/* 24 RID
|
|
|
|
* 21 BC3 - Ind. Tex Stage 3 NTexCoord
|
|
|
|
* 18 BI3 - Ind. Tex Stage 3 NTexMap
|
|
|
|
* 15 BC2 - Ind. Tex Stage 2 NTexCoord
|
|
|
|
* 12 BI2 - Ind. Tex Stage 2 NTexMap
|
|
|
|
* 9 BC1 - Ind. Tex Stage 1 NTexCoord
|
|
|
|
* 6 BI1 - Ind. Tex Stage 1 NTexMap
|
|
|
|
* 3 BC0 - Ind. Tex Stage 0 NTexCoord
|
|
|
|
* 0 BI0 - Ind. Tex Stage 0 NTexMap */
|
|
|
|
case BPMEM_IREF:
|
|
|
|
|
|
|
|
case BPMEM_TEV_KSEL: // Texture Environment Swap Mode Table 0
|
|
|
|
case BPMEM_TEV_KSEL+1: // Texture Environment Swap Mode Table 1
|
|
|
|
case BPMEM_TEV_KSEL+2: // Texture Environment Swap Mode Table 2
|
|
|
|
case BPMEM_TEV_KSEL+3: // Texture Environment Swap Mode Table 3
|
|
|
|
case BPMEM_TEV_KSEL+4: // Texture Environment Swap Mode Table 4
|
|
|
|
case BPMEM_TEV_KSEL+5: // Texture Environment Swap Mode Table 5
|
|
|
|
case BPMEM_TEV_KSEL+6: // Texture Environment Swap Mode Table 6
|
|
|
|
case BPMEM_TEV_KSEL+7: // Texture Environment Swap Mode Table 7
|
2014-05-20 15:26:31 +00:00
|
|
|
|
|
|
|
/* This Register can be used to limit to which bits of BP registers is
|
|
|
|
* actually written to. The mask is only valid for the next BP write,
|
|
|
|
* and will reset itself afterwards. It's handled as a special case in
|
|
|
|
* LoadBPReg. */
|
|
|
|
case BPMEM_BP_MASK:
|
|
|
|
|
2009-07-06 02:10:26 +00:00
|
|
|
case BPMEM_IND_IMASK: // Index Mask ?
|
2009-07-26 09:52:35 +00:00
|
|
|
case BPMEM_REVBITS: // Always set to 0x0F when GX_InitRevBits() is called.
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2013-10-29 05:23:17 +00:00
|
|
|
|
2012-05-29 11:54:20 +00:00
|
|
|
case BPMEM_CLEAR_PIXEL_PERF:
|
|
|
|
// GXClearPixMetric writes 0xAAA here, Sunshine alternates this register between values 0x000 and 0xAAA
|
2014-03-10 11:30:55 +00:00
|
|
|
if (PerfQueryBase::ShouldEmulate())
|
2014-02-04 19:16:03 +00:00
|
|
|
g_perf_query->ResetQuery();
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-15 21:26:49 +00:00
|
|
|
|
2012-01-29 20:17:22 +00:00
|
|
|
case BPMEM_PRELOAD_ADDR:
|
|
|
|
case BPMEM_PRELOAD_TMEMEVEN:
|
|
|
|
case BPMEM_PRELOAD_TMEMODD: // Used when PRELOAD_MODE is set
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2009-07-06 02:10:26 +00:00
|
|
|
|
2012-01-29 20:17:22 +00:00
|
|
|
case BPMEM_PRELOAD_MODE: // Set to 0 when GX_TexModeSync() is called.
|
2012-08-07 16:57:53 +00:00
|
|
|
// if this is different from 0, manual TMEM management is used (GX_PreloadEntireTexture).
|
2012-01-29 20:17:22 +00:00
|
|
|
if (bp.newvalue != 0)
|
|
|
|
{
|
2013-01-10 14:12:21 +00:00
|
|
|
// TODO: Not quite sure if this is completely correct (likely not)
|
|
|
|
// NOTE: libogc's implementation of GX_PreloadEntireTexture seems flawed, so it's not necessarily a good reference for RE'ing this feature.
|
|
|
|
|
2012-01-29 20:17:22 +00:00
|
|
|
BPS_TmemConfig& tmem_cfg = bpmem.tmem_config;
|
2014-10-19 13:51:01 +00:00
|
|
|
u32 src_addr = tmem_cfg.preload_addr << 5; // TODO: Should we add mask here on GC?
|
2015-09-07 15:05:47 +00:00
|
|
|
u32 bytes_read = 0;
|
2013-01-10 14:12:21 +00:00
|
|
|
u32 tmem_addr_even = tmem_cfg.preload_tmem_even * TMEM_LINE_SIZE;
|
|
|
|
|
|
|
|
if (tmem_cfg.preload_tile_info.type != 3)
|
|
|
|
{
|
2015-09-07 15:05:47 +00:00
|
|
|
bytes_read = tmem_cfg.preload_tile_info.count * TMEM_LINE_SIZE;
|
|
|
|
if (tmem_addr_even + bytes_read > TMEM_SIZE)
|
|
|
|
bytes_read = TMEM_SIZE - tmem_addr_even;
|
2012-03-23 11:10:48 +00:00
|
|
|
|
2015-09-07 15:05:47 +00:00
|
|
|
Memory::CopyFromEmu(texMem + tmem_addr_even, src_addr, bytes_read);
|
2013-01-10 14:12:21 +00:00
|
|
|
}
|
|
|
|
else // RGBA8 tiles (and CI14, but that might just be stupid libogc!)
|
|
|
|
{
|
2014-10-23 05:15:29 +00:00
|
|
|
u8* src_ptr = Memory::GetPointer(src_addr);
|
|
|
|
|
2013-01-10 14:12:21 +00:00
|
|
|
// AR and GB tiles are stored in separate TMEM banks => can't use a single memcpy for everything
|
|
|
|
u32 tmem_addr_odd = tmem_cfg.preload_tmem_odd * TMEM_LINE_SIZE;
|
2012-03-23 11:10:48 +00:00
|
|
|
|
2013-01-16 02:15:31 +00:00
|
|
|
for (u32 i = 0; i < tmem_cfg.preload_tile_info.count; ++i)
|
2013-01-10 14:12:21 +00:00
|
|
|
{
|
2015-09-07 15:05:47 +00:00
|
|
|
if (tmem_addr_even + TMEM_LINE_SIZE > TMEM_SIZE || tmem_addr_odd + TMEM_LINE_SIZE > TMEM_SIZE)
|
|
|
|
break;
|
2013-01-10 14:12:21 +00:00
|
|
|
|
2015-09-07 15:05:47 +00:00
|
|
|
memcpy(texMem + tmem_addr_even, src_ptr + bytes_read, TMEM_LINE_SIZE);
|
|
|
|
memcpy(texMem + tmem_addr_odd, src_ptr + bytes_read + TMEM_LINE_SIZE, TMEM_LINE_SIZE);
|
2013-01-10 14:12:21 +00:00
|
|
|
tmem_addr_even += TMEM_LINE_SIZE;
|
|
|
|
tmem_addr_odd += TMEM_LINE_SIZE;
|
2015-09-07 15:05:47 +00:00
|
|
|
bytes_read += TMEM_LINE_SIZE * 2;
|
2013-01-10 14:12:21 +00:00
|
|
|
}
|
|
|
|
}
|
2015-09-07 15:05:47 +00:00
|
|
|
|
|
|
|
if (g_bRecordFifoData)
|
|
|
|
FifoRecorder::GetInstance().UseMemory(src_addr, bytes_read, MemoryUpdate::TMEM);
|
2012-01-29 20:17:22 +00:00
|
|
|
}
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
2014-09-17 16:46:23 +00:00
|
|
|
|
|
|
|
// ---------------------------------------------------
|
|
|
|
// Set the TEV Color
|
|
|
|
// ---------------------------------------------------
|
|
|
|
//
|
|
|
|
// NOTE: Each of these registers actually maps to two variables internally.
|
|
|
|
// There's a bit that specifies which one is currently written to.
|
|
|
|
//
|
|
|
|
// NOTE: Some games write only to the RA register (or only to the BG register).
|
|
|
|
// We may not assume that the unwritten register holds a valid value, hence
|
|
|
|
// both component pairs need to be loaded individually.
|
|
|
|
case BPMEM_TEV_COLOR_RA:
|
|
|
|
case BPMEM_TEV_COLOR_RA + 2:
|
|
|
|
case BPMEM_TEV_COLOR_RA + 4:
|
|
|
|
case BPMEM_TEV_COLOR_RA + 6:
|
|
|
|
{
|
|
|
|
int num = (bp.address >> 1) & 0x3;
|
|
|
|
if (bpmem.tevregs[num].type_ra)
|
|
|
|
{
|
|
|
|
PixelShaderManager::SetTevKonstColor(num, 0, (s32)bpmem.tevregs[num].red);
|
|
|
|
PixelShaderManager::SetTevKonstColor(num, 3, (s32)bpmem.tevregs[num].alpha);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PixelShaderManager::SetTevColor(num, 0, (s32)bpmem.tevregs[num].red);
|
|
|
|
PixelShaderManager::SetTevColor(num, 3, (s32)bpmem.tevregs[num].alpha);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
case BPMEM_TEV_COLOR_BG:
|
|
|
|
case BPMEM_TEV_COLOR_BG + 2:
|
|
|
|
case BPMEM_TEV_COLOR_BG + 4:
|
|
|
|
case BPMEM_TEV_COLOR_BG + 6:
|
|
|
|
{
|
|
|
|
int num = (bp.address >> 1) & 0x3;
|
|
|
|
if (bpmem.tevregs[num].type_bg)
|
|
|
|
{
|
|
|
|
PixelShaderManager::SetTevKonstColor(num, 1, (s32)bpmem.tevregs[num].green);
|
|
|
|
PixelShaderManager::SetTevKonstColor(num, 2, (s32)bpmem.tevregs[num].blue);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PixelShaderManager::SetTevColor(num, 1, (s32)bpmem.tevregs[num].green);
|
|
|
|
PixelShaderManager::SetTevColor(num, 2, (s32)bpmem.tevregs[num].blue);
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2014-05-20 15:23:47 +00:00
|
|
|
default:
|
2009-07-26 09:52:35 +00:00
|
|
|
break;
|
2014-05-20 15:23:47 +00:00
|
|
|
}
|
2009-07-26 09:52:35 +00:00
|
|
|
|
2014-05-20 15:23:47 +00:00
|
|
|
switch (bp.address & 0xFC) // Texture sampler filter
|
|
|
|
{
|
|
|
|
// -------------------------
|
|
|
|
// Texture Environment Order
|
|
|
|
// -------------------------
|
|
|
|
case BPMEM_TREF:
|
|
|
|
case BPMEM_TREF+4:
|
|
|
|
return;
|
|
|
|
// ----------------------
|
|
|
|
// Set wrap size
|
|
|
|
// ----------------------
|
|
|
|
case BPMEM_SU_SSIZE:
|
|
|
|
case BPMEM_SU_TSIZE:
|
|
|
|
case BPMEM_SU_SSIZE+2:
|
|
|
|
case BPMEM_SU_TSIZE+2:
|
|
|
|
case BPMEM_SU_SSIZE+4:
|
|
|
|
case BPMEM_SU_TSIZE+4:
|
|
|
|
case BPMEM_SU_SSIZE+6:
|
|
|
|
case BPMEM_SU_TSIZE+6:
|
|
|
|
case BPMEM_SU_SSIZE+8:
|
|
|
|
case BPMEM_SU_TSIZE+8:
|
|
|
|
case BPMEM_SU_SSIZE+10:
|
|
|
|
case BPMEM_SU_TSIZE+10:
|
|
|
|
case BPMEM_SU_SSIZE+12:
|
|
|
|
case BPMEM_SU_TSIZE+12:
|
|
|
|
case BPMEM_SU_SSIZE+14:
|
|
|
|
case BPMEM_SU_TSIZE+14:
|
|
|
|
if (bp.changes)
|
2014-12-14 20:44:33 +00:00
|
|
|
{
|
2014-05-20 15:23:47 +00:00
|
|
|
PixelShaderManager::SetTexCoordChanged((bp.address - BPMEM_SU_SSIZE) >> 1);
|
2014-12-14 20:44:33 +00:00
|
|
|
GeometryShaderManager::SetTexCoordChanged((bp.address - BPMEM_SU_SSIZE) >> 1);
|
|
|
|
}
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
|
|
|
// ------------------------
|
|
|
|
// BPMEM_TX_SETMODE0 - (Texture lookup and filtering mode) LOD/BIAS Clamp, MaxAnsio, LODBIAS, DiagLoad, Min Filter, Mag Filter, Wrap T, S
|
|
|
|
// BPMEM_TX_SETMODE1 - (LOD Stuff) - Max LOD, Min LOD
|
|
|
|
// ------------------------
|
|
|
|
case BPMEM_TX_SETMODE0: // (0x90 for linear)
|
|
|
|
case BPMEM_TX_SETMODE0_4:
|
|
|
|
return;
|
|
|
|
|
|
|
|
case BPMEM_TX_SETMODE1:
|
|
|
|
case BPMEM_TX_SETMODE1_4:
|
|
|
|
return;
|
|
|
|
// --------------------------------------------
|
|
|
|
// BPMEM_TX_SETIMAGE0 - Texture width, height, format
|
|
|
|
// BPMEM_TX_SETIMAGE1 - even LOD address in TMEM - Image Type, Cache Height, Cache Width, TMEM Offset
|
|
|
|
// BPMEM_TX_SETIMAGE2 - odd LOD address in TMEM - Cache Height, Cache Width, TMEM Offset
|
|
|
|
// BPMEM_TX_SETIMAGE3 - Address of Texture in main memory
|
|
|
|
// --------------------------------------------
|
|
|
|
case BPMEM_TX_SETIMAGE0:
|
|
|
|
case BPMEM_TX_SETIMAGE0_4:
|
|
|
|
case BPMEM_TX_SETIMAGE1:
|
|
|
|
case BPMEM_TX_SETIMAGE1_4:
|
|
|
|
case BPMEM_TX_SETIMAGE2:
|
|
|
|
case BPMEM_TX_SETIMAGE2_4:
|
|
|
|
case BPMEM_TX_SETIMAGE3:
|
|
|
|
case BPMEM_TX_SETIMAGE3_4:
|
|
|
|
return;
|
|
|
|
// -------------------------------
|
|
|
|
// Set a TLUT
|
|
|
|
// BPMEM_TX_SETTLUT - Format, TMEM Offset (offset of TLUT from start of TMEM high bank > > 5)
|
|
|
|
// -------------------------------
|
|
|
|
case BPMEM_TX_SETTLUT:
|
2014-06-02 06:26:24 +00:00
|
|
|
case BPMEM_TX_SETTLUT_4:
|
2014-05-20 15:23:47 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
2009-07-06 02:10:26 +00:00
|
|
|
}
|
2014-05-20 15:23:47 +00:00
|
|
|
|
|
|
|
switch (bp.address & 0xF0)
|
|
|
|
{
|
|
|
|
// --------------
|
|
|
|
// Indirect Tev
|
|
|
|
// --------------
|
|
|
|
case BPMEM_IND_CMD:
|
|
|
|
case BPMEM_IND_CMD+1:
|
|
|
|
case BPMEM_IND_CMD+2:
|
|
|
|
case BPMEM_IND_CMD+3:
|
|
|
|
case BPMEM_IND_CMD+4:
|
|
|
|
case BPMEM_IND_CMD+5:
|
|
|
|
case BPMEM_IND_CMD+6:
|
|
|
|
case BPMEM_IND_CMD+7:
|
|
|
|
case BPMEM_IND_CMD+8:
|
|
|
|
case BPMEM_IND_CMD+9:
|
|
|
|
case BPMEM_IND_CMD+10:
|
|
|
|
case BPMEM_IND_CMD+11:
|
|
|
|
case BPMEM_IND_CMD+12:
|
|
|
|
case BPMEM_IND_CMD+13:
|
|
|
|
case BPMEM_IND_CMD+14:
|
|
|
|
case BPMEM_IND_CMD+15:
|
|
|
|
return;
|
|
|
|
// --------------------------------------------------
|
|
|
|
// Set Color/Alpha of a Tev
|
|
|
|
// BPMEM_TEV_COLOR_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D
|
|
|
|
// BPMEM_TEV_ALPHA_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D, T Swap, R Swap
|
|
|
|
// --------------------------------------------------
|
|
|
|
case BPMEM_TEV_COLOR_ENV: // Texture Environment 1
|
|
|
|
case BPMEM_TEV_ALPHA_ENV:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+2: // Texture Environment 2
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+2:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+4: // Texture Environment 3
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+4:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+6: // Texture Environment 4
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+6:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+8: // Texture Environment 5
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+8:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+10: // Texture Environment 6
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+10:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+12: // Texture Environment 7
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+12:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+14: // Texture Environment 8
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+14:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+16: // Texture Environment 9
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+16:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+18: // Texture Environment 10
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+18:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+20: // Texture Environment 11
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+20:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+22: // Texture Environment 12
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+22:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+24: // Texture Environment 13
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+24:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+26: // Texture Environment 14
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+26:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+28: // Texture Environment 15
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+28:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+30: // Texture Environment 16
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+30:
|
|
|
|
return;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
WARN_LOG(VIDEO, "Unknown BP opcode: address = 0x%08x value = 0x%08x", bp.address, bp.newvalue);
|
2009-07-22 22:50:52 +00:00
|
|
|
}
|
2009-07-06 02:10:26 +00:00
|
|
|
|
2014-05-03 20:36:29 +00:00
|
|
|
// Call browser: OpcodeDecoding.cpp ExecuteDisplayList > Decode() > LoadBPReg()
|
|
|
|
void LoadBPReg(u32 value0)
|
|
|
|
{
|
|
|
|
int regNum = value0 >> 24;
|
|
|
|
int oldval = ((u32*)&bpmem)[regNum];
|
|
|
|
int newval = (oldval & ~bpmem.bpMask) | (value0 & bpmem.bpMask);
|
|
|
|
int changes = (oldval ^ newval) & 0xFFFFFF;
|
|
|
|
|
|
|
|
BPCmd bp = {regNum, changes, newval};
|
|
|
|
|
|
|
|
// Reset the mask register if we're not trying to set it ourselves.
|
|
|
|
if (regNum != BPMEM_BP_MASK)
|
|
|
|
bpmem.bpMask = 0xFFFFFF;
|
|
|
|
|
|
|
|
BPWritten(bp);
|
|
|
|
}
|
|
|
|
|
Add the 'desynced GPU thread' mode.
It's a relatively big commit (less big with -w), but it's hard to test
any of this separately...
The basic problem is that in netplay or movies, the state of the CPU
must be deterministic, including when the game receives notification
that the GPU has processed FIFO data. Dual core mode notifies the game
whenever the GPU thread actually gets around to doing the work, so it
isn't deterministic. Single core mode is because it notifies the game
'instantly' (after processing the data synchronously), but it's too slow
for many systems and games.
My old dc-netplay branch worked as follows: everything worked as normal
except the state of the CP registers was a lie, and the CPU thread only
delivered results when idle detection triggered (waiting for the GPU if
they weren't ready at that point). Usually, a game is idle iff all the
work for the frame has been done, except for a small amount of work
depending on the GPU result, so neither the CPU or the GPU waiting on
the other affected performance much. However, it's possible that the
game could be waiting for some earlier interrupt, and any of several
games which, for whatever reason, never went into a detectable idle
(even when I tried to improve the detection) would never receive results
at all. (The current method should have better compatibility, but it
also has slightly higher overhead and breaks some other things, so I
want to reimplement this, hopefully with less impact on the code, in the
future.)
With this commit, the basic idea is that the CPU thread acts as if the
work has been done instantly, like single core mode, but actually hands
it off asynchronously to the GPU thread (after backing up some data that
the game might change in memory before it's actually done). Since the
work isn't done, any feedback from the GPU to the CPU, such as real
XFB/EFB copies (virtual are OK), EFB pokes, performance queries, etc. is
broken; but most games work with these options disabled, and there is no
need to try to detect what the CPU thread is doing.
Technically: when the flag g_use_deterministic_gpu_thread (currently
stuck on) is on, the CPU thread calls RunGpu like in single core mode.
This function synchronously copies the data from the FIFO to the
internal video buffer and updates the CP registers, interrupts, etc.
However, instead of the regular ReadDataFromFifo followed by running the
opcode decoder, it runs ReadDataFromFifoOnCPU ->
OpcodeDecoder_Preprocess, which relatively quickly scans through the
FIFO data, detects SetFinish calls etc., which are immediately fired,
and saves certain associated data from memory (e.g. display lists) in
AuxBuffers (a parallel stream to the main FIFO, which is a bit slow at
the moment), before handing the data off to the GPU thread to actually
render. That makes up the bulk of this commit.
In various circumstances, including the aforementioned EFB pokes and
performance queries as well as swap requests (i.e. the end of a frame -
we don't want the CPU potentially pumping out frames too quickly and the
GPU falling behind*), SyncGPU is called to wait for actual completion.
The overhead mainly comes from OpcodeDecoder_Preprocess (which is,
again, synchronous), as well as the actual copying.
Currently, display lists and such are escrowed from main memory even
though they usually won't change over the course of a frame, and
textures are not even though they might, resulting in a small chance of
graphical glitches. When the texture locking (i.e. fault on write) code
lands, I can make this all correct and maybe a little faster.
* This suggests an alternate determinism method of just delaying results
until a short time before the end of each frame. For all I know this
might mostly work - I haven't tried it - but if any significant work
hinges on the competion of render to texture etc., the frame will be
missed.
2014-08-28 02:56:19 +00:00
|
|
|
void LoadBPRegPreprocess(u32 value0)
|
|
|
|
{
|
|
|
|
int regNum = value0 >> 24;
|
|
|
|
// masking could hypothetically be a problem
|
|
|
|
u32 newval = value0 & 0xffffff;
|
|
|
|
switch (regNum)
|
|
|
|
{
|
|
|
|
case BPMEM_SETDRAWDONE:
|
|
|
|
if ((newval & 0xff) == 0x02)
|
|
|
|
PixelEngine::SetFinish();
|
|
|
|
break;
|
|
|
|
case BPMEM_PE_TOKEN_ID:
|
|
|
|
PixelEngine::SetToken(newval & 0xffff, false);
|
|
|
|
break;
|
|
|
|
case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
|
|
|
|
PixelEngine::SetToken(newval & 0xffff, true);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-05-25 01:55:13 +00:00
|
|
|
void GetBPRegInfo(const u8* data, std::string* name, std::string* desc)
|
2014-05-03 20:36:29 +00:00
|
|
|
{
|
|
|
|
const char* no_yes[2] = { "No", "Yes" };
|
|
|
|
|
2015-11-03 09:41:38 +00:00
|
|
|
u8 cmd = data[0];
|
2014-05-03 20:36:29 +00:00
|
|
|
u32 cmddata = Common::swap32(*(u32*)data) & 0xFFFFFF;
|
2015-11-03 09:41:38 +00:00
|
|
|
switch (cmd)
|
2014-05-03 20:36:29 +00:00
|
|
|
{
|
|
|
|
// Macro to set the register name and make sure it was written correctly via compile time assertion
|
|
|
|
#define SetRegName(reg) \
|
2014-05-25 01:55:13 +00:00
|
|
|
*name = #reg; \
|
2014-05-03 20:36:29 +00:00
|
|
|
(void)(reg);
|
|
|
|
|
|
|
|
case BPMEM_GENMODE: // 0x00
|
|
|
|
SetRegName(BPMEM_GENMODE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_DISPLAYCOPYFILTER: // 0x01
|
|
|
|
// TODO: This is actually the sample pattern used for copies from an antialiased EFB
|
|
|
|
SetRegName(BPMEM_DISPLAYCOPYFILTER);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 0x02: // 0x02
|
|
|
|
case 0x03: // 0x03
|
|
|
|
case 0x04: // 0x04
|
|
|
|
// TODO: same as BPMEM_DISPLAYCOPYFILTER
|
|
|
|
break;
|
|
|
|
|
2014-06-02 05:51:52 +00:00
|
|
|
case BPMEM_IND_MTXA: // 0x06
|
|
|
|
case BPMEM_IND_MTXA+3:
|
|
|
|
case BPMEM_IND_MTXA+6:
|
|
|
|
SetRegName(BPMEM_IND_MTXA);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_IND_MTXB: // 0x07
|
|
|
|
case BPMEM_IND_MTXB+3:
|
|
|
|
case BPMEM_IND_MTXB+6:
|
|
|
|
SetRegName(BPMEM_IND_MTXB);
|
|
|
|
// TODO: Descriptio
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_IND_MTXC: // 0x08
|
|
|
|
case BPMEM_IND_MTXC+3:
|
|
|
|
case BPMEM_IND_MTXC+6:
|
|
|
|
SetRegName(BPMEM_IND_MTXC);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_IND_IMASK: // 0x0F
|
|
|
|
SetRegName(BPMEM_IND_IMASK);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_IND_CMD: // 0x10
|
|
|
|
case BPMEM_IND_CMD+1:
|
|
|
|
case BPMEM_IND_CMD+2:
|
|
|
|
case BPMEM_IND_CMD+3:
|
|
|
|
case BPMEM_IND_CMD+4:
|
|
|
|
case BPMEM_IND_CMD+5:
|
|
|
|
case BPMEM_IND_CMD+6:
|
|
|
|
case BPMEM_IND_CMD+7:
|
|
|
|
case BPMEM_IND_CMD+8:
|
|
|
|
case BPMEM_IND_CMD+9:
|
|
|
|
case BPMEM_IND_CMD+10:
|
|
|
|
case BPMEM_IND_CMD+11:
|
|
|
|
case BPMEM_IND_CMD+12:
|
|
|
|
case BPMEM_IND_CMD+13:
|
|
|
|
case BPMEM_IND_CMD+14:
|
|
|
|
case BPMEM_IND_CMD+15:
|
|
|
|
SetRegName(BPMEM_IND_CMD);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_SCISSORTL: // 0x20
|
|
|
|
SetRegName(BPMEM_SCISSORTL);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_SCISSORBR: // 0x21
|
|
|
|
SetRegName(BPMEM_SCISSORBR);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_LINEPTWIDTH: // 0x22
|
|
|
|
SetRegName(BPMEM_LINEPTWIDTH);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PERF0_TRI: // 0x23
|
|
|
|
SetRegName(BPMEM_PERF0_TRI);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PERF0_QUAD: // 0x24
|
|
|
|
SetRegName(BPMEM_PERF0_QUAD);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_RAS1_SS0: // 0x25
|
|
|
|
SetRegName(BPMEM_RAS1_SS0);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_RAS1_SS1: // 0x26
|
|
|
|
SetRegName(BPMEM_RAS1_SS1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_IREF: // 0x27
|
|
|
|
SetRegName(BPMEM_IREF);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TREF: // 0x28
|
|
|
|
case BPMEM_TREF+1:
|
|
|
|
case BPMEM_TREF+2:
|
|
|
|
case BPMEM_TREF+3:
|
|
|
|
case BPMEM_TREF+4:
|
|
|
|
case BPMEM_TREF+5:
|
|
|
|
case BPMEM_TREF+6:
|
|
|
|
case BPMEM_TREF+7:
|
|
|
|
SetRegName(BPMEM_TREF);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_SU_SSIZE: // 0x30
|
|
|
|
case BPMEM_SU_SSIZE+2:
|
|
|
|
case BPMEM_SU_SSIZE+4:
|
|
|
|
case BPMEM_SU_SSIZE+6:
|
|
|
|
case BPMEM_SU_SSIZE+8:
|
|
|
|
case BPMEM_SU_SSIZE+10:
|
|
|
|
case BPMEM_SU_SSIZE+12:
|
|
|
|
case BPMEM_SU_SSIZE+14:
|
|
|
|
SetRegName(BPMEM_SU_SSIZE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_SU_TSIZE: // 0x31
|
|
|
|
case BPMEM_SU_TSIZE+2:
|
|
|
|
case BPMEM_SU_TSIZE+4:
|
|
|
|
case BPMEM_SU_TSIZE+6:
|
|
|
|
case BPMEM_SU_TSIZE+8:
|
|
|
|
case BPMEM_SU_TSIZE+10:
|
|
|
|
case BPMEM_SU_TSIZE+12:
|
|
|
|
case BPMEM_SU_TSIZE+14:
|
|
|
|
SetRegName(BPMEM_SU_TSIZE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_ZMODE: // 0x40
|
|
|
|
SetRegName(BPMEM_ZMODE);
|
|
|
|
// TODO: Description
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_BLENDMODE: // 0x41
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_BLENDMODE);
|
|
|
|
BlendMode mode; mode.hex = cmddata;
|
|
|
|
const char* dstfactors[] = { "0", "1", "src_color", "1-src_color", "src_alpha", "1-src_alpha", "dst_alpha", "1-dst_alpha" };
|
|
|
|
const char* srcfactors[] = { "0", "1", "dst_color", "1-dst_color", "src_alpha", "1-src_alpha", "dst_alpha", "1-dst_alpha" };
|
|
|
|
const char* logicmodes[] = { "0", "s & d", "s & ~d", "s", "~s & d", "d", "s ^ d", "s | d", "~(s | d)", "~(s ^ d)", "~d", "s | ~d", "~s", "~s | d", "~(s & d)", "1" };
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Enable: %s\n"
|
|
|
|
"Logic ops: %s\n"
|
|
|
|
"Dither: %s\n"
|
|
|
|
"Color write: %s\n"
|
|
|
|
"Alpha write: %s\n"
|
|
|
|
"Dest factor: %s\n"
|
|
|
|
"Source factor: %s\n"
|
|
|
|
"Subtract: %s\n"
|
|
|
|
"Logic mode: %s\n",
|
|
|
|
no_yes[mode.blendenable], no_yes[mode.logicopenable], no_yes[mode.dither],
|
|
|
|
no_yes[mode.colorupdate], no_yes[mode.alphaupdate], dstfactors[mode.dstfactor],
|
|
|
|
srcfactors[mode.srcfactor], no_yes[mode.subtract], logicmodes[mode.logicmode]);
|
2014-05-03 20:36:29 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2014-06-02 05:51:52 +00:00
|
|
|
case BPMEM_CONSTANTALPHA: // 0x42
|
|
|
|
SetRegName(BPMEM_CONSTANTALPHA);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_ZCOMPARE: // 0x43
|
2014-05-03 20:36:29 +00:00
|
|
|
{
|
|
|
|
SetRegName(BPMEM_ZCOMPARE);
|
|
|
|
PEControl config; config.hex = cmddata;
|
|
|
|
const char* pixel_formats[] = { "RGB8_Z24", "RGBA6_Z24", "RGB565_Z16", "Z24", "Y8", "U8", "V8", "YUV420" };
|
|
|
|
const char* zformats[] = { "linear", "compressed (near)", "compressed (mid)", "compressed (far)", "inv linear", "compressed (inv near)", "compressed (inv mid)", "compressed (inv far)" };
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("EFB pixel format: %s\n"
|
|
|
|
"Depth format: %s\n"
|
|
|
|
"Early depth test: %s\n",
|
|
|
|
pixel_formats[config.pixel_format], zformats[config.zformat], no_yes[config.early_ztest]);
|
2014-05-03 20:36:29 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2014-06-02 05:51:52 +00:00
|
|
|
case BPMEM_FIELDMASK: // 0x44
|
|
|
|
SetRegName(BPMEM_FIELDMASK);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_SETDRAWDONE: // 0x45
|
|
|
|
SetRegName(BPMEM_SETDRAWDONE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_BUSCLOCK0: // 0x46
|
|
|
|
SetRegName(BPMEM_BUSCLOCK0);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PE_TOKEN_ID: // 0x47
|
|
|
|
SetRegName(BPMEM_PE_TOKEN_ID);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PE_TOKEN_INT_ID: // 0x48
|
|
|
|
SetRegName(BPMEM_PE_TOKEN_INT_ID);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_EFB_TL: // 0x49
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_EFB_TL);
|
|
|
|
X10Y10 left_top; left_top.hex = cmddata;
|
|
|
|
*desc = StringFromFormat("Left: %d\nTop: %d", left_top.x, left_top.y);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2014-05-03 20:36:29 +00:00
|
|
|
case BPMEM_EFB_BR: // 0x4A
|
|
|
|
{
|
|
|
|
// TODO: Misleading name, should be BPMEM_EFB_WH instead
|
|
|
|
SetRegName(BPMEM_EFB_BR);
|
|
|
|
X10Y10 width_height; width_height.hex = cmddata;
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Width: %d\nHeight: %d", width_height.x+1, width_height.y+1);
|
2014-05-03 20:36:29 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_EFB_ADDR: // 0x4B
|
|
|
|
SetRegName(BPMEM_EFB_ADDR);
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Target address (32 byte aligned): 0x%06X", cmddata << 5);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
|
2014-06-02 05:51:52 +00:00
|
|
|
case BPMEM_MIPMAP_STRIDE: // 0x4D
|
|
|
|
SetRegName(BPMEM_MIPMAP_STRIDE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
2014-05-03 20:36:29 +00:00
|
|
|
case BPMEM_COPYYSCALE: // 0x4E
|
|
|
|
SetRegName(BPMEM_COPYYSCALE);
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Scaling factor (XFB copy only): 0x%X (%f or inverted %f)", cmddata, (float)cmddata/256.f, 256.f/(float)cmddata);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_CLEAR_AR: // 0x4F
|
|
|
|
SetRegName(BPMEM_CLEAR_AR);
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Alpha: 0x%02X\nRed: 0x%02X", (cmddata&0xFF00)>>8, cmddata&0xFF);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_CLEAR_GB: // 0x50
|
|
|
|
SetRegName(BPMEM_CLEAR_GB);
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Green: 0x%02X\nBlue: 0x%02X", (cmddata&0xFF00)>>8, cmddata&0xFF);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_CLEAR_Z: // 0x51
|
|
|
|
SetRegName(BPMEM_CLEAR_Z);
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Z value: 0x%06X", cmddata);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TRIGGER_EFB_COPY: // 0x52
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TRIGGER_EFB_COPY);
|
|
|
|
UPE_Copy copy; copy.Hex = cmddata;
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Clamping: %s\n"
|
|
|
|
"Converting from RGB to YUV: %s\n"
|
|
|
|
"Target pixel format: 0x%X\n"
|
|
|
|
"Gamma correction: %s\n"
|
|
|
|
"Mipmap filter: %s\n"
|
|
|
|
"Vertical scaling: %s\n"
|
|
|
|
"Clear: %s\n"
|
|
|
|
"Frame to field: 0x%01X\n"
|
|
|
|
"Copy to XFB: %s\n"
|
|
|
|
"Intensity format: %s\n"
|
|
|
|
"Automatic color conversion: %s",
|
|
|
|
(copy.clamp0 && copy.clamp1) ? "Top and Bottom" : (copy.clamp0) ? "Top only" : (copy.clamp1) ? "Bottom only" : "None",
|
|
|
|
no_yes[copy.yuv],
|
|
|
|
copy.tp_realFormat(),
|
|
|
|
(copy.gamma==0)?"1.0":(copy.gamma==1)?"1.7":(copy.gamma==2)?"2.2":"Invalid value 0x3?",
|
|
|
|
no_yes[copy.half_scale],
|
|
|
|
no_yes[copy.scale_invert],
|
|
|
|
no_yes[copy.clear],
|
|
|
|
(u32)copy.frame_to_field,
|
|
|
|
no_yes[copy.copy_to_xfb],
|
|
|
|
no_yes[copy.intensity_fmt],
|
|
|
|
no_yes[copy.auto_conv]);
|
2014-05-03 20:36:29 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_COPYFILTER0: // 0x53
|
|
|
|
SetRegName(BPMEM_COPYFILTER0);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_COPYFILTER1: // 0x54
|
|
|
|
SetRegName(BPMEM_COPYFILTER1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
2014-06-02 05:51:52 +00:00
|
|
|
case BPMEM_CLEARBBOX1: // 0x55
|
|
|
|
SetRegName(BPMEM_CLEARBBOX1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_CLEARBBOX2: // 0x56
|
|
|
|
SetRegName(BPMEM_CLEARBBOX2);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_CLEAR_PIXEL_PERF: // 0x57
|
|
|
|
SetRegName(BPMEM_CLEAR_PIXEL_PERF);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_REVBITS: // 0x58
|
|
|
|
SetRegName(BPMEM_REVBITS);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_SCISSOROFFSET: // 0x59
|
|
|
|
SetRegName(BPMEM_SCISSOROFFSET);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PRELOAD_ADDR: // 0x60
|
|
|
|
SetRegName(BPMEM_PRELOAD_ADDR);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PRELOAD_TMEMEVEN: // 0x61
|
|
|
|
SetRegName(BPMEM_PRELOAD_TMEMEVEN);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PRELOAD_TMEMODD: // 0x62
|
|
|
|
SetRegName(BPMEM_PRELOAD_TMEMODD);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PRELOAD_MODE: // 0x63
|
|
|
|
SetRegName(BPMEM_PRELOAD_MODE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_LOADTLUT0: // 0x64
|
|
|
|
SetRegName(BPMEM_LOADTLUT0);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_LOADTLUT1: // 0x65
|
|
|
|
SetRegName(BPMEM_LOADTLUT1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TEXINVALIDATE: // 0x66
|
|
|
|
SetRegName(BPMEM_TEXINVALIDATE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_PERF1: // 0x67
|
|
|
|
SetRegName(BPMEM_PERF1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FIELDMODE: // 0x68
|
|
|
|
SetRegName(BPMEM_FIELDMODE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_BUSCLOCK1: // 0x69
|
|
|
|
SetRegName(BPMEM_BUSCLOCK1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TX_SETMODE0: // 0x80
|
|
|
|
case BPMEM_TX_SETMODE0+1:
|
|
|
|
case BPMEM_TX_SETMODE0+2:
|
|
|
|
case BPMEM_TX_SETMODE0+3:
|
|
|
|
SetRegName(BPMEM_TX_SETMODE0);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TX_SETMODE1: // 0x84
|
|
|
|
case BPMEM_TX_SETMODE1+1:
|
|
|
|
case BPMEM_TX_SETMODE1+2:
|
|
|
|
case BPMEM_TX_SETMODE1+3:
|
|
|
|
SetRegName(BPMEM_TX_SETMODE1);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TX_SETIMAGE0: // 0x88
|
|
|
|
case BPMEM_TX_SETIMAGE0+1:
|
|
|
|
case BPMEM_TX_SETIMAGE0+2:
|
|
|
|
case BPMEM_TX_SETIMAGE0+3:
|
|
|
|
case BPMEM_TX_SETIMAGE0_4: // 0xA8
|
|
|
|
case BPMEM_TX_SETIMAGE0_4+1:
|
|
|
|
case BPMEM_TX_SETIMAGE0_4+2:
|
|
|
|
case BPMEM_TX_SETIMAGE0_4+3:
|
2015-11-03 09:41:38 +00:00
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TX_SETIMAGE0);
|
|
|
|
int texnum = (cmd < BPMEM_TX_SETIMAGE0_4) ? cmd - BPMEM_TX_SETIMAGE0 : cmd - BPMEM_TX_SETIMAGE0_4 + 4;
|
|
|
|
TexImage0 teximg; teximg.hex = cmddata;
|
|
|
|
*desc = StringFromFormat("Texture Unit: %i\n"
|
|
|
|
"Width: %i\n"
|
|
|
|
"Height: %i\n"
|
|
|
|
"Format: %x\n",
|
|
|
|
texnum, teximg.width+1, teximg.height+1, teximg.format);
|
|
|
|
}
|
2014-06-02 05:51:52 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TX_SETIMAGE1: // 0x8C
|
|
|
|
case BPMEM_TX_SETIMAGE1+1:
|
|
|
|
case BPMEM_TX_SETIMAGE1+2:
|
|
|
|
case BPMEM_TX_SETIMAGE1+3:
|
|
|
|
case BPMEM_TX_SETIMAGE1_4: // 0xAC
|
|
|
|
case BPMEM_TX_SETIMAGE1_4+1:
|
|
|
|
case BPMEM_TX_SETIMAGE1_4+2:
|
|
|
|
case BPMEM_TX_SETIMAGE1_4+3:
|
2015-11-03 09:41:38 +00:00
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TX_SETIMAGE1);
|
|
|
|
int texnum = (cmd < BPMEM_TX_SETIMAGE1_4) ? cmd - BPMEM_TX_SETIMAGE1 : cmd - BPMEM_TX_SETIMAGE1_4 + 4;
|
|
|
|
TexImage1 teximg; teximg.hex = cmddata;
|
|
|
|
*desc = StringFromFormat("Texture Unit: %i\n"
|
|
|
|
"Even TMEM Offset: %x\n"
|
|
|
|
"Even TMEM Width: %i\n"
|
|
|
|
"Even TMEM Height: %i\n"
|
|
|
|
"Cache is manually managed: %s\n",
|
|
|
|
texnum, teximg.tmem_even, teximg.cache_width, teximg.cache_height, no_yes[teximg.image_type]);
|
|
|
|
}
|
2014-06-02 05:51:52 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TX_SETIMAGE2: // 0x90
|
|
|
|
case BPMEM_TX_SETIMAGE2+1:
|
|
|
|
case BPMEM_TX_SETIMAGE2+2:
|
|
|
|
case BPMEM_TX_SETIMAGE2+3:
|
|
|
|
case BPMEM_TX_SETIMAGE2_4: // 0xB0
|
|
|
|
case BPMEM_TX_SETIMAGE2_4+1:
|
|
|
|
case BPMEM_TX_SETIMAGE2_4+2:
|
|
|
|
case BPMEM_TX_SETIMAGE2_4+3:
|
2015-11-03 09:41:38 +00:00
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TX_SETIMAGE2);
|
|
|
|
int texnum = (cmd < BPMEM_TX_SETIMAGE2_4) ? cmd - BPMEM_TX_SETIMAGE2 : cmd - BPMEM_TX_SETIMAGE2_4 + 4;
|
|
|
|
TexImage2 teximg; teximg.hex = cmddata;
|
|
|
|
*desc = StringFromFormat("Texture Unit: %i\n"
|
|
|
|
"Odd TMEM Offset: %x\n"
|
|
|
|
"Odd TMEM Width: %i\n"
|
|
|
|
"Odd TMEM Height: %i\n",
|
|
|
|
texnum, teximg.tmem_odd, teximg.cache_width, teximg.cache_height);
|
|
|
|
}
|
2014-06-02 05:51:52 +00:00
|
|
|
break;
|
|
|
|
|
2014-05-03 20:36:29 +00:00
|
|
|
case BPMEM_TX_SETIMAGE3: // 0x94
|
|
|
|
case BPMEM_TX_SETIMAGE3+1:
|
|
|
|
case BPMEM_TX_SETIMAGE3+2:
|
|
|
|
case BPMEM_TX_SETIMAGE3+3:
|
|
|
|
case BPMEM_TX_SETIMAGE3_4: // 0xB4
|
|
|
|
case BPMEM_TX_SETIMAGE3_4+1:
|
|
|
|
case BPMEM_TX_SETIMAGE3_4+2:
|
|
|
|
case BPMEM_TX_SETIMAGE3_4+3:
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TX_SETIMAGE3);
|
2015-11-03 09:41:38 +00:00
|
|
|
int texnum = (cmd < BPMEM_TX_SETIMAGE3_4) ? cmd - BPMEM_TX_SETIMAGE3 : cmd - BPMEM_TX_SETIMAGE3_4 + 4;
|
2014-05-03 20:36:29 +00:00
|
|
|
TexImage3 teximg; teximg.hex = cmddata;
|
2015-11-03 09:41:38 +00:00
|
|
|
*desc = StringFromFormat("Texture %i source address (32 byte aligned): 0x%06X", texnum, teximg.image_base << 5);
|
2014-05-03 20:36:29 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2014-06-02 05:51:52 +00:00
|
|
|
case BPMEM_TX_SETTLUT: // 0x98
|
|
|
|
case BPMEM_TX_SETTLUT+1:
|
|
|
|
case BPMEM_TX_SETTLUT+2:
|
|
|
|
case BPMEM_TX_SETTLUT+3:
|
2014-06-02 06:26:24 +00:00
|
|
|
case BPMEM_TX_SETTLUT_4: // 0xB8
|
|
|
|
case BPMEM_TX_SETTLUT_4+1:
|
|
|
|
case BPMEM_TX_SETTLUT_4+2:
|
|
|
|
case BPMEM_TX_SETTLUT_4+3:
|
2014-06-02 05:51:52 +00:00
|
|
|
SetRegName(BPMEM_TX_SETTLUT);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
2014-05-03 20:36:29 +00:00
|
|
|
case BPMEM_TEV_COLOR_ENV: // 0xC0
|
|
|
|
case BPMEM_TEV_COLOR_ENV+2:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+4:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+8:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+10:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+12:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+14:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+16:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+18:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+20:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+22:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+24:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+26:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+28:
|
|
|
|
case BPMEM_TEV_COLOR_ENV+30:
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TEV_COLOR_ENV);
|
|
|
|
TevStageCombiner::ColorCombiner cc; cc.hex = cmddata;
|
|
|
|
const char* tevin[] =
|
|
|
|
{
|
|
|
|
"prev.rgb", "prev.aaa",
|
|
|
|
"c0.rgb", "c0.aaa",
|
|
|
|
"c1.rgb", "c1.aaa",
|
|
|
|
"c2.rgb", "c2.aaa",
|
|
|
|
"tex.rgb", "tex.aaa",
|
|
|
|
"ras.rgb", "ras.aaa",
|
|
|
|
"ONE", "HALF", "konst.rgb", "ZERO",
|
|
|
|
};
|
|
|
|
const char* tevbias[] = { "0", "+0.5", "-0.5", "compare" };
|
|
|
|
const char* tevop[] = { "add", "sub" };
|
|
|
|
const char* tevscale[] = { "1", "2", "4", "0.5" };
|
|
|
|
const char* tevout[] = { "prev.rgb", "c0.rgb", "c1.rgb", "c2.rgb" };
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Tev stage: %d\n"
|
|
|
|
"a: %s\n"
|
|
|
|
"b: %s\n"
|
|
|
|
"c: %s\n"
|
|
|
|
"d: %s\n"
|
|
|
|
"Bias: %s\n"
|
|
|
|
"Op: %s\n"
|
|
|
|
"Clamp: %s\n"
|
|
|
|
"Scale factor: %s\n"
|
|
|
|
"Dest: %s\n",
|
|
|
|
(data[0] - BPMEM_TEV_COLOR_ENV)/2, tevin[cc.a], tevin[cc.b], tevin[cc.c], tevin[cc.d],
|
|
|
|
tevbias[cc.bias], tevop[cc.op], no_yes[cc.clamp], tevscale[cc.shift], tevout[cc.dest]);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case BPMEM_TEV_ALPHA_ENV: // 0xC1
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+2:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+4:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+6:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+8:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+10:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+12:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+14:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+16:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+18:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+20:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+22:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+24:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+26:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+28:
|
|
|
|
case BPMEM_TEV_ALPHA_ENV+30:
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_TEV_ALPHA_ENV);
|
|
|
|
TevStageCombiner::AlphaCombiner ac; ac.hex = cmddata;
|
|
|
|
const char* tevin[] =
|
|
|
|
{
|
|
|
|
"prev", "c0", "c1", "c2",
|
|
|
|
"tex", "ras", "konst", "ZERO",
|
|
|
|
};
|
|
|
|
const char* tevbias[] = { "0", "+0.5", "-0.5", "compare" };
|
|
|
|
const char* tevop[] = { "add", "sub" };
|
|
|
|
const char* tevscale[] = { "1", "2", "4", "0.5" };
|
|
|
|
const char* tevout[] = { "prev", "c0", "c1", "c2" };
|
2014-05-25 01:55:13 +00:00
|
|
|
*desc = StringFromFormat("Tev stage: %d\n"
|
|
|
|
"a: %s\n"
|
|
|
|
"b: %s\n"
|
|
|
|
"c: %s\n"
|
|
|
|
"d: %s\n"
|
|
|
|
"Bias: %s\n"
|
|
|
|
"Op: %s\n"
|
|
|
|
"Clamp: %s\n"
|
|
|
|
"Scale factor: %s\n"
|
|
|
|
"Dest: %s\n"
|
|
|
|
"Ras sel: %d\n"
|
|
|
|
"Tex sel: %d\n",
|
|
|
|
(data[0] - BPMEM_TEV_ALPHA_ENV)/2, tevin[ac.a], tevin[ac.b], tevin[ac.c], tevin[ac.d],
|
|
|
|
tevbias[ac.bias], tevop[ac.op], no_yes[ac.clamp], tevscale[ac.shift], tevout[ac.dest],
|
|
|
|
ac.rswap, ac.tswap);
|
2014-05-03 20:36:29 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2014-09-17 16:46:23 +00:00
|
|
|
case BPMEM_TEV_COLOR_RA: // 0xE0
|
|
|
|
case BPMEM_TEV_COLOR_RA + 2: // 0xE2
|
|
|
|
case BPMEM_TEV_COLOR_RA + 4: // 0xE4
|
|
|
|
case BPMEM_TEV_COLOR_RA + 6: // 0xE6
|
|
|
|
SetRegName(BPMEM_TEV_COLOR_RA);
|
2014-06-02 05:51:52 +00:00
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
2014-09-17 16:46:23 +00:00
|
|
|
case BPMEM_TEV_COLOR_BG: // 0xE1
|
|
|
|
case BPMEM_TEV_COLOR_BG + 2: // 0xE3
|
|
|
|
case BPMEM_TEV_COLOR_BG + 4: // 0xE5
|
|
|
|
case BPMEM_TEV_COLOR_BG + 6: // 0xE7
|
|
|
|
SetRegName(BPMEM_TEV_COLOR_BG);
|
2014-06-02 05:51:52 +00:00
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FOGRANGE: // 0xE8
|
|
|
|
case BPMEM_FOGRANGE+1:
|
|
|
|
case BPMEM_FOGRANGE+2:
|
|
|
|
case BPMEM_FOGRANGE+3:
|
|
|
|
case BPMEM_FOGRANGE+4:
|
|
|
|
case BPMEM_FOGRANGE+5:
|
|
|
|
SetRegName(BPMEM_FOGRANGE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FOGPARAM0: // 0xEE
|
|
|
|
SetRegName(BPMEM_FOGPARAM0);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FOGBMAGNITUDE: // 0xEF
|
|
|
|
SetRegName(BPMEM_FOGBMAGNITUDE);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FOGBEXPONENT: // 0xF0
|
|
|
|
SetRegName(BPMEM_FOGBEXPONENT);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FOGPARAM3: // 0xF1
|
|
|
|
SetRegName(BPMEM_FOGPARAM3);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_FOGCOLOR: // 0xF2
|
|
|
|
SetRegName(BPMEM_FOGCOLOR);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_ALPHACOMPARE: // 0xF3
|
|
|
|
{
|
|
|
|
SetRegName(BPMEM_ALPHACOMPARE);
|
|
|
|
AlphaTest test; test.hex = cmddata;
|
|
|
|
const char* functions[] = { "NEVER", "LESS", "EQUAL", "LEQUAL", "GREATER", "NEQUAL", "GEQUAL", "ALWAYS" };
|
|
|
|
const char* logic[] = { "AND", "OR", "XOR", "XNOR" };
|
|
|
|
*desc = StringFromFormat("Test 1: %s (ref: %#02x)\n"
|
|
|
|
"Test 2: %s (ref: %#02x)\n"
|
|
|
|
"Logic: %s\n",
|
|
|
|
functions[test.comp0], (int)test.ref0, functions[test.comp1], (int)test.ref1, logic[test.logic]);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case BPMEM_BIAS: // 0xF4
|
|
|
|
SetRegName(BPMEM_BIAS);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_ZTEX2: // 0xF5
|
|
|
|
SetRegName(BPMEM_ZTEX2);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BPMEM_TEV_KSEL: // 0xF6
|
|
|
|
case BPMEM_TEV_KSEL+1:
|
|
|
|
case BPMEM_TEV_KSEL+2:
|
|
|
|
case BPMEM_TEV_KSEL+3:
|
|
|
|
case BPMEM_TEV_KSEL+4:
|
|
|
|
case BPMEM_TEV_KSEL+5:
|
|
|
|
case BPMEM_TEV_KSEL+6:
|
|
|
|
case BPMEM_TEV_KSEL+7:
|
|
|
|
SetRegName(BPMEM_TEV_KSEL);
|
|
|
|
// TODO: Description
|
|
|
|
break;
|
2014-05-03 20:36:29 +00:00
|
|
|
|
|
|
|
#undef SetRegName
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-01-01 20:46:02 +00:00
|
|
|
// Called when loading a saved state.
|
|
|
|
void BPReload()
|
|
|
|
{
|
2012-12-23 12:32:23 +00:00
|
|
|
// restore anything that goes straight to the renderer.
|
|
|
|
// let's not risk actually replaying any writes.
|
|
|
|
// note that PixelShaderManager is already covered since it has its own DoState.
|
|
|
|
SetGenerationMode();
|
|
|
|
SetScissor();
|
|
|
|
SetDepthMode();
|
|
|
|
SetLogicOpMode();
|
|
|
|
SetDitherMode();
|
|
|
|
SetBlendMode();
|
|
|
|
SetColorMask();
|
|
|
|
OnPixelFormatChange();
|
2012-01-01 20:46:02 +00:00
|
|
|
}
|