zilmar
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c8e73ba18e
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Core: Handle unaligned SW exception in the recompiler
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2023-12-14 23:04:26 +10:30 |
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zilmar
|
972943cff7
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Core: Allow LW to R0 be able to generate an exception
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2023-12-14 17:21:52 +10:30 |
|
zilmar
|
89a6eaf9d1
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Core: Add RecordLLAddress for 32bit register pointer
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2023-12-14 13:52:15 +10:30 |
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zilmar
|
67f5e4f854
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Core: in LL for recompiler handle storing the address in COP[17]
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2023-12-14 13:10:20 +10:30 |
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zilmar
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5fec3f8d31
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Core: remove the global of g_TLB
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2023-12-14 12:09:24 +10:30 |
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zilmar
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c67f3f0e97
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Core: Have UpdateSyncCPU use its Sync cpu instead of passing a cpu to it
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2023-12-14 11:18:07 +10:30 |
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zilmar
|
4770d29ec0
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Core: Get system events to be internal not global
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2023-10-26 19:59:11 +10:30 |
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zilmar
|
d6a2ae80c1
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Core: Remove SystemRegisters
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2023-10-19 14:56:53 +10:30 |
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zilmar
|
4d78f56aa2
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Core: In R4300iOp have a member variable for system, reg, mmu
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2023-10-19 12:31:26 +10:30 |
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zilmar
|
ae0097550f
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Core: Make R4300iOp opcodes not static
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2023-10-19 11:43:32 +10:30 |
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zilmar
|
7f42f70283
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Core: Make R4300iOp::ExecuteCPU() and R4300iOp::ExecuteOps(int32_t Cycles) non static
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2023-10-19 10:28:25 +10:30 |
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zilmar
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d3edbf6dda
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Core: move CInterpreterCPU into R4300iOp
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2023-10-19 09:32:42 +10:30 |
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zilmar
|
4e71221147
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Core: Fix up FPU mode register location
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2023-10-12 14:53:44 +10:30 |
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zilmar
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35105e814e
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Core: Remove CRegisters::DoTLBReadMiss and CRegisters::DoTLBWriteMiss
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2023-10-05 09:54:41 +10:30 |
|
zilmar
|
b7311cc611
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Core: Change Non memory load/store to not use tlb
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2023-10-05 09:32:45 +10:30 |
|
zilmar
|
f817becf9c
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Core: Create a handler for RSP registers that is accessible to the core and the RSP
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2023-09-28 07:03:01 +09:30 |
|
zilmar
|
03e13455f9
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Core: Update pipeline before sync in CX86RecompilerOps::OverflowDelaySlot
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2023-09-28 06:39:39 +09:30 |
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zilmar
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2caa457d02
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Core: reset pipeline stage after CompileLoadMemoryValue and CompileStoreMemoryValue
Update counter before mfc0 x, count
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2023-09-22 11:01:46 +09:30 |
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zilmar
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ae4af8746b
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Core: replace GenerateTLBReadException and void GenerateTLBWriteException with CRegisters::DoTLBReadMiss/CRegisters::DoTLBWriteMiss
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2023-09-14 13:09:11 +09:30 |
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zilmar
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a5a4873e84
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Core: Have CRegisters::DoAddressError to not directly modify program counter
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2023-09-14 11:37:21 +09:30 |
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zilmar
|
5da5dab3c5
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Core: Have CRegisters::DoTLBReadMiss set the target pipe line to jump, not directly modify the PC
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2023-09-14 11:09:28 +09:30 |
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zilmar
|
fcd7257adc
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Core: Change COP0 Status register to a struct breaking up the bits
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2023-09-14 10:23:36 +09:30 |
|
zilmar
|
ab03916a70
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Core: let the stack pointer equal end of rdram
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2023-09-07 11:13:54 +09:30 |
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zilmar
|
91d1c6e237
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Core: Add fpu exceptions to COP1_S_MUL
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2023-08-31 11:09:48 +09:30 |
|
zilmar
|
2f7a35613f
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Core: Add exception to COP1_S_SUB
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2023-08-31 10:54:41 +09:30 |
|
zilmar
|
c28c6bb4a1
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Core: Add fpu exceptions to COP1_S_ADD
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2023-08-31 10:08:49 +09:30 |
|
zilmar
|
416c85ecda
|
Core: some code clean up of Load_FPR_ToTop
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2023-08-31 09:30:05 +09:30 |
|
zilmar
|
2dcfcf250d
|
Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void)
|
2023-08-31 09:28:23 +09:30 |
|
zilmar
|
e49438cdab
|
Core: Add exit reason exception
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2023-08-30 12:16:07 +09:30 |
|
zilmar
|
6884c8d2c9
|
Core: fix up how recompiler handles rounding
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2023-08-17 15:24:57 +09:30 |
|
zilmar
|
187bd64915
|
Core: Update how exceptions are handled with the recompiler
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2023-06-08 16:25:05 +09:30 |
|
zilmar
|
e2eebe566d
|
Core: fix up for clang
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2023-05-18 18:05:54 +09:30 |
|
zilmar
|
3b8dfce64a
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Core: Convert DoBreakException to TriggerException
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2023-05-18 11:47:00 +09:30 |
|
zilmar
|
0dfab78c88
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Core: Convert DoCopUnusableException to TriggerException
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2023-05-18 11:26:36 +09:30 |
|
zilmar
|
252f629e14
|
Core: Convert DoIllegalInstructionException to TriggerException
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2023-05-18 11:13:22 +09:30 |
|
zilmar
|
59a1277bed
|
Core: Convert GenerateOverflowException to TriggerException
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2023-05-18 11:05:27 +09:30 |
|
zilmar
|
69fd74ba56
|
Core: Convert DoSysCallException to TriggerException
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2023-05-18 10:56:06 +09:30 |
|
zilmar
|
fa25b6d2af
|
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
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2023-05-02 11:12:13 +09:30 |
|
zilmar
|
02a48566c0
|
Core: Remove helper functions from x86 Recompiler Ops
|
2023-05-02 10:50:49 +09:30 |
|
zilmar
|
ab8b004b71
|
Core: Add a setting for fpu reg caching
|
2023-04-17 18:47:33 +09:30 |
|
zilmar
|
9a04293a67
|
Update arm/arm64 to use asmjit
|
2023-04-05 10:16:21 +09:30 |
|
zilmar
|
2c40d47a34
|
Start to look at x64 recompiler
|
2023-04-04 17:44:42 +09:30 |
|
zilmar
|
fe35d950f3
|
x64: Change MemoryStackPos to be a pointer
|
2023-04-03 09:08:43 +09:30 |
|
zilmar
|
ea70218d1c
|
Clean up warnings
|
2023-02-28 10:09:08 +10:30 |
|
zilmar
|
f802b18cdc
|
Core: Change to using fenv.h instead of including the code directly
|
2023-01-30 10:07:51 +10:30 |
|
zilmar
|
fb6bda321c
|
Core: SW_Register needs to protect the register
|
2023-01-23 15:30:39 +10:30 |
|
zilmar
|
531a7df959
|
Core: Improve StoreInstruc
|
2023-01-09 14:26:35 +10:30 |
|
zilmar
|
ccae22afc5
|
Core: Revert SPECIAL_SRA and SPECIAL_SRAV to old version when running as 32bit
|
2023-01-09 13:47:41 +10:30 |
|
zilmar
|
b6629ac1d3
|
Android: Fix build warning with CX86Ops::CallThis
|
2023-01-03 14:49:35 +10:30 |
|
zilmar
|
811aaf9d36
|
Core: Fix up SPECIAL_SRAV for 64bit copy
|
2022-12-26 18:34:53 +10:30 |