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Core: Remove SystemRegisters

This commit is contained in:
zilmar 2023-10-19 14:56:53 +10:30
parent d58168bcb9
commit d6a2ae80c1
11 changed files with 53 additions and 101 deletions
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39
Source/Project64-core/N64System/Mips/Register.cpp
View File

@ -218,20 +218,6 @@ const char * CRegName::FPR_Ctrl[32] = {
"FCSR",
};
uint32_t * CSystemRegisters::_PROGRAM_COUNTER = nullptr;
MIPS_DWORD * CSystemRegisters::_GPR = nullptr;
MIPS_DWORD * CSystemRegisters::_FPR = nullptr;
uint64_t * CSystemRegisters::_CP0 = nullptr;
MIPS_DWORD * CSystemRegisters::_RegHI = nullptr;
MIPS_DWORD * CSystemRegisters::_RegLO = nullptr;
uint32_t ** CSystemRegisters::_FPR_UW = nullptr;
uint64_t ** CSystemRegisters::_FPR_UDW = nullptr;
float ** CSystemRegisters::_FPR_S;
float ** CSystemRegisters::_FPR_S_L;
double ** CSystemRegisters::_FPR_D;
uint32_t * CSystemRegisters::_FPCR = nullptr;
uint32_t * CSystemRegisters::_LLBit = nullptr;
CP0registers::CP0registers(uint64_t * _CP0) :
INDEX_REGISTER(_CP0[0]),
RANDOM_REGISTER(_CP0[1]),
@ -532,28 +518,11 @@ void CRegisters::Reset(bool bPostPif, CMipsMemoryVM & MMU)
m_System.m_TLB.COP0StatusChanged();
}
void CRegisters::SetAsCurrentSystem()
{
_PROGRAM_COUNTER = &m_PROGRAM_COUNTER;
_GPR = m_GPR;
_FPR = m_FPR;
_CP0 = m_CP0;
_RegHI = &m_HI;
_RegLO = &m_LO;
_FPR_UW = m_FPR_UW;
_FPR_UDW = m_FPR_UDW;
_FPR_S = m_FPR_S;
_FPR_S_L = m_FPR_S_L;
_FPR_D = m_FPR_D;
_FPCR = m_FPCR;
_LLBit = &m_LLBit;
}
uint64_t CRegisters::Cop0_MF(COP0Reg Reg)
{
if (LogCP0reads() && Reg <= COP0Reg_31)
{
LogMessage("%08X: R4300i read from %s (0x%08X)", (*_PROGRAM_COUNTER), CRegName::Cop0[Reg], m_CP0[Reg]);
LogMessage("%08X: R4300i read from %s (0x%08X)", m_PROGRAM_COUNTER, CRegName::Cop0[Reg], m_CP0[Reg]);
}
if (Reg == COP0Reg_Count || Reg == COP0Reg_Wired || Reg == COP0Reg_Random)
@ -572,10 +541,10 @@ void CRegisters::Cop0_MT(COP0Reg Reg, uint64_t Value)
{
if (LogCP0changes() && Reg <= COP0Reg_31)
{
LogMessage("%08X: Writing 0x%I64U to %s register (originally: 0x%I64U)", (*_PROGRAM_COUNTER), Value, CRegName::Cop0[Reg], m_CP0[Reg]);
LogMessage("%08X: Writing 0x%I64U to %s register (originally: 0x%I64U)", m_PROGRAM_COUNTER, Value, CRegName::Cop0[Reg], m_CP0[Reg]);
if (Reg == 11) // Compare
{
LogMessage("%08X: Cause register changed from %08X to %08X", (*_PROGRAM_COUNTER), (uint32_t)CAUSE_REGISTER.Value, (uint32_t)(g_Reg->CAUSE_REGISTER.Value & ~CAUSE_IP7));
LogMessage("%08X: Cause register changed from %08X to %08X", m_PROGRAM_COUNTER, (uint32_t)CAUSE_REGISTER.Value, (uint32_t)(g_Reg->CAUSE_REGISTER.Value & ~CAUSE_IP7));
}
}
m_CP0Latch = Value;
@ -684,7 +653,7 @@ void CRegisters::Cop1_CT(uint32_t Reg, uint32_t Value)
{
if (Reg == 31)
{
FPStatusReg & StatusReg = (FPStatusReg &)_FPCR[31];
FPStatusReg & StatusReg = (FPStatusReg &)m_FPCR[31];
StatusReg.Value = (Value & 0x183FFFF);
if (((StatusReg.Cause.Inexact & StatusReg.Enable.Inexact) != 0) ||

20
Source/Project64-core/N64System/Mips/Register.h
View File

@ -418,24 +418,6 @@ public:
static const char * FPR_Ctrl[32];
};
class CSystemRegisters
{
protected:
static uint32_t * _PROGRAM_COUNTER;
static MIPS_DWORD * _GPR;
static MIPS_DWORD * _FPR;
static uint64_t * _CP0;
static MIPS_DWORD * _RegHI;
static MIPS_DWORD * _RegLO;
static uint32_t ** _FPR_UW;
static uint64_t ** _FPR_UDW;
static float ** _FPR_S;
static float ** _FPR_S_L;
static double ** _FPR_D;
static uint32_t * _FPCR;
static uint32_t * _LLBit;
};
class CN64System;
class CSystemEvents;
class CTLB;
@ -444,7 +426,6 @@ class CRegisters :
public CLogging,
private CDebugSettings,
private CGameSettings,
protected CSystemRegisters,
public CP0registers,
public RDRAMRegistersReg,
public MIPSInterfaceReg,
@ -501,7 +482,6 @@ public:
bool DoIntrException();
void FixFpuLocations();
void Reset(bool bPostPif, CMipsMemoryVM & MMU);
void SetAsCurrentSystem();
void TriggerAddressException(uint64_t Address, uint32_t ExceptionCode);
void TriggerException(uint32_t ExceptionCode, uint32_t Coprocessor = 0);

12
Source/Project64-core/N64System/Mips/TLB.cpp
View File

@ -131,18 +131,18 @@ void CTLB::WriteEntry(uint32_t Index, bool Random)
if (m_tlb[Index].EntryDefined)
{
uint32_t FastIndx = Index << 1;
if (*_PROGRAM_COUNTER >= m_FastTlb[FastIndx].VSTART &&
*_PROGRAM_COUNTER < m_FastTlb[FastIndx].VEND &&
if (m_Reg.m_PROGRAM_COUNTER >= m_FastTlb[FastIndx].VSTART &&
m_Reg.m_PROGRAM_COUNTER < m_FastTlb[FastIndx].VEND &&
m_FastTlb[FastIndx].ValidEntry && m_FastTlb[FastIndx].VALID)
{
WriteTrace(TraceTLB, TraceDebug, "Ignored PC: %X VAddr Start: %I64X VEND: %I64X", *_PROGRAM_COUNTER, m_FastTlb[FastIndx].VSTART, m_FastTlb[FastIndx].VEND);
WriteTrace(TraceTLB, TraceDebug, "Ignored PC: %X VAddr Start: %I64X VEND: %I64X", m_Reg.m_PROGRAM_COUNTER, m_FastTlb[FastIndx].VSTART, m_FastTlb[FastIndx].VEND);
return;
}
if (*_PROGRAM_COUNTER >= m_FastTlb[FastIndx + 1].VSTART &&
*_PROGRAM_COUNTER < m_FastTlb[FastIndx + 1].VEND &&
if (m_Reg.m_PROGRAM_COUNTER >= m_FastTlb[FastIndx + 1].VSTART &&
m_Reg.m_PROGRAM_COUNTER < m_FastTlb[FastIndx + 1].VEND &&
m_FastTlb[FastIndx + 1].ValidEntry && m_FastTlb[FastIndx + 1].VALID)
{
WriteTrace(TraceTLB, TraceDebug, "Ignored PC: %X VAddr Start: %X VEND: %X", *_PROGRAM_COUNTER, m_FastTlb[FastIndx + 1].VSTART, m_FastTlb[FastIndx + 1].VEND);
WriteTrace(TraceTLB, TraceDebug, "Ignored PC: %X VAddr Start: %X VEND: %X", m_Reg.m_PROGRAM_COUNTER, m_FastTlb[FastIndx + 1].VSTART, m_FastTlb[FastIndx + 1].VEND);
return;
}
}

1
Source/Project64-core/N64System/Mips/TLB.h
View File

@ -29,7 +29,6 @@ struct TLB_ENTRY
};
class CTLB :
protected CSystemRegisters,
private CGameSettings
{
friend class CDebugTlb;

2
Source/Project64-core/N64System/N64System.cpp
View File

@ -963,8 +963,6 @@ bool CN64System::SetActiveSystem(bool bActive)
if (bActive)
{
m_Reg.SetAsCurrentSystem();
g_System = this;
if (g_BaseSystem == this)
{

1
Source/Project64-core/N64System/Recompiler/CodeBlock.cpp
View File

@ -15,6 +15,7 @@ extern "C" void __clear_cache_android(uint8_t * begin, uint8_t * end);
CCodeBlock::CCodeBlock(CMipsMemoryVM & MMU, CRegisters & Reg, uint32_t VAddrEnter) :
m_MMU(MMU),
m_Reg(Reg),
m_VAddrEnter(VAddrEnter),
m_VAddrFirst(VAddrEnter),
m_VAddrLast(VAddrEnter),

5
Source/Project64-core/N64System/Recompiler/CodeBlock.h
View File

@ -55,6 +55,10 @@ public:
{
return m_RecompilerOps;
}
CRegisters & Registers()
{
return m_Reg;
}
const std::string & CodeLog() const
{
return m_CodeLog;
@ -116,6 +120,7 @@ private:
typedef std::list<CCodeSection *> SectionList;
CMipsMemoryVM & m_MMU;
CRegisters & m_Reg;
SectionMap m_SectionMap;
SectionList m_Sections;
CCodeSection * m_EnterSection;

3
Source/Project64-core/N64System/Recompiler/Recompiler.h
View File

@ -14,8 +14,7 @@ class CRecompiler :
protected CDebugSettings,
public CRecompilerSettings,
public CFunctionMap,
public CRecompMemory,
private CSystemRegisters
public CRecompMemory
{
public:
enum REMOVE_REASON

1
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

@ -9578,7 +9578,6 @@ void CX86RecompilerOps::OverflowDelaySlot(bool TestTimer)
m_Assembler.PushImm32("g_System->CountPerOp()", g_System->CountPerOp());
m_Assembler.CallThis((uint32_t)&g_System->m_OpCodes, AddressOf(&R4300iOp::ExecuteOps), "R4300iOp::ExecuteOps", 8);
m_Assembler.AddConstToX86Reg(asmjit::x86::esp, 4);
if (g_System->bFastSP() && g_Recompiler)
{

66
Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.cpp
View File

@ -125,6 +125,7 @@ asmjit::x86::St GetX86FpuRegFromIndex(x86RegFpuIndex Index)
}
CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
m_Reg(CodeBlock.Registers()),
m_CodeBlock(CodeBlock),
m_Assembler(Assembler),
m_Stack_TopPos(0),
@ -151,6 +152,7 @@ CX86RegInfo::CX86RegInfo(CCodeBlock & CodeBlock, CX86Ops & Assembler) :
}
CX86RegInfo::CX86RegInfo(const CX86RegInfo & rhs) :
m_Reg(rhs.m_Reg),
m_CodeBlock(rhs.m_CodeBlock),
m_Assembler(rhs.m_CodeBlock.RecompilerOps()->Assembler())
{
@ -897,7 +899,7 @@ void CX86RegInfo::Map_GPR_32bit(int32_t MipsReg, bool SignValue, int32_t MipsReg
{
if (IsUnknown(MipsRegToLoad))
{
m_Assembler.MoveVariableToX86reg(Reg, &_GPR[MipsRegToLoad].UW[0], CRegName::GPR_Lo[MipsRegToLoad]);
m_Assembler.MoveVariableToX86reg(Reg, &m_Reg.m_GPR[MipsRegToLoad].UW[0], CRegName::GPR_Lo[MipsRegToLoad]);
}
else if (IsMapped(MipsRegToLoad))
{
@ -995,8 +997,8 @@ void CX86RegInfo::Map_GPR_64bit(int32_t MipsReg, int32_t MipsRegToLoad)
{
if (IsUnknown(MipsRegToLoad))
{
m_Assembler.MoveVariableToX86reg(x86Hi, &_GPR[MipsRegToLoad].UW[1], CRegName::GPR_Hi[MipsRegToLoad]);
m_Assembler.MoveVariableToX86reg(x86lo, &_GPR[MipsRegToLoad].UW[0], CRegName::GPR_Lo[MipsRegToLoad]);
m_Assembler.MoveVariableToX86reg(x86Hi, &m_Reg.m_GPR[MipsRegToLoad].UW[1], CRegName::GPR_Hi[MipsRegToLoad]);
m_Assembler.MoveVariableToX86reg(x86lo, &m_Reg.m_GPR[MipsRegToLoad].UW[0], CRegName::GPR_Lo[MipsRegToLoad]);
}
else if (IsMapped(MipsRegToLoad))
{
@ -1203,7 +1205,7 @@ asmjit::x86::Gp CX86RegInfo::Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, b
{
if (IsUnknown(MipsReg))
{
m_Assembler.MoveVariableToX86reg(Reg, &_GPR[MipsReg].UW[1], CRegName::GPR_Hi[MipsReg]);
m_Assembler.MoveVariableToX86reg(Reg, &m_Reg.m_GPR[MipsReg].UW[1], CRegName::GPR_Hi[MipsReg]);
}
else if (IsMapped(MipsReg))
{
@ -1237,7 +1239,7 @@ asmjit::x86::Gp CX86RegInfo::Map_TempReg(asmjit::x86::Gp Reg, int32_t MipsReg, b
{
if (IsUnknown(MipsReg))
{
m_Assembler.MoveVariableToX86reg(Reg, &_GPR[MipsReg].UW[0], CRegName::GPR_Lo[MipsReg]);
m_Assembler.MoveVariableToX86reg(Reg, &m_Reg.m_GPR[MipsReg].UW[0], CRegName::GPR_Lo[MipsReg]);
}
else if (IsMapped(MipsReg))
{
@ -1531,19 +1533,19 @@ void CX86RegInfo::UnMap_FPR(int32_t Reg, bool WriteBackValue)
switch (m_x86fpu_State[StackTopPos()])
{
case FPU_Dword:
m_Assembler.MoveVariableToX86reg(TempReg, &_FPR_S[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_S[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_S[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_S[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.fpuStoreIntegerDwordFromX86Reg(StackTopPos(), TempReg, true);
break;
case FPU_Qword:
m_Assembler.MoveVariableToX86reg(TempReg, &_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.fpuStoreIntegerQwordFromX86Reg(StackTopPos(), TempReg, true);
break;
case FPU_Float:
m_Assembler.MoveVariableToX86reg(TempReg, &_FPR_S[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_S[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_S[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_S[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.fpuStoreDwordFromX86Reg(StackTopPos(), TempReg, true);
break;
case FPU_Double:
m_Assembler.MoveVariableToX86reg(TempReg, &_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.MoveVariableToX86reg(TempReg, &m_Reg.m_FPR_D[m_x86fpu_MappedTo[StackTopPos()]], stdstr_f("_FPR_D[%d]", m_x86fpu_MappedTo[StackTopPos()]).c_str());
m_Assembler.fpuStoreQwordFromX86Reg(StackTopPos(), TempReg, true);
break;
default:
@ -1608,20 +1610,20 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
}
if (Is64Bit(Reg))
{
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegHi(Reg));
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegLo(Reg));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegHi(Reg));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegLo(Reg));
SetMipsRegState(Reg, STATE_UNKNOWN);
return;
}
if ((GetMipsRegLo(Reg) & 0x80000000) != 0)
{
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0xFFFFFFFF);
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0xFFFFFFFF);
}
else
{
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
}
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegLo(Reg));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegLo(Reg));
SetMipsRegState(Reg, STATE_UNKNOWN);
return;
}
@ -1640,11 +1642,11 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
SetMipsRegState(Reg, STATE_UNKNOWN);
return;
}
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegMapLo(Reg));
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[Reg].UW[0], CRegName::GPR_Lo[Reg], GetMipsRegMapLo(Reg));
if (Is64Bit(Reg))
{
SetMipsRegMapLo(Reg, x86Reg_Unknown);
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapHi(Reg));
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapHi(Reg));
SetMipsRegMapHi(Reg, x86Reg_Unknown);
}
else
@ -1654,11 +1656,11 @@ void CX86RegInfo::UnMap_GPR(uint32_t Reg, bool WriteBackValue)
if (IsSigned(Reg))
{
m_Assembler.sar(GetMipsRegMapLo(Reg), 31);
m_Assembler.MoveX86regToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapLo(Reg));
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], GetMipsRegMapLo(Reg));
}
else
{
m_Assembler.MoveConstToVariable(&_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[Reg].UW[1], CRegName::GPR_Hi[Reg], 0);
}
}
SetMipsRegMapLo(Reg, x86Reg_Unknown);
@ -1820,11 +1822,11 @@ void CX86RegInfo::WriteBackRegisters()
}
if ((GetMipsRegLo(count) & 0x80000000) != 0)
{
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
}
else
{
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
}
}
@ -1838,7 +1840,7 @@ void CX86RegInfo::WriteBackRegisters()
bEdiZero = true;
}
}
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
@ -1850,11 +1852,11 @@ void CX86RegInfo::WriteBackRegisters()
bEsiSign = true;
}
}
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
}
else
{
m_Assembler.MoveConstToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], GetMipsRegLo(count));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], GetMipsRegLo(count));
}
SetMipsRegState(count, CX86RegInfo::STATE_UNKNOWN);
@ -1867,7 +1869,7 @@ void CX86RegInfo::WriteBackRegisters()
m_Assembler.xor_(asmjit::x86::edi, asmjit::x86::edi);
bEdiZero = true;
}
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
}
if (GetMipsRegLo(count) == 0)
@ -1880,11 +1882,11 @@ void CX86RegInfo::WriteBackRegisters()
bEdiZero = true;
}
}
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
}
else
{
m_Assembler.MoveConstToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], GetMipsRegLo(count));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], GetMipsRegLo(count));
}
SetMipsRegState(count, CX86RegInfo::STATE_UNKNOWN);
break;
@ -1902,28 +1904,28 @@ void CX86RegInfo::WriteBackRegisters()
if (GetMipsRegHi(count) == 0)
{
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::edi);
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], asmjit::x86::esi);
}
else
{
m_Assembler.MoveConstToVariable(&_GPR[count].UW[1], CRegName::GPR_Hi[count], GetMipsRegHi(count));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[count].UW[1], CRegName::GPR_Hi[count], GetMipsRegHi(count));
}
if (GetMipsRegLo(count) == 0)
{
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::edi);
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
m_Assembler.MoveX86regToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
m_Assembler.MoveX86regToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], asmjit::x86::esi);
}
else
{
m_Assembler.MoveConstToVariable(&_GPR[count].UW[0], CRegName::GPR_Lo[count], GetMipsRegLo(count));
m_Assembler.MoveConstToVariable(&m_Reg.m_GPR[count].UW[0], CRegName::GPR_Lo[count], GetMipsRegLo(count));
}
SetMipsRegState(count, CX86RegInfo::STATE_UNKNOWN);
break;

4
Source/Project64-core/N64System/Recompiler/x86/x86RegInfo.h
View File

@ -41,8 +41,7 @@ asmjit::x86::St GetX86FpuRegFromIndex(x86RegFpuIndex Index);
class CX86RegInfo :
public CRegBase,
private CDebugSettings,
private CSystemRegisters
private CDebugSettings
{
public:
// Enums
@ -175,6 +174,7 @@ public:
private:
CX86RegInfo();
CRegisters & m_Reg;
CCodeBlock & m_CodeBlock;
CX86Ops & m_Assembler;
asmjit::x86::Gp UnMap_8BitTempReg();