2012-12-19 09:30:18 +00:00
|
|
|
#pragma once
|
2022-01-04 05:41:52 +00:00
|
|
|
#include <Project64-core\N64System\Mips\MemoryVirtualMem.h>
|
|
|
|
#include <Project64-core\N64System\Recompiler\RecompilerOps.h>
|
|
|
|
#include <Project64-core\N64System\Interpreter\InterpreterOps.h>
|
|
|
|
#include <Project64-core\N64System\Mips\PifRam.h>
|
2022-04-19 01:47:43 +00:00
|
|
|
#include <Project64-core\N64System\SaveType\FlashRam.h>
|
2022-04-18 11:27:59 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\AudioInterfaceHandler.h>
|
2022-04-25 07:42:07 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\CartridgeDomain1Address1Handler.h>
|
|
|
|
#include <Project64-core\N64System\MemoryHandler\CartridgeDomain1Address3Handler.h>
|
2022-03-21 10:27:57 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\CartridgeDomain2Address1Handler.h>
|
2022-04-25 07:42:07 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\CartridgeDomain2Address2Handler.h>
|
2022-02-21 11:26:25 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\DisplayControlRegHandler.h>
|
2022-03-04 12:23:30 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\MIPSInterfaceHandler.h>
|
2022-01-04 21:44:03 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\PeripheralInterfaceHandler.h>
|
2022-04-19 00:07:57 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\PifRamHandler.h>
|
2022-01-04 05:41:52 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\RDRAMInterfaceHandler.h>
|
2022-02-21 09:17:14 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\RDRAMRegistersHandler.h>
|
2022-04-18 11:27:59 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\RomMemoryHandler.h>
|
2022-04-19 00:07:57 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\SerialInterfaceHandler.h>
|
2022-01-24 12:43:10 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\SPRegistersHandler.h>
|
2022-03-07 23:48:56 +00:00
|
|
|
#include <Project64-core\N64System\MemoryHandler\VideoInterfaceHandler.h>
|
2022-01-03 23:37:52 +00:00
|
|
|
#include <Project64-core\Settings\GameSettings.h>
|
2012-12-19 09:30:18 +00:00
|
|
|
|
2016-06-04 23:42:49 +00:00
|
|
|
#ifdef __arm__
|
|
|
|
#include <sys/ucontext.h>
|
|
|
|
#endif
|
|
|
|
|
2016-06-05 17:06:27 +00:00
|
|
|
#ifndef _WIN32
|
|
|
|
#include <signal.h>
|
2021-05-18 11:51:36 +00:00
|
|
|
// siginfo_t
|
2016-06-05 17:06:27 +00:00
|
|
|
#endif
|
|
|
|
|
2015-09-30 17:45:30 +00:00
|
|
|
/*
|
2021-05-18 11:51:36 +00:00
|
|
|
* TODO: Have address translation functions here?
|
2016-07-04 09:25:39 +00:00
|
|
|
* `return` either the translated address or the mask to XOR by?
|
2015-11-08 18:04:32 +00:00
|
|
|
*
|
2021-05-18 11:51:36 +00:00
|
|
|
* This will help us gradually be able to port Project64 to big-endian CPUs.
|
2016-07-04 09:25:39 +00:00
|
|
|
* Currently it is written to assume 32-bit little-endian, like so:
|
|
|
|
*
|
|
|
|
* 0xAABBCCDD EEFFGGHH --> 0xDDCCBBAA HHGGFFEE
|
|
|
|
* GPR bits[63..0] b1b2b3b4 b5b6b7b8
|
2015-11-08 18:04:32 +00:00
|
|
|
*/
|
2015-09-30 17:45:30 +00:00
|
|
|
|
2016-07-06 20:14:12 +00:00
|
|
|
#if defined(__i386__) || defined(_M_IX86)
|
2016-07-04 07:51:11 +00:00
|
|
|
class CX86RecompilerOps;
|
2016-11-21 07:06:14 +00:00
|
|
|
#elif defined(__arm__) || defined(_M_ARM)
|
|
|
|
class CArmRecompilerOps;
|
2016-07-06 20:14:12 +00:00
|
|
|
#endif
|
2015-09-07 16:16:36 +00:00
|
|
|
|
2010-05-31 00:21:08 +00:00
|
|
|
class CMipsMemoryVM :
|
2015-11-08 18:04:32 +00:00
|
|
|
private R4300iOp,
|
2022-03-21 04:34:59 +00:00
|
|
|
public CPifRam,
|
2022-01-03 23:37:52 +00:00
|
|
|
private CGameSettings
|
2010-05-31 00:21:08 +00:00
|
|
|
{
|
|
|
|
public:
|
2022-03-21 00:29:02 +00:00
|
|
|
CMipsMemoryVM(CN64System & System, bool SavesReadOnly);
|
2015-11-08 18:04:32 +00:00
|
|
|
~CMipsMemoryVM();
|
|
|
|
|
|
|
|
static void ReserveMemory();
|
|
|
|
static void FreeReservedMemory();
|
|
|
|
|
2022-01-03 23:56:14 +00:00
|
|
|
bool Initialize(bool SyncSystem);
|
|
|
|
void Reset(bool EraseMemory);
|
2015-12-13 07:26:31 +00:00
|
|
|
|
2022-04-04 01:00:27 +00:00
|
|
|
uint8_t * Rdram() const { return m_RDRAM; }
|
|
|
|
uint32_t RdramSize() const { return m_AllocatedRdramSize; }
|
|
|
|
uint8_t * Dmem() const { return m_DMEM; }
|
|
|
|
uint8_t * Imem() const { return m_IMEM; }
|
|
|
|
uint8_t * PifRam() { return &m_PifRam[0]; }
|
2015-12-13 07:26:31 +00:00
|
|
|
|
2022-04-25 07:42:07 +00:00
|
|
|
CSram & GetSram() { return m_CartridgeDomain2Address2Handler.Sram(); }
|
|
|
|
CFlashRam & GetFlashRam() { return m_CartridgeDomain2Address2Handler.FlashRam(); }
|
2018-12-09 04:26:11 +00:00
|
|
|
|
2022-06-13 01:54:36 +00:00
|
|
|
uint8_t * MemoryPtr(uint32_t VAddr, uint32_t Size, bool Read);
|
2022-05-16 05:56:20 +00:00
|
|
|
|
2022-05-02 10:52:31 +00:00
|
|
|
bool MemoryValue8(uint32_t VAddr, uint8_t & Value);
|
|
|
|
bool MemoryValue16(uint32_t VAddr, uint16_t & Value);
|
|
|
|
bool MemoryValue32(uint32_t VAddr, uint32_t & Value);
|
2022-06-13 01:54:36 +00:00
|
|
|
bool MemoryValue64(uint32_t VAddr, uint64_t & Value);
|
2022-05-02 10:52:31 +00:00
|
|
|
|
|
|
|
bool UpdateMemoryValue8(uint32_t VAddr, uint8_t Value);
|
|
|
|
bool UpdateMemoryValue16(uint32_t VAddr, uint16_t Value);
|
|
|
|
bool UpdateMemoryValue32(uint32_t VAddr, uint32_t Value);
|
|
|
|
|
2022-05-09 00:36:10 +00:00
|
|
|
bool LB_Memory(uint32_t VAddr, uint8_t & Value);
|
|
|
|
bool LH_Memory(uint32_t VAddr, uint16_t & Value);
|
|
|
|
bool LW_Memory(uint32_t VAddr, uint32_t & Value);
|
|
|
|
bool LD_Memory(uint32_t VAddr, uint64_t & Value);
|
2015-12-13 07:26:31 +00:00
|
|
|
|
2022-06-13 01:54:36 +00:00
|
|
|
bool SB_Memory(uint32_t VAddr, uint8_t Value);
|
|
|
|
bool SH_Memory(uint32_t VAddr, uint16_t Value);
|
|
|
|
bool SW_Memory(uint32_t VAddr, uint32_t Value);
|
|
|
|
bool SD_Memory(uint32_t VAddr, uint64_t Value);
|
2015-12-13 07:26:31 +00:00
|
|
|
|
2015-11-08 18:04:32 +00:00
|
|
|
int32_t MemoryFilter(uint32_t dwExptCode, void * lpExceptionPointer);
|
2022-01-03 23:56:14 +00:00
|
|
|
|
2016-06-04 23:42:49 +00:00
|
|
|
#ifndef _WIN32
|
2016-06-05 17:06:27 +00:00
|
|
|
static bool SetupSegvHandler(void);
|
2016-06-04 23:42:49 +00:00
|
|
|
static void segv_handler(int signal, siginfo_t *siginfo, void *sigcontext);
|
|
|
|
#endif
|
2015-11-08 18:04:32 +00:00
|
|
|
|
2022-06-06 02:11:09 +00:00
|
|
|
void ClearMemoryWriteMap(uint32_t VAddr, uint32_t Length);
|
|
|
|
|
2021-05-18 11:51:36 +00:00
|
|
|
// Protect the memory from being written to
|
2022-01-03 23:56:14 +00:00
|
|
|
void ProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
|
|
|
|
void UnProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
|
2015-11-08 18:04:32 +00:00
|
|
|
|
2021-05-18 11:51:36 +00:00
|
|
|
// Functions for TLB notification
|
2015-11-08 18:04:32 +00:00
|
|
|
void TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly);
|
|
|
|
void TLB_Unmaped(uint32_t Vaddr, uint32_t Len);
|
|
|
|
|
|
|
|
bool ValidVaddr(uint32_t VAddr) const;
|
2022-05-01 22:06:50 +00:00
|
|
|
bool VAddrToPAddr(uint32_t VAddr, uint32_t & PAddr) const;
|
2015-11-08 18:04:32 +00:00
|
|
|
|
|
|
|
// Labels
|
|
|
|
const char * LabelName(uint32_t Address) const;
|
2010-05-31 00:21:08 +00:00
|
|
|
|
2022-03-21 00:29:02 +00:00
|
|
|
AudioInterfaceHandler & AudioInterface(void) { return m_AudioInterfaceHandler; }
|
2022-03-07 23:48:56 +00:00
|
|
|
VideoInterfaceHandler & VideoInterface(void) { return m_VideoInterfaceHandler; }
|
|
|
|
|
2010-05-31 00:21:08 +00:00
|
|
|
private:
|
2021-04-13 00:07:11 +00:00
|
|
|
CMipsMemoryVM();
|
|
|
|
CMipsMemoryVM(const CMipsMemoryVM&);
|
|
|
|
CMipsMemoryVM& operator=(const CMipsMemoryVM&);
|
2012-12-18 10:43:29 +00:00
|
|
|
|
2016-07-06 20:14:12 +00:00
|
|
|
#if defined(__i386__) || defined(_M_IX86)
|
2016-11-27 20:28:13 +00:00
|
|
|
friend class CX86RecompilerOps;
|
2016-09-23 22:40:58 +00:00
|
|
|
#elif defined(__arm__) || defined(_M_ARM)
|
2016-11-27 20:28:13 +00:00
|
|
|
friend class CArmRegInfo;
|
|
|
|
friend class CArmRecompilerOps;
|
2016-07-06 20:14:12 +00:00
|
|
|
#endif
|
2013-01-11 21:57:51 +00:00
|
|
|
|
2015-12-13 07:26:31 +00:00
|
|
|
static void RdramChanged(CMipsMemoryVM * _this);
|
|
|
|
static void ChangeSpStatus();
|
2015-11-08 18:04:32 +00:00
|
|
|
static void ChangeMiIntrMask();
|
2010-06-12 02:02:06 +00:00
|
|
|
|
2022-05-09 00:36:10 +00:00
|
|
|
bool LB_NonMemory(uint32_t VAddr, uint8_t & Value);
|
|
|
|
bool LH_NonMemory(uint32_t VAddr, uint16_t & Value);
|
|
|
|
bool LW_NonMemory(uint32_t VAddr, uint32_t & Value);
|
|
|
|
bool LD_NonMemory(uint32_t VAddr, uint64_t & Value);
|
2010-05-31 00:21:08 +00:00
|
|
|
|
2022-05-09 00:36:10 +00:00
|
|
|
bool SB_NonMemory(uint32_t VAddr, uint8_t Value);
|
|
|
|
bool SH_NonMemory(uint32_t VAddr, uint16_t Value);
|
|
|
|
bool SW_NonMemory(uint32_t VAddr, uint32_t Value);
|
|
|
|
bool SD_NonMemory(uint32_t VAddr, uint64_t Value);
|
2010-05-31 00:21:08 +00:00
|
|
|
|
2016-06-04 23:42:49 +00:00
|
|
|
#if defined(__i386__) || defined(_M_IX86)
|
|
|
|
|
2016-07-03 10:17:45 +00:00
|
|
|
typedef struct _X86_CONTEXT
|
2016-06-04 23:42:49 +00:00
|
|
|
{
|
|
|
|
uint32_t * Edi;
|
|
|
|
uint32_t * Esi;
|
|
|
|
uint32_t * Ebx;
|
|
|
|
uint32_t * Edx;
|
|
|
|
uint32_t * Ecx;
|
|
|
|
uint32_t * Eax;
|
|
|
|
uint32_t * Eip;
|
|
|
|
uint32_t * Esp;
|
|
|
|
uint32_t * Ebp;
|
|
|
|
} X86_CONTEXT;
|
|
|
|
|
|
|
|
static bool FilterX86Exception(uint32_t MemAddress, X86_CONTEXT & context);
|
|
|
|
#endif
|
|
|
|
#ifdef __arm__
|
2019-08-21 09:27:50 +00:00
|
|
|
static void DumpArmExceptionInfo(uint32_t MemAddress, mcontext_t & context);
|
2016-06-04 23:42:49 +00:00
|
|
|
static bool FilterArmException(uint32_t MemAddress, mcontext_t & context);
|
|
|
|
#endif
|
2015-11-08 18:04:32 +00:00
|
|
|
void FreeMemory();
|
2012-12-18 10:43:29 +00:00
|
|
|
|
2022-01-03 23:56:14 +00:00
|
|
|
static uint8_t * m_Reserve1, *m_Reserve2;
|
2022-05-01 22:06:50 +00:00
|
|
|
CN64System & m_System;
|
2022-03-04 12:23:30 +00:00
|
|
|
CRegisters & m_Reg;
|
2022-03-21 00:29:02 +00:00
|
|
|
AudioInterfaceHandler m_AudioInterfaceHandler;
|
2022-04-25 07:42:07 +00:00
|
|
|
CartridgeDomain1Address1Handler m_CartridgeDomain1Address1Handler;
|
|
|
|
CartridgeDomain1Address3Handler m_CartridgeDomain1Address3Handler;
|
2022-03-21 10:27:57 +00:00
|
|
|
CartridgeDomain2Address1Handler m_CartridgeDomain2Address1Handler;
|
2022-04-25 07:42:07 +00:00
|
|
|
CartridgeDomain2Address2Handler m_CartridgeDomain2Address2Handler;
|
2022-02-21 11:26:25 +00:00
|
|
|
DisplayControlRegHandler m_DPCommandRegistersHandler;
|
2022-03-04 12:23:30 +00:00
|
|
|
MIPSInterfaceHandler m_MIPSInterfaceHandler;
|
2022-02-21 09:17:14 +00:00
|
|
|
PeripheralInterfaceHandler m_PeripheralInterfaceHandler;
|
2022-04-19 00:07:57 +00:00
|
|
|
PifRamHandler m_PifRamHandler;
|
2022-04-18 11:27:59 +00:00
|
|
|
RomMemoryHandler m_RomMemoryHandler;
|
2022-03-04 12:23:30 +00:00
|
|
|
RDRAMInterfaceHandler m_RDRAMInterfaceHandler;
|
2022-02-21 09:17:14 +00:00
|
|
|
RDRAMRegistersHandler m_RDRAMRegistersHandler;
|
2022-03-21 04:34:59 +00:00
|
|
|
SerialInterfaceHandler m_SerialInterfaceHandler;
|
2022-01-24 12:43:10 +00:00
|
|
|
SPRegistersHandler m_SPRegistersHandler;
|
2022-03-07 23:48:56 +00:00
|
|
|
VideoInterfaceHandler m_VideoInterfaceHandler;
|
2022-01-03 23:56:14 +00:00
|
|
|
uint8_t * m_RDRAM, *m_DMEM, *m_IMEM;
|
|
|
|
uint32_t m_AllocatedRdramSize;
|
2022-05-16 01:30:20 +00:00
|
|
|
CN64Rom & m_Rom;
|
2010-05-31 00:21:08 +00:00
|
|
|
|
2022-01-03 23:56:14 +00:00
|
|
|
mutable char m_strLabelName[100];
|
2022-05-02 09:40:35 +00:00
|
|
|
uint32_t * m_TLB_ReadMap;
|
|
|
|
uint32_t * m_TLB_WriteMap;
|
2022-04-04 01:00:27 +00:00
|
|
|
size_t * m_MemoryReadMap;
|
|
|
|
size_t * m_MemoryWriteMap;
|
2015-12-21 09:45:08 +00:00
|
|
|
|
2016-06-29 13:40:36 +00:00
|
|
|
static uint32_t RegModValue;
|
2010-05-31 00:21:08 +00:00
|
|
|
};
|