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[Project64] Remove CRecompilerOps from CMipsMemoryVM

This commit is contained in:
zilmar 2016-07-03 20:17:45 +10:00
parent c46e8ccd8f
commit cd0f305124
7 changed files with 82 additions and 106 deletions
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3
Source/Installer/Installer.vcxproj
View File

@ -35,9 +35,6 @@
<AdditionalInputs>$(OutDir)Project64.exe;%(AdditionalInputs)</AdditionalInputs>
<Outputs>$(OutDir)Setup Project64 2.2.exe;%(Outputs)</Outputs>
</CustomBuild>
<None Include="binno\binno.iss" />
<None Include="binno\it_download.iss" />
<None Include="binno\it_download_u.iss" />
</ItemGroup>
<ItemGroup>
<ProjectReference Include="..\Project64\Project64.vcxproj">

14
Source/Installer/Installer.vcxproj.filters
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@ -4,20 +4,6 @@
<Filter Include="Source Files">
<UniqueIdentifier>{93ba3998-9310-4111-bfd3-a907e3452213}</UniqueIdentifier>
</Filter>
<Filter Include="Source Files\binno">
<UniqueIdentifier>{389ec096-ad75-499a-82a2-f6b5dbe0ed90}</UniqueIdentifier>
</Filter>
</ItemGroup>
<ItemGroup>
<None Include="binno\binno.iss">
<Filter>Source Files\binno</Filter>
</None>
<None Include="binno\it_download.iss">
<Filter>Source Files\binno</Filter>
</None>
<None Include="binno\it_download_u.iss">
<Filter>Source Files\binno</Filter>
</None>
</ItemGroup>
<ItemGroup>
<CustomBuild Include="Installer.iss">

11
Source/Project64-core/N64System/Mips/FlashRam.cpp
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@ -15,11 +15,11 @@
#include <Common/path.h>
CFlashram::CFlashram(bool ReadOnly) :
m_FlashRamPointer(NULL),
m_FlashFlag(FLASHRAM_MODE_NOPES),
m_FlashStatus(0),
m_FlashRAM_Offset(0),
m_ReadOnly(ReadOnly)
m_FlashRamPointer(NULL),
m_FlashFlag(FLASHRAM_MODE_NOPES),
m_FlashStatus(0),
m_FlashRAM_Offset(0),
m_ReadOnly(ReadOnly)
{
}
@ -176,7 +176,6 @@ void CFlashram::WriteToFlashCommand(uint32_t FlashRAM_Command)
}
{
uint8_t FlipBuffer[sizeof(EmptyBlock)];
register size_t edx;
uint8_t * FlashRamPointer = m_FlashRamPointer;
memset(FlipBuffer, 0, sizeof(FlipBuffer));

83
Source/Project64-core/N64System/Mips/MemoryVirtualMem.cpp
View File

@ -22,8 +22,6 @@
#include <stdio.h>
#include <Common/MemoryManagement.h>
uint8_t * CMipsMemoryVM::m_Reserve1 = NULL;
uint8_t * CMipsMemoryVM::m_Reserve2 = NULL;
uint32_t CMipsMemoryVM::m_MemLookupAddress = 0;
@ -34,20 +32,20 @@ uint32_t CMipsMemoryVM::RegModValue;
#pragma warning(disable:4355) // Disable 'this' : used in base member initializer list
CMipsMemoryVM::CMipsMemoryVM(bool SavesReadOnly) :
CPifRam(SavesReadOnly),
CFlashram(SavesReadOnly),
CSram(SavesReadOnly),
CDMA(*this, *this),
m_RomMapped(false),
m_Rom(NULL),
m_RomSize(0),
m_RomWrittenTo(false),
m_RomWroteValue(0),
m_HalfLine(0),
m_HalfLineCheck(false),
m_FieldSerration(0),
m_TLB_ReadMap(NULL),
m_TLB_WriteMap(NULL)
CPifRam(SavesReadOnly),
CFlashram(SavesReadOnly),
CSram(SavesReadOnly),
CDMA(*this, *this),
m_RomMapped(false),
m_Rom(NULL),
m_RomSize(0),
m_RomWrittenTo(false),
m_RomWroteValue(0),
m_HalfLine(0),
m_HalfLineCheck(false),
m_FieldSerration(0),
m_TLB_ReadMap(NULL),
m_TLB_WriteMap(NULL)
{
g_Settings->RegisterChangeCB(Game_RDRamSize, this, (CSettings::SettingChangedFunc)RdramChanged);
m_RDRAM = NULL;
@ -592,49 +590,6 @@ bool CMipsMemoryVM::TranslateVaddr(uint32_t VAddr, uint32_t &PAddr) const
return true;
}
void CMipsMemoryVM::ResetMemoryStack()
{
x86Reg Reg, TempReg;
int32_t MipsReg = 29;
CPU_Message(" ResetMemoryStack");
Reg = Get_MemoryStack();
if (Reg == x86_Unknown)
{
Reg = Map_TempReg(x86_Any, MipsReg, false);
}
else
{
if (IsUnknown(MipsReg))
{
MoveVariableToX86reg(&_GPR[MipsReg].UW[0], CRegName::GPR_Lo[MipsReg], Reg);
}
else if (IsMapped(MipsReg))
{
MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg), Reg);
}
else
{
MoveConstToX86reg(GetMipsRegLo(MipsReg), Reg);
}
}
if (g_System->bUseTlb())
{
TempReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(Reg, TempReg);
ShiftRightUnsignImmed(TempReg, 12);
MoveVariableDispToX86Reg(m_TLB_ReadMap, "m_TLB_ReadMap", TempReg, TempReg, 4);
AddX86RegToX86Reg(Reg, TempReg);
}
else
{
AndConstToX86Reg(Reg, 0x1FFFFFFF);
AddConstToX86Reg(Reg, (uint32_t)m_RDRAM);
}
MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
}
bool CMipsMemoryVM::LB_NonMemory(uint32_t PAddr, uint32_t* Value, bool /*SignExtend*/)
{
if (PAddr < 0x800000)
@ -2224,10 +2179,10 @@ void CMipsMemoryVM::Write32CartridgeDomain2Address2(void)
}
/*if ((m_MemLookupAddress & 0x1FFFFFFF) != 0x08010000)
{
if (bHaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
if (bHaveDebugger())
{
g_Notify->BreakPoint(__FILE__, __LINE__);
}
}*/
if (g_System->m_SaveUsing == SaveChip_Auto)
{
@ -2257,4 +2212,4 @@ void CMipsMemoryVM::Write32PifRam(void)
g_MMU->PifRamWrite();
}
}
}
}

7
Source/Project64-core/N64System/Mips/MemoryVirtualMem.h
View File

@ -60,7 +60,6 @@
class CMipsMemoryVM :
public CTransVaddr,
private CRecompilerOps,
private R4300iOp,
private CPifRam,
private CFlashram,
@ -114,10 +113,6 @@ public:
void ProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
void UnProtectMemory(uint32_t StartVaddr, uint32_t EndVaddr);
//Compilation Functions
void ResetMemoryStack();
void ResetMemoryStack(CRegInfo& RegInfo);
//Functions for TLB notification
void TLB_Mapped(uint32_t VAddr, uint32_t Len, uint32_t PAddr, bool bReadOnly);
void TLB_Unmaped(uint32_t Vaddr, uint32_t Len);
@ -182,7 +177,7 @@ private:
#if defined(__i386__) || defined(_M_IX86)
typedef struct _X86_CONTEXT
typedef struct _X86_CONTEXT
{
uint32_t * Edi;
uint32_t * Esi;

67
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.cpp
View File

@ -2057,7 +2057,7 @@ void CRecompilerOps::ADDI()
if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
{
ResetX86Protection();
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -2097,7 +2097,7 @@ void CRecompilerOps::ADDIU()
if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
{
ResetX86Protection();
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -2366,7 +2366,7 @@ void CRecompilerOps::ORI()
if (g_System->bFastSP() && m_Opcode.rt == 29 && m_Opcode.rs != 29)
{
ResetX86Protection();
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -3004,7 +3004,7 @@ void CRecompilerOps::LW(bool ResultSigned, bool bRecordLLBit)
if (g_System->bFastSP() && m_Opcode.rt == 29)
{
ResetX86Protection();
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -4316,7 +4316,7 @@ void CRecompilerOps::LD()
LW_KnownAddress(GetMipsRegMapLo(m_Opcode.rt), Address + 4);
if (g_System->bFastSP() && m_Opcode.rt == 29)
{
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
return;
}
@ -4378,7 +4378,7 @@ void CRecompilerOps::LD()
if (g_System->bFastSP() && m_Opcode.rt == 29)
{
ResetX86Protection();
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -5685,7 +5685,7 @@ void CRecompilerOps::SPECIAL_ADD()
}
if (g_System->bFastSP() && m_Opcode.rd == 29)
{
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -5727,7 +5727,7 @@ void CRecompilerOps::SPECIAL_ADDU()
}
if (g_System->bFastSP() && m_Opcode.rd == 29)
{
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -5776,7 +5776,7 @@ void CRecompilerOps::SPECIAL_SUB()
}
if (g_System->bFastSP() && m_Opcode.rd == 29)
{
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -5826,7 +5826,7 @@ void CRecompilerOps::SPECIAL_SUBU()
if (g_System->bFastSP() && m_Opcode.rd == 29)
{
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -6200,7 +6200,7 @@ void CRecompilerOps::SPECIAL_OR()
if (g_System->bFastSP() && m_Opcode.rd == 29)
{
ResetX86Protection();
g_MMU->ResetMemoryStack();
ResetMemoryStack();
}
}
@ -11285,4 +11285,47 @@ void CRecompilerOps::SW_Register(x86Reg Reg, uint32_t VAddr)
g_Notify->DisplayError(stdstr_f("%s\ntrying to store in %08X?", __FUNCTION__, VAddr).c_str());
}
}
}
}
void CRecompilerOps::ResetMemoryStack()
{
x86Reg Reg, TempReg;
int32_t MipsReg = 29;
CPU_Message(" ResetMemoryStack");
Reg = Get_MemoryStack();
if (Reg == x86_Unknown)
{
Reg = Map_TempReg(x86_Any, MipsReg, false);
}
else
{
if (IsUnknown(MipsReg))
{
MoveVariableToX86reg(&_GPR[MipsReg].UW[0], CRegName::GPR_Lo[MipsReg], Reg);
}
else if (IsMapped(MipsReg))
{
MoveX86RegToX86Reg(GetMipsRegMapLo(MipsReg), Reg);
}
else
{
MoveConstToX86reg(GetMipsRegLo(MipsReg), Reg);
}
}
if (g_System->bUseTlb())
{
TempReg = Map_TempReg(x86_Any, -1, false);
MoveX86RegToX86Reg(Reg, TempReg);
ShiftRightUnsignImmed(TempReg, 12);
MoveVariableDispToX86Reg(g_MMU->m_TLB_ReadMap, "MMU->TLB_ReadMap", TempReg, TempReg, 4);
AddX86RegToX86Reg(Reg, TempReg);
}
else
{
AndConstToX86Reg(Reg, 0x1FFFFFFF);
AddConstToX86Reg(Reg, (uint32_t)g_MMU->Rdram());
}
MoveX86regToVariable(Reg, &(g_Recompiler->MemoryStackPos()), "MemoryStack");
}

3
Source/Project64-core/N64System/Recompiler/x86/x86RecompilerOps.h
View File

@ -244,7 +244,6 @@ public:
const OPCODE & GetOpcode ( void ) const;
void PreCompileOpcode(void);
void PostCompileOpcode ( void );
void Compile_StoreInstructClean(x86Reg AddressReg, int32_t Length);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow);
void CompileReadTLBMiss(uint32_t VirtualAddress, x86Reg LookUpReg);
@ -379,6 +378,8 @@ private:
void LW(bool ResultSigned, bool bRecordLLBit);
void SW(bool bCheckLLbit);
void CompileExit(uint32_t JumpPC, uint32_t TargetPC, CRegInfo &ExitRegSet, CExitInfo::EXIT_REASON reason, bool CompileNow, void(*x86Jmp)(const char * Label, uint32_t Value));
void Compile_StoreInstructClean(x86Reg AddressReg, int32_t Length);
void ResetMemoryStack();
EXIT_LIST m_ExitInfo;
static STEP_TYPE m_NextInstruction;