[Project64] Add Load32RDRAMRegisters
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012e247514
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4a0d9b640b
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@ -21,6 +21,9 @@ uint32_t RegModValue;
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uint8_t * CMipsMemoryVM::m_Reserve1 = NULL;
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uint8_t * CMipsMemoryVM::m_Reserve2 = NULL;
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uint32_t CMipsMemoryVM::m_MemLookupAddress = 0;
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MIPS_DWORD CMipsMemoryVM::m_MemLookupValue;
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bool CMipsMemoryVM::m_MemLookupValid = true;
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CMipsMemoryVM::CMipsMemoryVM(CMipsMemory_CallBack * CallBack, bool SavesReadOnly) :
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@ -2504,25 +2507,12 @@ bool CMipsMemoryVM::LW_NonMemory(uint32_t PAddr, uint32_t* Value)
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}
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}
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m_MemLookupAddress = PAddr;
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switch (PAddr & 0xFFF00000)
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{
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case 0x03F00000:
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switch (PAddr)
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{
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case 0x03F00000: *Value = g_Reg->RDRAM_CONFIG_REG; break;
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case 0x03F00004: *Value = g_Reg->RDRAM_DEVICE_ID_REG; break;
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case 0x03F00008: *Value = g_Reg->RDRAM_DELAY_REG; break;
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case 0x03F0000C: *Value = g_Reg->RDRAM_MODE_REG; break;
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case 0x03F00010: *Value = g_Reg->RDRAM_REF_INTERVAL_REG; break;
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case 0x03F00014: *Value = g_Reg->RDRAM_REF_ROW_REG; break;
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case 0x03F00018: *Value = g_Reg->RDRAM_RAS_INTERVAL_REG; break;
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case 0x03F0001C: *Value = g_Reg->RDRAM_MIN_INTERVAL_REG; break;
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case 0x03F00020: *Value = g_Reg->RDRAM_ADDR_SELECT_REG; break;
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case 0x03F00024: *Value = g_Reg->RDRAM_DEVICE_MANUF_REG; break;
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default:
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*Value = 0;
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return false;
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}
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Load32RDRAMRegisters();
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*Value = m_MemLookupValue.UW[0];
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break;
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case 0x04000000:
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switch (PAddr)
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@ -2739,11 +2729,11 @@ bool CMipsMemoryVM::SB_NonMemory(uint32_t PAddr, uint8_t Value)
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if (PAddr >= CFBStart && PAddr < CFBEnd)
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{
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uint32_t OldProtect;
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VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect);
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*(uint8_t *)(m_RDRAM+PAddr) = Value;
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VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,OldProtect, &OldProtect);
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VirtualProtect(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, PAGE_READWRITE, &OldProtect);
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*(uint8_t *)(m_RDRAM + PAddr) = Value;
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VirtualProtect(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, OldProtect, &OldProtect);
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g_Notify->DisplayError(L"FrameBufferWrite");
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if (FrameBufferWrite) { FrameBufferWrite(PAddr,1); }
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if (FrameBufferWrite) { FrameBufferWrite(PAddr, 1); }
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break;
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}
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#endif
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@ -2778,12 +2768,12 @@ bool CMipsMemoryVM::SH_NonMemory(uint32_t PAddr, uint16_t Value)
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if (PAddr >= CFBStart && PAddr < CFBEnd)
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{
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uint32_t OldProtect;
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VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect);
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*(uint16_t *)(m_RDRAM+PAddr) = Value;
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if (FrameBufferWrite) { FrameBufferWrite(PAddr & ~0xFFF,2); }
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VirtualProtect(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, PAGE_READWRITE, &OldProtect);
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*(uint16_t *)(m_RDRAM + PAddr) = Value;
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if (FrameBufferWrite) { FrameBufferWrite(PAddr & ~0xFFF, 2); }
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//*(uint16_t *)(m_RDRAM+PAddr) = 0xFFFF;
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//VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_NOACCESS, &OldProtect);
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g_Notify->DisplayError(L"PAddr = %x",PAddr);
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g_Notify->DisplayError(L"PAddr = %x", PAddr);
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break;
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}
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#endif
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@ -2813,7 +2803,7 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
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#ifdef ROM_IN_MAPSPACE
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{
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uint32_t OldProtect;
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VirtualProtect(ROM,RomFileSize,PAGE_NOACCESS, &OldProtect);
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VirtualProtect(ROM, RomFileSize, PAGE_NOACCESS, &OldProtect);
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}
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#endif
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//LogMessage("%X: Wrote To Rom %08X from %08X",PROGRAM_COUNTER,Value,PAddr);
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@ -2838,11 +2828,11 @@ bool CMipsMemoryVM::SW_NonMemory(uint32_t PAddr, uint32_t Value)
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if (PAddr >= CFBStart && PAddr < CFBEnd)
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{
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uint32_t OldProtect;
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VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,PAGE_READWRITE, &OldProtect);
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*(uint32_t *)(m_RDRAM+PAddr) = Value;
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VirtualProtect(m_RDRAM+(PAddr & ~0xFFF),0xFFC,OldProtect, &OldProtect);
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g_Notify->DisplayError(L"FrameBufferWrite %X",PAddr);
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if (FrameBufferWrite) { FrameBufferWrite(PAddr,4); }
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VirtualProtect(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, PAGE_READWRITE, &OldProtect);
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*(uint32_t *)(m_RDRAM + PAddr) = Value;
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VirtualProtect(m_RDRAM + (PAddr & ~0xFFF), 0xFFC, OldProtect, &OldProtect);
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g_Notify->DisplayError(L"FrameBufferWrite %X", PAddr);
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if (FrameBufferWrite) { FrameBufferWrite(PAddr, 4); }
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break;
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}
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#endif
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@ -5621,4 +5611,28 @@ void CMipsMemoryVM::ChangeMiIntrMask()
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{
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g_Reg->MI_INTR_MASK_REG |= MI_INTR_MASK_DP;
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}
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}
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void CMipsMemoryVM::Load32RDRAMRegisters(void)
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{
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switch (m_MemLookupAddress & 0x1FFFFFFF)
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{
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case 0x03F00000: m_MemLookupValue.UW[0] = g_Reg->RDRAM_CONFIG_REG; break;
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case 0x03F00004: m_MemLookupValue.UW[0] = g_Reg->RDRAM_DEVICE_ID_REG; break;
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case 0x03F00008: m_MemLookupValue.UW[0] = g_Reg->RDRAM_DELAY_REG; break;
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case 0x03F0000C: m_MemLookupValue.UW[0] = g_Reg->RDRAM_MODE_REG; break;
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case 0x03F00010: m_MemLookupValue.UW[0] = g_Reg->RDRAM_REF_INTERVAL_REG; break;
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case 0x03F00014: m_MemLookupValue.UW[0] = g_Reg->RDRAM_REF_ROW_REG; break;
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case 0x03F00018: m_MemLookupValue.UW[0] = g_Reg->RDRAM_RAS_INTERVAL_REG; break;
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case 0x03F0001C: m_MemLookupValue.UW[0] = g_Reg->RDRAM_MIN_INTERVAL_REG; break;
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case 0x03F00020: m_MemLookupValue.UW[0] = g_Reg->RDRAM_ADDR_SELECT_REG; break;
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case 0x03F00024: m_MemLookupValue.UW[0] = g_Reg->RDRAM_DEVICE_MANUF_REG; break;
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default:
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m_MemLookupValue.UW[0] = 0;
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if (bHaveDebugger())
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{
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g_Notify->BreakPoint(__FILE__, __LINE__);
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}
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}
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m_MemLookupValid = true;
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}
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@ -182,6 +182,8 @@ private:
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void Compile_StoreInstructClean(x86Reg AddressReg, int32_t Length);
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static void Load32RDRAMRegisters(void);
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CMipsMemory_CallBack * const m_CBClass;
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//Memory Locations
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@ -211,4 +213,8 @@ private:
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//BIG look up table to quickly translate the tlb to real mem address
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size_t * m_TLB_ReadMap;
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size_t * m_TLB_WriteMap;
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static uint32_t m_MemLookupAddress;
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static MIPS_DWORD m_MemLookupValue;
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static bool m_MemLookupValid;
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};
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