All ram pages containing code are write protected. In that case, no need
for block checks. Memory reads in the same block(s) can also be executed
at compile time and the results propagated as constants.
When a write is detected in a protected area, the corresponding blocks
are discarded and recompiled using traditional (slow) block checks.
Backported the blkmap code finding change from upstream.
Use smart pointers for block management to avoid reference issues.
Added WriteAfterWrite ssa pass
Fixed crash in ssa ConstProp pass when op list is modified
Some games do 64-bit / 32-bit division (Pro Pinball Trilogy)
DIV0s/1 use and output 1's complement numbers
The final reminder fixup wasn't correct for negative dividend
The issue is that flushing the dynarec cache makes rewriting fail for
the currently executing block. So this avoids flushing the cache too
often but the problem remains.
native implementation of negc and xtrct for x64 and arm64
rec-arm64: pass exception pc in w27 instead of sh4 context
inline mmu_intruction_translation() and clean up
Tested: Both with and without the feature, works only for x64 CPUs for
now, but supported in both windows and linux (see vmem implementation
for it, using mem-mapped files).
Linked them both toghether since you can't really define one and
not the other (plus Linux honors one windows the other in some
cases).
More refactoring on this area to follow.
detect frequent SMC check failures and use a specific code cache area
for these blocks.
flush the temp area when full but keep the main code cache area
Add UsesFPU flag to floating point ops. Use flag instead of specific
test cases in op handlers.
Adjust thrown exception in delay slot (slot illegal exception and slot
fpu disable)
Re-add delay slot 0 hack (Looney Tunes Space Race)
implement sh4 fpu disable exception
implement assistance/PTEA MMU registers
fix some sh4 ops with side effect in interpreter
account for delay slot op cycles
avoid any side effect when using wince tracer
extract SH4_TIMESLICE to single header file (still not used by arm and
x86 recs)
implement incremental YUV conversion with pref SQ
implement access to 32bit VRAM with pref SQ
init YUV converter when TA_YUV_TEX_CTRL is set
set FIFO available space to 256 through SB_TFREM reg
fake FIFO status through SB_FFST reg
Get rid of the renderer thread. It is now the main/UI thread on all
platforms. The emulator runs in a separate thread.
Content browser displayed at startup.
Check if FMA/AVX/SSE3 is supported before using it
fully naked main loop in win32 with proper seh directives
win32: more xmm regs to allocate and no need to save them when calling
out
generates direct vmem read & write accesses
trap sigsegv and rewrite using slow path
add w29 to allocatable registers
get rid of literals and use pc-rel branching
minor optimizations and cleanup
Originally ported from nullDC to libretro in commits:
2fa562db1b46c52b663b3dd4bb33a64907357458
f8eb58ac16a9e5adf662b99be5d00729264808e0
Modified for use w/ reicast per-game configuration
The SH4 sets the signaling bit to 0 for qNaN: 7fbfffff instead of the
usual 7fffffff. Same games seem to rely on this.
Fixes Fur Fighters freeze and missing geometry in game.
The -ffast-math gcc option implies the -ffinite-math-only option, which
produces wrong results with Inf and NaN. Use integer math to detect the
sign of float numbers in FTRC to avoid these issues.
Also the upper cut off value for conversion was apparently wrong.
Also fixed the x86 dynarec but not tested.
Fixes wrong car color in Tokyo Xtreme Racer car selection screen.
div32 matching doesn't handle division by zero and edge cases, which
causes crashes with some games.
Setting enabled by default for Pro Pinball Trilogy.
- Rewrite mem ops to only modify regs after exception path
- Throw & catch logic for interpreter that raises the exception
- Re-enabled some commented mmu code
This adds support for separate config and data dirs.
On Linux, these will be compliant XDG Basedir Specification, i.e.
XDG_CONFIG_HOME and XDG_CONFIG_DIRS (or XDG_DATA_HOME and XDG_DATA_DIRS
respectively). On all other platforms, there currently just set to the
homedir path (so no previous behaviour has been changed).
If reicast wants to read and write a data file, it just calls
get_data_path("/samplefile.txt"). If it does not need to write to
that file, it just uses get_data_path("/samplefile.txt", false). That
way, we can also use system-wide dirs (like /usr/share/reicast on
linux), that the user usually doesn't have write access to.
The same applies for config file, where you use get_config_path(args)
respectively.
Reicast doesn't support exceptions yet, so this isn't of much use now,
and is intended mostly as documentation. nullDC used some call stack
hooking magic to handle exceptions, which was never generic and clean
enough to be worth the effort to port to Reicast.
- Setups state, copies binary
- Binary locks up w/ a reboot loop
Naomi roms have a 512-byte header, executable length seems to be
at 368 or 3C0. The rom is copied from [0, len) to 0x0c020000.The
bios then hands over control at 0x0c021000
Here's the original compiler warning:
../../core/hw/sh4/dyna/shil.cpp:700:24: warning: '&&' within '||'
[-Wlogical-op-parentheses]
...if (op->rd.is_reg() && op->rd._reg==reg_sr_T || op->op==shop_ifb)
~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~ ~~
../../core/hw/sh4/dyna/shil.cpp:700:24: note: place parentheses around the '&&'
expression to silence this warning
...if (op->rd.is_reg() && op->rd._reg==reg_sr_T || op->op==shop_ifb)
^
( )
../../core/hw/sh4/dyna/shil.cpp:843:25: warning: '&&' within '||'
[-Wlogical-op-parentheses]
if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:843:25: note: place parentheses around the '&&'
expression to silence this warning
if (op->rs1.is_reg() && op->rs1._reg==reg_sr_T
^
( )
../../core/hw/sh4/dyna/shil.cpp:844:25: warning: '&&' within '||'
[-Wlogical-op-parentheses]
|| op->rs2.is_reg() &&
op->rs2._reg==reg_sr_T
~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:844:25: note: place parentheses around the '&&'
expression to silence this warning
|| op->rs2.is_reg() && op->rs2._reg==reg_sr_T
^
( )
../../core/hw/sh4/dyna/shil.cpp:845:25: warning: '&&' within '||'
[-Wlogical-op-parentheses]
|| op->rs3.is_reg() && op->rs3._reg==reg_sr_T
~~ ~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/shil.cpp:845:25: note: place parentheses around the '&&'
expression to silence this warning
|| op->rs3.is_reg() && op->rs3._reg==reg_sr_T
^
( )
This compiler warning has been fixed:
../../core/hw/sh4/dyna/decoder.cpp:1181:66: warning: '&&' within '||'
[-Wlogical-op-parentheses]
...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../core/hw/sh4/dyna/decoder.cpp:1181:66: note: place parentheses around the
'&&' expression to silence this warning
...|| blk->BlockType==BET_Cond_1 && blk->BranchBlock<=blk->addr)
^
( )
This consolidates some of the work done for TARGET_NO_NVMEM and
feat/no-direct-memmap. If nvmem is disabled at compile time or alloc
fails _nvmem_enabled() will return false. Various other fixes
and cleanups all around.
- Import naomi code from nullDC, modify and cleanup
- Only unprotected dimm-board support, custom lst files
- Still a compile option
- Boots naomi bios and some games, no input yet
Flyinghead