fix reset hang on naomi

core/hw/aica/aica.cpp

@@ -199,18 +199,18 @@ s32 libAICA_Init()
 	MCIRE=(InterruptInfo*)&aica_reg[0x28B4+8];
 
 	sgc_Init();
-	for (int i=0;i<3;i++)
-		timers[i].Init(aica_reg,i);
 
 	return rv_ok;
 }
 
-void libAICA_Reset(bool manual)
+void libAICA_Reset(bool hard)
 {
-	if (!manual)
+	if (hard)
 		init_mem();
 	sgc_Init();
-	aica_Reset(manual);
+	for (int i = 0; i < 3; i++)
+		timers[i].Init(aica_reg, i);
+	aica_Reset(hard);
 }
 
 void libAICA_Term()

core/hw/aica/aica_if.cpp

@@ -157,7 +157,7 @@ void aica_Init()
 	RealTimeClock = GetRTC_now();
 }
 
-void aica_Reset(bool Manual)
+void aica_Reset(bool hard)
 {
 	aica_Init();
 	VREG = 0;
@@ -357,7 +357,7 @@ void aica_sb_Init()
 	dma_sched_id = sh4_sched_register(0, &dma_end_sched);
 }
 
-void aica_sb_Reset(bool Manual)
+void aica_sb_Reset(bool hard)
 {
 }
 

core/hw/arm7/arm7.cpp

@@ -311,6 +311,12 @@ void arm_Reset()
 #if FEAT_AREC != DYNAREC_NONE
 	FlushCache();
 #endif
+	aica_interr = false;
+	aica_reg_L = 0;
+	e68k_out = false;
+	e68k_reg_L = 0;
+	e68k_reg_M = 0;
+
 	Arm7Enabled = false;
 	// clean registers
 	memset(&arm_Reg[0], 0, sizeof(arm_Reg));

core/hw/arm7/arm_mem.h

@@ -59,6 +59,10 @@ void sh4_WriteMem_reg(u32 addr,u32 data,u32 size);
 #define AICA_RAM_SIZE (ARAM_SIZE)
 #define AICA_RAM_MASK (ARAM_MASK)
 
+extern bool aica_interr;
+extern u32 aica_reg_L;
 extern bool e68k_out;
+extern u32 e68k_reg_L;
+extern u32 e68k_reg_M;
 
 void update_armintc();

core/hw/arm7/vbaARM.cpp

@@ -21,7 +21,7 @@ void libARM_Term()
 }
 
 //It's supposed to reset anything
-void libARM_Reset(bool Manual)
+void libARM_Reset(bool hard)
 {
 	arm_Reset();
 	arm_SetEnabled(false);

core/hw/gdrom/gdromv3.cpp

@@ -1129,7 +1129,7 @@ void gdrom_reg_Term()
 	
 }
 
-void gdrom_reg_Reset(bool Manual)
+void gdrom_reg_Reset(bool hard)
 {
 	sb_rio_register(SB_GDST_addr, RIO_WF, 0, &GDROM_DmaStart);
 	sb_rio_register(SB_GDEN_addr, RIO_WF, 0, &GDROM_DmaEnable);

core/hw/holly/holly_intc.cpp

@@ -248,7 +248,7 @@ void asic_reg_Term()
 
 }
 //Reset -> Reset - Initialise to default values
-void asic_reg_Reset(bool Manual)
+void asic_reg_Reset(bool hard)
 {
 
 }

core/hw/holly/sb.cpp

@@ -785,17 +785,30 @@ void sb_Init()
 #endif
 }
 
-void sb_Reset(bool Manual)
+void sb_Reset(bool hard)
 {
+	if (hard)
+	{
+		for (u32 i = 0; i < sb_regs.Size; i++)
+		{
+			if (!(sb_regs[i].flags & (REG_RO|REG_WO|REG_RF)))
+				sb_regs[i].data32 = 0;
+		}
+	}
+	SB_ISTNRM = 0;
+	SB_FFST_rc = 0;
+	SB_FFST = 0;
 #ifdef ENABLE_MODEM
 	ModemTerm();
 #endif
-	asic_reg_Reset(Manual);
-	gdrom_reg_Reset(Manual);
-	naomi_reg_Reset(Manual);
-	pvr_sb_Reset(Manual);
-	maple_Reset(Manual);
-	aica_sb_Reset(Manual);
+	asic_reg_Reset(hard);
+	if (settings.platform.system == DC_PLATFORM_DREAMCAST)
+		gdrom_reg_Reset(hard);
+	else
+		naomi_reg_Reset(hard);
+	pvr_sb_Reset(hard);
+	maple_Reset(hard);
+	aica_sb_Reset(hard);
 }
 
 void sb_Term()

core/hw/holly/sb_mem.cpp

@@ -348,9 +348,9 @@ void sh4_area0_Init()
 	sb_Init();
 }
 
-void sh4_area0_Reset(bool manual)
+void sh4_area0_Reset(bool hard)
 {
-	if (manual)
+	if (hard)
 	{
 		if (sys_rom != NULL)
 		{
@@ -384,7 +384,7 @@ void sh4_area0_Reset(bool manual)
 		sys_rom->Reset();
 		sys_nvmem->Reset();
 	}
-	sb_Reset(manual);
+	sb_Reset(hard);
 }
 
 void sh4_area0_Term()

core/hw/maple/maple_cfg.cpp

@@ -137,7 +137,6 @@ void mcfg_Create(MapleDeviceType type, u32 bus, u32 port, s32 player_num = -1)
 
 void mcfg_CreateNAOMIJamma()
 {
-	printf("mcfg_CreateNAOMIJamma\n");
 	mcfg_DestroyDevices();
 	mcfg_Create(MDT_NaomiJamma, 0, 5);
 //	mcfg_Create(MDT_Keyboard, 2, 5);
@@ -145,7 +144,6 @@ void mcfg_CreateNAOMIJamma()
 
 void mcfg_CreateAtomisWaveControllers()
 {
-	printf("mcfg_CreateAtomisWaveControllers\n");
 	mcfg_DestroyDevices();
 	// Looks like two controllers needs to be on bus 0 and 1 for digital inputs
 	// Then other devices on port 2 and 3 for analog axes, light guns, ...
@@ -181,7 +179,6 @@ void mcfg_CreateAtomisWaveControllers()
 
 void mcfg_CreateDevices()
 {
-	printf("mcfg_CreateDevices\n");
 	for (int bus = 0; bus < MAPLE_PORTS; ++bus)
 	{
 		switch ((MapleDeviceType)settings.input.maple_devices[bus])
@@ -213,7 +210,6 @@ void mcfg_CreateDevices()
 
 void mcfg_DestroyDevices()
 {
-	printf("mcfg_DestroyDevices\n");
 	for (int i = 0; i < MAPLE_PORTS; i++)
 		for (int j=0;j<=5;j++)
 		{

core/hw/maple/maple_if.cpp

@@ -259,7 +259,7 @@ void maple_Init()
 	maple_schid=sh4_sched_register(0,&maple_schd);
 }
 
-void maple_Reset(bool Manual)
+void maple_Reset(bool hard)
 {
 	maple_ddt_pending_reset=false;
 	SB_MDTSEL = 0x00000000;

core/hw/naomi/naomi.cpp

@@ -549,10 +549,12 @@ void naomi_reg_Term()
 	}
 	#endif
 }
-void naomi_reg_Reset(bool Manual)
+void naomi_reg_Reset(bool hard)
 {
 	sb_rio_register(SB_GDST_addr, RIO_WF, 0, &Naomi_DmaStart);
 	sb_rio_register(SB_GDEN_addr, RIO_WF, 0, &Naomi_DmaEnable);
+	SB_GDST = 0;
+	SB_GDEN = 0;
 
 	NaomiDataRead = false;
 	aw_ram_test_skipped = false;

core/hw/pvr/drkPvr.cpp

@@ -24,10 +24,10 @@ void libPvr_LockedBlockWrite (vram_block* block,u32 addr)
 }
 
 
-void libPvr_Reset(bool Manual)
+void libPvr_Reset(bool hard)
 {
-	Regs_Reset(Manual);
-	spg_Reset(Manual);
+	Regs_Reset(hard);
+	spg_Reset(hard);
 }
 
 s32 libPvr_Init()

core/hw/pvr/pvr_regs.cpp

@@ -118,8 +118,10 @@ void pvr_WriteReg(u32 paddr,u32 data)
 	PvrReg(addr,u32)=data;
 }
 
-void Regs_Reset(bool Manual)
+void Regs_Reset(bool hard)
 {
+	if (hard)
+		memset(&pvr_regs[0], 0, sizeof(pvr_regs));
 	ID                  = 0x17FD11DB;
 	REVISION            = 0x00000011;
 	SOFTRESET           = 0x00000007;

core/hw/pvr/pvr_sb_regs.cpp

@@ -144,6 +144,6 @@ void pvr_sb_Term()
 {
 }
 //Reset -> Reset - Initialise
-void pvr_sb_Reset(bool Manual)
+void pvr_sb_Reset(bool hard)
 {
 }

core/hw/pvr/spg.cpp

@@ -286,7 +286,7 @@ void spg_Term()
 {
 }
 
-void spg_Reset(bool Manual)
+void spg_Reset(bool hard)
 {
 	CalculateSync();
 }

core/hw/sh4/dyna/driver.cpp

@@ -504,9 +504,9 @@ void recSh4_Skip()
 	Sh4_int_Skip();
 }
 
-void recSh4_Reset(bool Manual)
+void recSh4_Reset(bool hard)
 {
-	Sh4_int_Reset(Manual);
+	Sh4_int_Reset(hard);
 	recSh4_ClearCache();
 	bm_Reset();
 }

core/hw/sh4/interpr/sh4_interpreter.cpp

@@ -124,7 +124,7 @@ void Sh4_int_Skip()
 	}
 }
 
-void Sh4_int_Reset(bool Manual)
+void Sh4_int_Reset(bool hard)
 {
 	if (sh4_int_bCpuRun)
 	{

core/hw/sh4/modules/serial.cpp

@@ -138,7 +138,7 @@ void serial_reset()
 	*/
 	SCIF_SCSMR2.full=0x0000;
 	SCIF_SCBRR2=0xFF;
-	SCIF_SCFSR2.full=0x000;
+	SCIF_SCFSR2.full=0x060;
 	SCIF_SCFCR2.full=0x000;
 	SCIF_SCFDR2.full=0x000;
 	SCIF_SCSPTR2.full=0x000;

core/hw/sh4/sh4_if.h

@@ -218,7 +218,7 @@ typedef void StopFP();
 typedef void StartFP();
 typedef void StepFP();
 typedef void SkipFP();
-typedef void ResetFP(bool Manual);
+typedef void ResetFP(bool hard);
 typedef void InitFP();
 typedef void TermFP();
 typedef bool IsCpuRunningFP();

core/hw/sh4/sh4_interpreter.h

@@ -44,7 +44,7 @@ void Sh4_int_Stop();
 void Sh4_int_Start();
 void Sh4_int_Step();
 void Sh4_int_Skip();
-void Sh4_int_Reset(bool Manual);
+void Sh4_int_Reset(bool hard);
 void Sh4_int_Init();
 void Sh4_int_Term();
 bool Sh4_int_IsCpuRunning();

core/hw/sh4/sh4_interrupts.cpp

@@ -20,7 +20,7 @@
 */
 
 //these are fixed
-u16 IRLPriority=0x0246;
+/* TODO const */ u16 IRLPriority=0x0246;
 #define IRLP9 &IRLPriority,0
 #define IRLP11 &IRLPriority,4
 #define IRLP13 &IRLPriority,8
@@ -31,7 +31,7 @@ u16 IRLPriority=0x0246;
 
 struct InterptSourceList_Entry
 {
-	u16* PrioReg;
+	const u16* PrioReg;
 	u32 Shift;
 	u32 IntEvnCode;
 

core/hw/sh4/sh4_mem.cpp

@@ -193,17 +193,17 @@ void mem_Init()
 }
 
 //Reset Sysmem/Regs -- Pvr is not changed , bios/flash are not zeroed out
-void mem_Reset(bool Manual)
+void mem_Reset(bool hard)
 {
 	//mem is reseted on hard restart(power on) , not manual...
-	if (!Manual)
+	if (hard)
 	{
 		//fill mem w/ 0's
 		mem_b.Zero();
 	}
 
 	//Reset registers
-	sh4_area0_Reset(Manual);
+	sh4_area0_Reset(hard);
 	sh4_mmr_reset();
 	MMU_reset();
 }

core/imgread/ImgReader.cpp

@@ -61,8 +61,8 @@ void EXPORT_CALL handle_SwitchDisc(u32 id,void* w,void* p)
 	//new disc is in
 }
 */
-//It's supposed to reset everything (if not a manual reset)
-void libGDR_Reset(bool Manual)
+//It's supposed to reset everything (if not a soft reset)
+void libGDR_Reset(bool hard)
 {
 	libCore_gdrom_disc_change();
 }

core/nullDC.cpp

@@ -120,13 +120,13 @@ void plugins_Term()
 	libPvr_Term();
 }
 
-void plugins_Reset(bool Manual)
+void plugins_Reset(bool hard)
 {
 	reios_reset();
-	libPvr_Reset(Manual);
-	libGDR_Reset(Manual);
-	libAICA_Reset(Manual);
-	libARM_Reset(Manual);
+	libPvr_Reset(hard);
+	libGDR_Reset(hard);
+	libAICA_Reset(hard);
+	libARM_Reset(hard);
 	//libExtDevice_Reset(Manual);
 }
 
@@ -306,12 +306,12 @@ void LoadSpecialSettings()
 	}
 }
 
-void dc_reset(bool manual)
+void dc_reset(bool hard)
 {
-	plugins_Reset(manual);
-	mem_Reset(manual);
+	plugins_Reset(hard);
+	mem_Reset(hard);
 
-	sh4_cpu.Reset(manual);
+	sh4_cpu.Reset(hard);
 }
 
 static bool reset_requested;
@@ -366,7 +366,6 @@ void set_platform(int platform)
 	switch (platform)
 	{
 	case DC_PLATFORM_DREAMCAST:
-		printf("Starting Dreamcast game\n");
 		settings.platform.ram_size = 16 * 1024 * 1024;
 		settings.platform.vram_size = 8 * 1024 * 1024;
 		settings.platform.aram_size = 2 * 1024 * 1024;
@@ -375,7 +374,6 @@ void set_platform(int platform)
 		settings.platform.bbsram_size = 0;
 		break;
 	case DC_PLATFORM_NAOMI:
-		printf("Starting Naomi game\n");
 		settings.platform.ram_size = 32 * 1024 * 1024;
 		settings.platform.vram_size = 16 * 1024 * 1024;
 		settings.platform.aram_size = 8 * 1024 * 1024;
@@ -384,7 +382,6 @@ void set_platform(int platform)
 		settings.platform.bbsram_size = 32 * 1024;
 		break;
 	case DC_PLATFORM_ATOMISWAVE:
-		printf("Starting Atomiswave game\n");
 		settings.platform.ram_size = 16 * 1024 * 1024;
 		settings.platform.vram_size = 8 * 1024 * 1024;
 		settings.platform.aram_size = 8 * 1024 * 1024;