Originally ported from nullDC to libretro in commits: 2fa562db1b46c52b663b3dd4bb33a64907357458 f8eb58ac16a9e5adf662b99be5d00729264808e0 Modified for use w/ reicast per-game configuration
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@ -178,6 +178,28 @@ void aica_Term()
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}
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s32 aica_pending_dma = 0;
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void aica_periodical(u32 cycl)
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{
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if (aica_pending_dma > 0)
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{
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verify(SB_ADST==1);
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cycl = (aica_pending_dma <= 0) ? 0 : cycl;
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aica_pending_dma-=cycl;
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if (aica_pending_dma <= 0)
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{
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//log("%u %d\n",cycl,(s32)aica_pending_dma);
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asic_RaiseInterrupt(holly_SPU_DMA);
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aica_pending_dma = 0;
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SB_ADST=0;
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}
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}
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}
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void Write_SB_ADST(u32 addr, u32 data)
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{
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//0x005F7800 SB_ADSTAG RW AICA:G2-DMA G2 start address
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@ -196,6 +218,8 @@ void Write_SB_ADST(u32 addr, u32 data)
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u32 src=SB_ADSTAR;
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u32 dst=SB_ADSTAG;
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u32 len=SB_ADLEN & 0x7FFFFFFF;
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u32 total_bytes=0;
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if ((SB_ADDIR&1)==1)
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{
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@ -221,11 +245,14 @@ void Write_SB_ADST(u32 addr, u32 data)
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SB_ADSTAR+=len;
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SB_ADSTAG+=len;
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SB_ADST = 0x00000000;//dma done
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SB_ADLEN = 0x00000000;
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asic_RaiseInterrupt(holly_SPU_DMA);
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total_bytes+=len;
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SB_ADST = settings.aica.InterruptHack ? 1 : 0x00000000;//dma done
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SB_ADLEN = 0x00000000;
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aica_pending_dma = ((total_bytes * 200000000) / 65536) + 1;
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if (!settings.aica.InterruptHack)
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asic_RaiseInterruptWait(holly_SPU_DMA);
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}
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}
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}
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@ -279,7 +306,7 @@ void Write_SB_E1ST(u32 addr, u32 data)
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SB_E1LEN = 0x00000000;
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asic_RaiseInterrupt(holly_EXT_DMA1);
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asic_RaiseInterruptWait(holly_EXT_DMA1);
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}
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}
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}
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@ -274,7 +274,7 @@ void gd_set_state(gd_states state)
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GDStatus.DRQ=1;
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GDStatus.BSY=0;
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//(4) INTRQ is set, and a host interrupt is issued.
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asic_RaiseInterrupt(holly_GDROM_CMD);
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asic_RaiseInterruptWait(holly_GDROM_CMD);
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/*
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The number of bytes normally is the byte number in the register at the time of receiving
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the command, but it may also be the total of several devices handled by the buffer at that point.
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@ -332,7 +332,7 @@ void gd_set_state(gd_states state)
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GDStatus.DRQ=0;
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GDStatus.BSY=0;
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//Make INTRQ valid
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asic_RaiseInterrupt(holly_GDROM_CMD);
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asic_RaiseInterruptWait(holly_GDROM_CMD);
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//command finished !
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gd_set_state(gds_waitcmd);
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@ -477,7 +477,7 @@ void gd_process_ata_cmd()
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GDStatus.BSY=0;
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GDStatus.CHECK=1;
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asic_RaiseInterrupt(holly_GDROM_CMD);
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asic_RaiseInterruptWait(holly_GDROM_CMD);
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gd_set_state(gds_waitcmd);
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break;
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@ -516,7 +516,7 @@ void gd_process_ata_cmd()
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GDStatus.DSC=0;
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GDStatus.DF=0;
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GDStatus.CHECK=0;
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asic_RaiseInterrupt(holly_GDROM_CMD); //???
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asic_RaiseInterruptWait(holly_GDROM_CMD); //???
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gd_set_state(gds_waitcmd);
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break;
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@ -1155,7 +1155,7 @@ int GDRomschd(int i, int c, int j)
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//printf("Streamed GDMA end - %d bytes transferred\n",SB_GDLEND);
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SB_GDST=0;//done
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// The DMA end interrupt flag
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asic_RaiseInterrupt(holly_GDROM_DMA);
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asic_RaiseInterruptWait(holly_GDROM_DMA);
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}
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//Read ALL sectors
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if (read_params.remaining_sectors==0)
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@ -72,21 +72,60 @@ void RaiseAsicErr(HollyInterruptID inter)
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asic_RL6Pending();
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}
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static void asic_RaiseInterruptInternal(HollyInterruptID inter)
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{
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u8 m=inter>>8;
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switch(m)
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{
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case 0:
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RaiseAsicNormal(inter);
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break;
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case 1:
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RaiseAsicExt(inter);
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break;
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case 2:
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RaiseAsicErr(inter);
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break;
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}
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}
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static HollyInterruptID dmatmp1;
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static HollyInterruptID dmatmp2;
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static HollyInterruptID OldDmaId;
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void asic_RaiseInterrupt(HollyInterruptID inter)
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{
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u8 m=inter>>8;
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switch(m)
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{
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case 0:
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RaiseAsicNormal(inter);
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break;
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case 1:
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RaiseAsicExt(inter);
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break;
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case 2:
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RaiseAsicErr(inter);
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break;
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}
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asic_RaiseInterruptInternal(inter);
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}
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void asic_RaiseInterruptWait(HollyInterruptID inter)
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{
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#if 0
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/* IRQ wait slots are here. This is a hack.
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* Up until now, more than 3 and less than 2 wait slots
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* break stuff.
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*
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* Currently using 2 wait slots. */
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OldDmaId = dmatmp2;
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dmatmp2 = dmatmp1;
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dmatmp1 = inter;
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switch (OldDmaId)
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{
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case holly_CH2_DMA:
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case holly_EXT_DMA1:
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case holly_GDROM_CMD:
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case holly_MAPLE_DMA:
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case holly_YUV_DMA:
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case holly_PVR_DMA:
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case holly_PVR_SortDMA:
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case holly_SPU_DMA:
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asic_RaiseInterruptInternal(OldDmaId);
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break;
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}
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#else
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asic_RaiseInterruptInternal(inter);
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#endif
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}
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u32 Read_SB_ISTNRM(u32 addr)
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@ -2,6 +2,7 @@
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#include "types.h"
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void asic_RaiseInterrupt(HollyInterruptID inter);
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void asic_RaiseInterruptWait(HollyInterruptID inter);
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void asic_CancelInterrupt(HollyInterruptID inter);
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//Init/Res/Term for regs
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@ -187,7 +187,7 @@ int maple_schd(int tag, int c, int j)
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if (SB_MDEN&1)
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{
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SB_MDST=0;
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asic_RaiseInterrupt(holly_MAPLE_DMA);
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asic_RaiseInterruptWait(holly_MAPLE_DMA);
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}
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else
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{
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@ -152,7 +152,7 @@ INLINE void YUV_ConvertMacroBlock(u8* datap)
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{
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YUV_init();
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asic_RaiseInterrupt(holly_YUV_DMA);
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asic_RaiseInterruptWait(holly_YUV_DMA);
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}
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}
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void YUV_data(u32* data , u32 count)
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@ -68,7 +68,7 @@ void do_pvr_dma()
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SB_PDST = 0x00000000;
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//TODO : *CHECKME* is that ok here ? the docs don't say here it's used [PVR-DMA , bit 11]
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asic_RaiseInterrupt(holly_PVR_DMA);
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asic_RaiseInterruptWait(holly_PVR_DMA);
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}
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void RegWrite_SB_PDST(u32 addr, u32 data)
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{
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@ -122,7 +122,7 @@ void pvr_do_sort_dma()
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// End of DMA :)
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SB_SDST=0;
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asic_RaiseInterrupt(holly_PVR_SortDMA);
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asic_RaiseInterruptWait(holly_PVR_SortDMA);
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}
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// Auto sort DMA :|
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void RegWrite_SB_SDST(u32 addr, u32 data)
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@ -201,6 +201,8 @@ int AicaUpdate(int tag, int c, int j)
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//static int aica_sample_cycles=0;
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//aica_sample_cycles+=14336*AICA_SAMPLE_GCM;
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extern void aica_periodical(u32 cycl);
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//if (aica_sample_cycles>=AICA_SAMPLE_CYCLES)
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{
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@ -209,6 +211,9 @@ int AicaUpdate(int tag, int c, int j)
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//aica_sample_cycles-=AICA_SAMPLE_CYCLES;
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}
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if (settings.aica.InterruptHack)
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aica_periodical(3584);
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return AICA_TICK;
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}
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@ -135,7 +135,7 @@ void DMAC_Ch2St()
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// The DMA end interrupt flag (SB_ISTNRM - bit 19: DTDE2INT) is set to "1."
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//-> fixed , holly_PVR_DMA is for different use now (fixed the interrupts enum too)
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asic_RaiseInterrupt(holly_CH2_DMA);
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asic_RaiseInterruptWait(holly_CH2_DMA);
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}
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//on demand data transfer
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@ -260,6 +260,7 @@ void LoadSettings()
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settings.aica.LimitFPS = cfgLoadInt("config","aica.LimitFPS",1);
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settings.aica.NoBatch = cfgLoadInt("config","aica.NoBatch",0);
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settings.aica.NoSound = cfgLoadInt("config","aica.NoSound",0);
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settings.aica.InterruptHack = cfgLoadInt("config","aica.InterruptHack",0);
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settings.rend.UseMipmaps = cfgLoadInt("config","rend.UseMipmaps",1);
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settings.rend.WideScreen = cfgLoadInt("config","rend.WideScreen",0);
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settings.rend.ModifierVolumes = cfgLoadInt("config","rend.ModifierVolumes",1);
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@ -317,6 +318,7 @@ void LoadCustom()
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settings.dynarec.idleskip = cfgGameInt(reios_id,"Dynarec.idleskip", settings.dynarec.idleskip ? 1 : 0) != 0;
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settings.dynarec.unstable_opt = cfgGameInt(reios_id,"Dynarec.unstable-opt", settings.dynarec.unstable_opt);
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settings.dynarec.safemode = cfgGameInt(reios_id,"Dynarec.safemode", settings.dynarec.safemode);
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settings.aica.InterruptHack = cfgLoadInt(reios_id,"aica.InterruptHack", settings.aica.InterruptHack);
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settings.rend.ModifierVolumes = cfgGameInt(reios_id,"rend.ModifierVolumes", settings.rend.ModifierVolumes);
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settings.rend.Clipping = cfgGameInt(reios_id,"rend.Clipping", settings.rend.Clipping);
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@ -652,7 +652,8 @@ struct settings_t
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u32 GlobalMute;
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u32 DSPEnabled; //0 -> no, 1 -> yes
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u32 NoBatch;
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u32 NoSound; //0 ->sound, 1 -> no sound
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u32 NoSound; //0 ->sound, 1 -> no sound
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u32 InterruptHack;
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} aica;
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#if USE_OMX
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