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sh4/mmu: Typo fixes, less log spam

This commit is contained in:
Stefanos Kornilios Mitsis Poiitidis 2015-09-17 21:31:25 +02:00
parent 4a060b5635
commit d99c803a0c
6 changed files with 13 additions and 9 deletions
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4
core/hw/sh4/interpr/sh4_interpreter.cpp
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@ -58,7 +58,7 @@ void Sh4_int_Run()
UpdateSystem_INTC();
}
catch (SH4ThrownException ex) {
Do_Exeption(ex.epc, ex.expEvn, ex.callVect);
Do_Exception(ex.epc, ex.expEvn, ex.callVect);
l -= CPU_RATIO * 5;
}
#if !defined(TARGET_BOUNDED_EXECUTION)
@ -150,7 +150,7 @@ void ExecuteDelayslot()
}
catch (SH4ThrownException ex) {
ex.epc -= 2;
printf("Delay slot exception\n");
//printf("Delay slot exception\n");
throw ex;
}
}

4
core/hw/sh4/interpr/sh4_opcodes.cpp
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@ -1030,7 +1030,7 @@ sh4op(i1100_0011_iiii_iiii)
{
//printf("trapa 0x%X\n",(GetImm8(op) << 2));
CCN_TRA = (GetImm8(op) << 2);
Do_Exeption(next_pc,0x160,0x100);
Do_Exception(next_pc,0x160,0x100);
}
//jmp @<REG_N>
@ -1226,7 +1226,7 @@ sh4op(i0000_0000_0000_1001)
//ldtlb
sh4op(i0000_0000_0011_1000)
{
printf("ldtlb %d/%d\n",CCN_MMUCR.URC,CCN_MMUCR.URB);
//printf("ldtlb %d/%d\n",CCN_MMUCR.URC,CCN_MMUCR.URB);
UTLB[CCN_MMUCR.URC].Data=CCN_PTEL;
UTLB[CCN_MMUCR.URC].Address=CCN_PTEH;

2
core/hw/sh4/sh4_core.h
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@ -101,7 +101,7 @@ void SetFloatStatusReg();
bool Do_Interrupt(u32 intEvn);
bool Do_Exeption(u32 epc, u32 expEvn, u32 CallVect);
bool Do_Exception(u32 epc, u32 expEvn, u32 CallVect);
struct SH4ThrownException {
u32 epc;

5
core/hw/sh4/sh4_interrupts.cpp
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@ -49,7 +49,7 @@ DECL_ALIGN(64) u32 InterruptBit[32] = { 0 };
DECL_ALIGN(64) u32 InterruptLevelBit[16] = { 0 };
bool Do_Interrupt(u32 intEvn);
bool Do_Exeption(u32 epc, u32 expEvn, u32 CallVect);
bool Do_Exception(u32 epc, u32 expEvn, u32 CallVect);
u32 interrupt_vpend; // Vector of pending interrupts
u32 interrupt_vmask; // Vector of masked interrupts (-1 inhibits all interrupts)
@ -158,8 +158,9 @@ bool Do_Interrupt(u32 intEvn)
return true;
}
bool Do_Exeption(u32 epc, u32 expEvn, u32 CallVect)
bool Do_Exception(u32 epc, u32 expEvn, u32 CallVect)
{
verify(sr.BL == 0);
CCN_EXPEVT = expEvn;
ssr = sr.GetFull();

2
core/hw/sh4/sh4_interrupts.h
View File

@ -111,7 +111,7 @@ void ResetInterruptMask(InterruptID intr);
int UpdateINTC();
//extern u32 interrupt_pend; //nonzero if there are pending interrupts
bool Do_Exeption(u32 lvl, u32 expEvn, u32 CallVect);
bool Do_Exception(u32 lvl, u32 expEvn, u32 CallVect);

5
core/hw/sh4/sh4_mmr.cpp
View File

@ -345,7 +345,10 @@ void DYNACALL WriteMem_P4(u32 addr,T data)
{
if (addr&0x80)
{
printf("Unhandled p4 Write [Unified TLB address array, Associative Write] 0x%x = %x\n",addr,data);
#ifdef NO_MMU
printf("Unhandled p4 Write [Unified TLB address array, Associative Write] 0x%x = %x\n",addr,data);
#endif
CCN_PTEH_type t;
t.reg_data=data;