Commit Graph

6460 Commits

Author SHA1 Message Date
Squall Leonhart fc23fca43e
[RDB]Set SGB Emulator to 8MB (#2440)
since the defaults for rdram changed between 6058 and 6059, i had not accounted for this emulator rom actually needing 8MB
2024-10-03 22:20:51 +09:30
Tomas Mejia edc54c425f
Fix spelling and clarity issues in CONTRIBUTING.md (#2438)
* Fix spelling and clarity issues in CONTRIBUTING.md

Reword in a few places for clarity without changing the original meaning.
Fix typos in words like "sensible" and "ensure."
Fix numbering (skipped from 5 to 7).

* Update CONTRIBUTING.md

Add newline to end of file
2024-10-03 21:40:53 +09:30
zilmar 30090e5db7 Core: in CX86Ops::CX86Ops set setLogger to nullptr if not logging 2024-10-03 16:22:42 +09:30
zilmar 9e53b161a4 Cote Update PeripheralInterfaceHandler::PI_DMA_WRITE to handle misaligned, end of page test 2024-10-03 14:38:04 +09:30
zilmar 08e1b3b39b fix up clang formatting 2024-09-26 18:54:54 +09:30
zilmar 62bf10e505 Core: Have fpu ops check the input of fs and ft at the same time 2024-09-26 16:38:25 +09:30
zilmar dc4fa211b0 Core: Clean up RDRAM/RI Registers 2024-09-26 12:59:32 +09:30
zilmar 544d6ba1b9 Core: Normalize Path for RomList_RomListCache 2024-09-26 07:30:26 +09:30
zilmar cd9fc5984a RSP: Make sure m_SyncSystem is valid before checking m_SyncSystem->m_BaseSystem on shutdown 2024-09-26 06:50:48 +09:30
zilmar 7cb0c258a1 GLideN64: Slight clean up of project file 2024-09-19 12:16:46 +09:30
zilmar c098a6a464 RSP: Be able to compile sections based off tasks 2024-09-19 12:15:11 +09:30
zilmar 3340c032c3 RSP: Move CompilePC into RspRecompilerCPU 2024-09-19 08:31:28 +09:30
zilmar df9b04bb5b RSP: Change RunInterpreterCPU to ExecuteOps 2024-09-12 15:13:45 +09:30
zilmar 07e8f8b830 Gliden64: Get the new GlideN64 submodule to build as part of the normal build process 2024-09-12 09:44:38 +09:30
zilmar 02e816b9d4 Update package_zip.cmd to deal with platform in path 2024-09-05 19:22:25 +09:30
zilmar ea199c5546 Update installer to have new binary path 2024-09-05 18:50:47 +09:30
zilmar aaa6fc8082 Core: Add $(Platform) to the output directory 2024-09-05 17:54:58 +09:30
zilmar 00a92871c0 Gliden64: Add as a submodule 2024-09-05 11:17:26 +09:30
zilmar eb985de132 RSP: Start to add CPU style HLE 2024-08-29 15:37:52 +09:30
zilmar 5eac210197 RSP: Start to have a RSP Settings class 2024-08-29 11:26:53 +09:30
zilmar 96080bfdd2 RSP: change CRSPSystem::m_Recompiler from a pointer to a member and initialize it at creation of system 2024-08-29 07:49:40 +09:30
zilmar 2b7975280e RSP: Have NextInstruction and JumpTo members of RSP System instead of a global variable 2024-08-22 19:44:07 +09:30
zilmar 29c49a2063 RSP: Remove PrgCount as a global 2024-08-22 17:32:05 +09:30
zilmar d9ae43b69d RSP: have RSPRegisterHandlerPlugin as part of RSP System instead of a global 2024-08-22 16:30:20 +09:30
zilmar 4681f07bf8 RSP: Move rdp logging in to it's own class 2024-08-15 13:43:56 +09:30
zilmar 6ed1c3edfb RSP: internalize RSP information in to interpter ops 2024-08-15 07:36:53 +09:30
zilmar 9f98f4d4cd Rsp: Change RSPOpC to be a class member 2024-08-08 12:55:54 +09:30
zilmar 762d1b1566 RSP: Create CRSPRecompiler 2024-08-08 09:39:45 +09:30
zilmar f7ab608976 RSP: Create CRSPRegisters 2024-08-08 07:26:15 +09:30
zilmar 1924030266 RSP: Move compile functions into CRSPRecompilerOps 2024-08-02 22:00:01 +09:30
zilmar 2904d3641d RSP: Create RSP system class and move all interpter ops in to RSPOp class 2024-08-02 09:00:38 +09:30
zilmar dab432e7bd RSP: clean up LDV 2024-07-20 19:10:36 +09:30
zilmar 9d7b391487 RSP: Fix up LSV in the recompiler 2024-07-20 17:09:41 +09:30
zilmar 7c2655c544 RSP: Remove some unused functions and turn Reordering and Sections off by default 2024-07-20 17:08:20 +09:30
zilmar 6816ff4435 RSP: Disable a lot of ops that are not functioning correctly in the recompiler 2024-07-20 17:05:11 +09:30
zilmar 13fb8cd2da RSP: In Compile_Opcode_SQV Cheat the op instead of causing an unknown opcode 2024-07-12 15:23:59 +09:30
zilmar 564926163c RSP: in Compile_Opcode_SSV cheat the op instead of generating an unknown opcode 2024-07-12 15:07:23 +09:30
zilmar 8c6856f1c8 RSP: Have Compile_SW handle DMEM overflow better 2024-07-12 15:04:18 +09:30
zilmar 6e4852fc78 RSP: have Compile_LW handle DMEM overflow better 2024-07-12 15:02:46 +09:30
zilmar e43d697476 RSP: Handle lwu inside IsRegisterConstant 2024-07-12 15:01:05 +09:30
zilmar 7b013c3deb RSP: Reset secondary buffer to start on ResetJumpTables 2024-07-12 14:59:16 +09:30
zilmar e2243fe8eb RSP: Make sure RSP block ends with a ret 2024-07-06 19:36:10 +09:30
zilmar 9b38977b31 RSP: Fix up recompiler jumps JAL, BLTZAL, BGEZAL 2024-07-06 19:33:10 +09:30
zilmar 4125774be8 RSP: Add Vector_VRNDN and fix up compile jump table 2024-07-06 19:08:20 +09:30
zilmar 2a149beb69 RSP: Clean up #ifdef in Recompiler 2024-07-06 19:04:50 +09:30
zilmar 38599b79fe RSP: Compile_Cop2_MF check for write to r0 2024-07-06 18:53:19 +09:30
zilmar 1af8570315 RSP: Set max log size as 300mb 2024-07-06 18:51:55 +09:30
zilmar 0e0f0f7618 RSP: JALR update rd after updating the PC 2024-06-27 16:57:31 +09:30
zilmar 06eea03d7d RSP: DelaySlotAffectBranch should clamp PC 2024-06-27 16:34:19 +09:30
zilmar 661ec98bb3 RSP: User crc32 for crc of imem 2024-06-27 16:25:13 +09:30