RSP: Change RunInterpreterCPU to ExecuteOps

This commit is contained in:
zilmar 2024-09-12 15:13:45 +09:30
parent 07e8f8b830
commit df9b04bb5b
3 changed files with 12 additions and 7 deletions

View File

@ -113,7 +113,7 @@ uint32_t DoRspCycles(uint32_t Cycles)
break;
case RSPCpuMethod::Interpreter:
case RSPCpuMethod::HighLevelEmulation:
RSPSystem.RunInterpreterCPU(Cycles);
RSPSystem.ExecuteOps((uint32_t)-1, (uint32_t)-1);
break;
}
if (g_RSPDebugger != nullptr)

View File

@ -107,26 +107,32 @@ void CRSPSystem::RunRecompiler(void)
m_Recompiler.RunCPU();
}
uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
void CRSPSystem::ExecuteOps(uint32_t Cycles, uint32_t TargetPC)
{
uint32_t CycleCount;
RSP_Running = true;
if (g_RSPDebugger != nullptr)
{
g_RSPDebugger->StartingCPU();
}
CycleCount = 0;
uint32_t & GprR0 = m_Reg.m_GPR[0].UW;
uint32_t & ProgramCounter = *m_SP_PC_REG;
while (RSP_Running)
while (RSP_Running && Cycles > 0)
{
if (g_RSPDebugger != nullptr)
{
g_RSPDebugger->BeforeExecuteOp();
}
if (TargetPC != -1 && (ProgramCounter & 0xFFC) == TargetPC)
{
break;
}
m_OpCode.Value = *(uint32_t *)(m_IMEM + (ProgramCounter & 0xFFC));
(m_Op.*(m_Op.Jump_Opcode[m_OpCode.op]))();
GprR0 = 0x00000000; // MIPS $zero hard-wired to 0
if (Cycles != (uint32_t)-1)
{
Cycles -= 1;
}
switch (m_NextInstruction)
{
@ -152,5 +158,4 @@ uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
break;
}
}
return Cycles;
}

View File

@ -33,7 +33,7 @@ public:
void RomClosed(void);
void RunRecompiler(void);
uint32_t RunInterpreterCPU(uint32_t Cycles);
void ExecuteOps(uint32_t Cycles, uint32_t TargetPC);
private:
CRSPSystem(const CRSPSystem &);