Rsp: Change RSPOpC to be a class member
This commit is contained in:
parent
762d1b1566
commit
9f98f4d4cd
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@ -41,7 +41,8 @@ p_Recompfunc RSP_Recomp_Lc2[32];
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p_Recompfunc RSP_Recomp_Sc2[32];
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CRSPRecompiler::CRSPRecompiler(CRSPSystem & System) :
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m_System(System)
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m_System(System),
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m_OpCode(System.m_OpCode)
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{
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}
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@ -871,7 +872,7 @@ void CRSPRecompiler::CompilerRSPBlock(void)
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CPU_Message("X86 Address: %08X", RecompPos);
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}
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#endif
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RSP_LW_IMEM(CompilePC, &RSPOpC.Value);
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RSP_LW_IMEM(CompilePC, &m_OpCode.Value);
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if (LogRDP && NextInstruction != RSPPIPELINE_DELAY_SLOT_DONE)
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{
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@ -882,14 +883,14 @@ void CRSPRecompiler::CompilerRSPBlock(void)
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AddConstToX86Reg(x86_ESP, 4);
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}
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if (RSPOpC.Value == 0xFFFFFFFF)
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if (m_OpCode.Value == 0xFFFFFFFF)
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{
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// I think this pops up an unknown OP dialog
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// NextInstruction = RSPPIPELINE_FINISH_BLOCK;
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}
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else
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{
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(RecompilerOps.*RSP_Recomp_Opcode[RSPOpC.op])();
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(RecompilerOps.*RSP_Recomp_Opcode[m_OpCode.op])();
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}
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switch (NextInstruction)
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@ -40,6 +40,7 @@ private:
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void ReOrderSubBlock(RSP_BLOCK * Block);
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CRSPSystem & m_System;
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RSPOpcode & m_OpCode;
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RSP_BLOCK m_CurrentBlock;
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};
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File diff suppressed because it is too large
Load Diff
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@ -204,6 +204,7 @@ private:
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CRSPSystem & m_System;
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CRSPRegisters & m_Reg;
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CRSPRecompiler & m_Recompiler;
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RSPOpcode & m_OpCode;
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UWORD32 * m_GPR;
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UDWORD * m_ACCUM;
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UWORD32 * m_Flags;
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@ -23,7 +23,7 @@ void CRSPRecompilerOps::RSP_Sections_VMUDH(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// Load source registers
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sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
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@ -91,7 +91,7 @@ void CRSPRecompilerOps::RSP_Sections_VMADH(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// Load source registers
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sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
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@ -164,7 +164,7 @@ void CRSPRecompilerOps::RSP_Sections_VMUDL(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// Load source registers
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sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
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@ -210,7 +210,7 @@ void CRSPRecompilerOps::RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// VMUDN
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if (AccumStyle != Middle16BitAccum)
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@ -259,14 +259,14 @@ void CRSPRecompilerOps::RSP_Sections_VMUDN(RSPOpcode RspOp, uint32_t AccumStyle)
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sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
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MmxMoveQwordVariableToReg(x86_MM5, &m_Vect[RspOp.rd].s16(4), Reg);
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if ((RSPOpC.rs & 0xF) < 2)
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if ((m_OpCode.rs & 0xF) < 2)
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{
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sprintf(Reg, "m_Vect[%i].UHW[0]", RSPOpC.rt);
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MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[RSPOpC.vt].u16(0), Reg);
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sprintf(Reg, "m_Vect[%i].UHW[4]", RSPOpC.rt);
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MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[RSPOpC.vt].u16(4), Reg);
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sprintf(Reg, "m_Vect[%i].UHW[0]", m_OpCode.rt);
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MmxMoveQwordVariableToReg(x86_MM0, &m_Vect[m_OpCode.vt].u16(0), Reg);
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sprintf(Reg, "m_Vect[%i].UHW[4]", m_OpCode.rt);
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MmxMoveQwordVariableToReg(x86_MM1, &m_Vect[m_OpCode.vt].u16(4), Reg);
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}
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else if ((RSPOpC.rs & 0xF) >= 8)
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else if ((m_OpCode.rs & 0xF) >= 8)
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{
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RSP_Element2Mmx(x86_MM0);
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MmxMoveRegToReg(x86_MM1, x86_MM0);
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@ -307,7 +307,7 @@ void CRSPRecompilerOps::RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// VMADN
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if (AccumStyle != Middle16BitAccum)
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@ -355,14 +355,14 @@ void CRSPRecompilerOps::RSP_Sections_VMADN(RSPOpcode RspOp, uint32_t AccumStyle)
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sprintf(Reg, "m_Vect[%i].HW[4]", RspOp.rd);
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MmxMoveQwordVariableToReg(x86_MM5 + 2, &m_Vect[RspOp.rd].s16(4), Reg);
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if ((RSPOpC.rs & 0xF) < 2)
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if ((m_OpCode.rs & 0xF) < 2)
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{
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sprintf(Reg, "m_Vect[%i].UHW[0]", RSPOpC.rt);
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MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[RSPOpC.vt].u16(0), Reg);
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sprintf(Reg, "m_Vect[%i].UHW[4]", RSPOpC.rt);
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MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[RSPOpC.vt].u16(4), Reg);
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sprintf(Reg, "m_Vect[%i].UHW[0]", m_OpCode.rt);
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MmxMoveQwordVariableToReg(x86_MM0 + 2, &m_Vect[m_OpCode.vt].u16(0), Reg);
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sprintf(Reg, "m_Vect[%i].UHW[4]", m_OpCode.rt);
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MmxMoveQwordVariableToReg(x86_MM1 + 2, &m_Vect[m_OpCode.vt].u16(4), Reg);
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}
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else if ((RSPOpC.rs & 0xF) >= 8)
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else if ((m_OpCode.rs & 0xF) >= 8)
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{
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RSP_Element2Mmx(x86_MM0 + 2);
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MmxMoveRegToReg(x86_MM1 + 2, x86_MM0 + 2);
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@ -411,7 +411,7 @@ void CRSPRecompilerOps::RSP_Sections_VMULF(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// Load source registers
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sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
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@ -482,7 +482,7 @@ void CRSPRecompilerOps::RSP_Sections_VMACF(RSPOpcode RspOp, uint32_t AccumStyle)
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return;
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}
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RSPOpC = RspOp;
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m_OpCode = RspOp;
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// Load source registers
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sprintf(Reg, "m_Vect[%i].HW[0]", RspOp.rd);
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@ -871,15 +871,15 @@ void CRSPRecompilerOps::Compile_Section_002(void)
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// VSAWs
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vsaw = op[10];
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MmxXorRegToReg(x86_MM4, x86_MM4);
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sprintf(Reg, "m_Vect[%i].HW[0]", RSPOpC.sa);
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sprintf(Reg, "m_Vect[%i].HW[0]", m_OpCode.sa);
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MmxMoveQwordRegToVariable(x86_MM4, &m_Vect[vsaw.sa].s16(0), Reg);
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sprintf(Reg, "m_Vect[%i].HW[4]", RSPOpC.sa);
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sprintf(Reg, "m_Vect[%i].HW[4]", m_OpCode.sa);
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MmxMoveQwordRegToVariable(x86_MM4, &m_Vect[vsaw.sa].s16(4), Reg);
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vsaw = op[11];
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sprintf(Reg, "m_Vect[%i].HW[0]", RSPOpC.sa);
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sprintf(Reg, "m_Vect[%i].HW[0]", m_OpCode.sa);
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MmxMoveQwordRegToVariable(x86_MM0, &m_Vect[vsaw.sa].s16(0), Reg);
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sprintf(Reg, "m_Vect[%i].HW[4]", RSPOpC.sa);
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sprintf(Reg, "m_Vect[%i].HW[4]", m_OpCode.sa);
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MmxMoveQwordRegToVariable(x86_MM1, &m_Vect[vsaw.sa].s16(4), Reg);
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MmxEmptyMultimediaState();
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@ -12,7 +12,6 @@
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class RSPRegisterHandler;
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UDWORD EleSpec[16], Indx[16];
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RSPOpcode RSPOpC;
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uint32_t *PrgCount, NextInstruction, RSP_Running;
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void BuildRecompilerCPU(void);
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@ -14,7 +14,6 @@ enum RSPCpuType
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extern UDWORD EleSpec[16], Indx[16];
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extern uint32_t *PrgCount, RSP_Running;
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extern RSPOpcode RSPOpC;
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void SetCPU(RSPCpuType core);
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void Build_RSP(void);
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@ -8,19 +8,4 @@
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#include <Settings/Settings.h>
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RSPPIPELINE_STAGE RSP_NextInstruction;
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uint32_t RSP_JumpTo;
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unsigned int RSP_branch_if(int condition)
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{
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unsigned int new_PC;
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if (condition)
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{
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new_PC = *PrgCount + 4 + ((short)RSPOpC.offset << 2);
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}
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else
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{
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new_PC = *PrgCount + 4 + 4;
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}
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return (new_PC & 0xFFC);
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}
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uint32_t RSP_JumpTo;
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@ -17,8 +17,3 @@ enum RSPPIPELINE_STAGE
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extern RSPPIPELINE_STAGE RSP_NextInstruction;
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extern uint32_t RSP_JumpTo;
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// Standard MIPS PC-relative branch
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// Returns the new PC, based on whether the condition passes
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unsigned int RSP_branch_if(int condition);
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File diff suppressed because it is too large
Load Diff
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@ -1,4 +1,5 @@
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#pragma once
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#include <Project64-rsp-core/cpu/RSPOpcode.h>
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#include <Project64-rsp-core/cpu/RspTypes.h>
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class CRSPSystem;
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@ -167,6 +168,7 @@ private:
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// Other functions
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void UnknownOpcode(void);
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uint32_t BranchIf(bool Condition);
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typedef void (RSPOp::*Func)();
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@ -180,6 +182,7 @@ private:
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Func Jump_Sc2[32];
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CRSPSystem & m_System;
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RSPOpcode & m_OpCode;
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CRSPRegisters & m_Reg;
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UWORD32 * m_GPR;
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UDWORD * m_ACCUM;
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@ -8,7 +8,7 @@
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CRSPSystem RSPSystem;
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CRSPSystem::CRSPSystem() :
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m_OpCodes(*this)
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m_Op(*this)
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{
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}
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@ -34,8 +34,8 @@ uint32_t CRSPSystem::RunInterpreterCPU(uint32_t Cycles)
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{
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g_RSPDebugger->BeforeExecuteOp();
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}
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RSPOpC.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
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(m_OpCodes.*(m_OpCodes.Jump_Opcode[RSPOpC.op]))();
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m_OpCode.Value = *(uint32_t *)(RSPInfo.IMEM + (*PrgCount & 0xFFC));
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(m_Op.*(m_Op.Jump_Opcode[m_OpCode.op]))();
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GprR0 = 0x00000000; // MIPS $zero hard-wired to 0
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switch (RSP_NextInstruction)
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@ -1,5 +1,6 @@
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#pragma once
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#include <Project64-rsp-core/cpu/RSPInterpreterOps.h>
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#include <Project64-rsp-core/cpu/RSPRegisters.h>
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#include <Project64-rsp-core/cpu/RspTypes.h>
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#include <stdint.h>
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@ -7,6 +8,8 @@ class CRSPSystem
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{
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friend class RSPOp;
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friend class CRSPRecompilerOps;
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friend class CRSPRecompiler;
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friend class RSPDebuggerUI;
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friend void UpdateRSPRegistersScreen(void);
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public:
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@ -18,7 +21,8 @@ public:
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private:
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CRSPRegisters m_Reg;
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RSPOp m_OpCodes;
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RSPOp m_Op;
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RSPOpcode m_OpCode;
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};
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extern CRSPSystem RSPSystem;
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@ -6,12 +6,19 @@
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#include <Project64-rsp-core/cpu/RSPCpu.h>
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#include <Project64-rsp-core/cpu/RSPInstruction.h>
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#include <Project64-rsp-core/cpu/RspLog.h>
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#include <Project64-rsp-core/cpu/RspSystem.h>
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#include <Project64-rsp/RSP Command.h>
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#include <Project64-rsp/breakpoint.h>
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void UpdateRSPRegistersScreen(void);
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void RDP_LogLoc(DWORD /*PC*/);
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RSPDebuggerUI::RSPDebuggerUI(CRSPSystem & System) :
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m_System(System),
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m_OpCode(System.m_OpCode)
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{
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}
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void RSPDebuggerUI::ResetTimerList(void)
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{
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::ResetTimerList();
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@ -98,12 +105,12 @@ void RSPDebuggerUI::UnknownOpcode(void)
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if (InRSPCommandsWindow)
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{
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SetRSPCommandViewto(*RSPInfo.SP_PC_REG);
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DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*RSPInfo.SP_PC_REG, RSPOpC.Value).NameAndParam().c_str());
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DisplayError("Unhandled Opcode\n%s\n\nStopping emulation", RSPInstruction(*RSPInfo.SP_PC_REG, m_OpCode.Value).NameAndParam().c_str());
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}
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else
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{
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sprintf(Message, "Unhandled Opcode\n%s\n\nStopping emulation.\n\nWould you like to open the debugger?",
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RSPInstruction(*RSPInfo.SP_PC_REG, RSPOpC.Value).NameAndParam().c_str());
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RSPInstruction(*RSPInfo.SP_PC_REG, m_OpCode.Value).NameAndParam().c_str());
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response = MessageBoxA(NULL, Message, "Error", MB_YESNO | MB_ICONERROR);
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if (response == IDYES)
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{
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@ -1,10 +1,15 @@
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#pragma once
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#include <Project64-rsp-core\RSPDebugger.h>
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#include <Project64-rsp-core/RSPDebugger.h>
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#include <Project64-rsp-core/cpu/RSPOpcode.h>
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class CRSPSystem;
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class RSPDebuggerUI :
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public RSPDebugger
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{
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public:
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RSPDebuggerUI(CRSPSystem & System);
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void ResetTimerList(void);
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void StartingCPU(void);
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void RspCyclesStart(void);
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void BeforeExecuteOp(void);
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void UnknownOpcode(void);
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void RDP_LogMF0(uint32_t PC, uint32_t Reg);
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private:
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CRSPSystem & m_System;
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RSPOpcode & m_OpCode;
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};
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@ -31,6 +31,7 @@
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#include <Project64-rsp-core/cpu/RSPRegisters.h>
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#include <Project64-rsp-core/cpu/RspLog.h>
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#include <Project64-rsp-core/cpu/RspMemory.h>
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#include <Project64-rsp-core/cpu/RspSystem.h>
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#include <Project64-rsp-core/cpu/RspTypes.h>
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void ProcessMenuItem(int32_t ID);
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@ -257,7 +258,7 @@ Output: None
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*/
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EXPORT void InitiateRSP(RSP_INFO Rsp_Info, uint32_t * CycleCount)
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{
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g_RSPDebuggerUI.reset(new RSPDebuggerUI);
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g_RSPDebuggerUI.reset(new RSPDebuggerUI(RSPSystem));
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g_RSPDebugger = g_RSPDebuggerUI.get();
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InitilizeRSP(Rsp_Info);
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*CycleCount = 0;
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