zilmar
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f802b18cdc
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Core: Change to using fenv.h instead of including the code directly
|
2023-01-30 10:07:51 +10:30 |
zilmar
|
80aecdc5e3
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Core: Improve R4300iOp::COP1_CT
|
2023-01-02 19:49:19 +10:30 |
zilmar
|
6c154f6547
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Core: Add Cop2/Cop3 handling exception
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2022-12-12 21:29:16 +10:30 |
zilmar
|
d3afe97d38
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Core: Initialize FPR_Ctrl[Revision] to 0xA00
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2022-12-12 15:27:07 +10:30 |
zilmar
|
97e3f50007
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Core: Update mask of registers in CRegisters::Cop0_MT
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2022-11-14 20:56:21 +10:30 |
zilmar
|
b3c6858b69
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Core: Change COP0 registers to use an enum
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2022-11-07 09:24:58 +10:30 |
zilmar
|
53e00b8023
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Core: Clean up masking of COP0 registers
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2022-10-17 09:06:22 +10:30 |
zilmar
|
761a1ee52a
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Code clean up
|
2022-10-10 10:52:17 +10:30 |
zilmar
|
8391cdafde
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Core: Fix masking of context
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2022-10-03 21:48:09 +10:30 |
zilmar
|
82d9027374
|
Core: Fix up XContext
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2022-10-03 11:29:21 +10:30 |
zilmar
|
42cc34964b
|
Core: Sign extend cop0
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2022-10-03 09:34:13 +10:30 |
zilmar
|
a2981ff4d8
|
Core: Make Load/Store use 64bit vaddr
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2022-09-19 21:36:36 +09:30 |
zilmar
|
1c77f6f0fd
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Core: Make Cop0 64bit
|
2022-09-19 16:36:44 +09:30 |
zilmar
|
05d46c9487
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Core: Handle reserve instruction 31
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2022-09-19 12:12:08 +09:30 |
zilmar
|
e171adfef6
|
Core: Clean up formatting of register names
|
2022-09-05 16:47:51 +09:30 |
zilmar
|
29526583a6
|
Core: Give cop0 registers names
|
2022-09-05 16:38:30 +09:30 |
zilmar
|
18b9892bc7
|
Core: Add handling of overflow exception
|
2022-09-05 16:35:13 +09:30 |
zilmar
|
10d23486c6
|
Core: Add option to break on address exception
|
2022-08-01 10:38:12 +09:30 |
zilmar
|
f62f8207ec
|
Core: Initiate PREVID
|
2022-07-18 18:56:52 +09:30 |
zilmar
|
a249705bce
|
Core: Add CartridgeDomain2Address1Handler
|
2022-03-21 20:57:57 +10:30 |
zilmar
|
e1d3222a8a
|
Core: Move Serial interface into handler
|
2022-03-21 15:04:59 +10:30 |
zilmar
|
fcdda04da5
|
Core: Move Audio Interface code in to handler
|
2022-03-21 10:59:02 +10:30 |
zilmar
|
80d8e6edaa
|
Core: Move Video Interface code in to handler
|
2022-03-08 10:18:56 +10:30 |
zilmar
|
928dfe3a16
|
Core: Add MIPSInterfaceHandler
|
2022-03-04 22:53:30 +10:30 |
zilmar
|
390fe897a2
|
Core: Add RDRAMRegistersHandler
|
2022-02-21 19:47:14 +10:30 |
zilmar
|
2b008cc278
|
Core: Create Memory handler for SP Registers
|
2022-01-24 23:13:10 +10:30 |
zilmar
|
79b03c9ee0
|
Core: Move Peripheral Interface handling in to handler file
|
2022-01-05 08:14:03 +10:30 |
zilmar
|
eafcb96c01
|
Project64-core: Move handling of RDRam Interface Register handling to its own file
|
2022-01-04 16:11:52 +10:30 |
zilmar
|
ee864797ab
|
vgturtle127's Beautification 14 - Source\Project64-video directory and final cleanup
|
2021-05-18 21:21:36 +09:30 |
zilmar
|
c512a592a7
|
Move class out of file names
|
2021-04-14 15:04:15 +09:30 |