Connor McLaughlin
|
767e8f08e0
|
CDROM: Move pregap handling to image class
|
2019-09-26 00:15:06 +10:00 |
Connor McLaughlin
|
ba67f69c2a
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GTE: Implement NCCS/NCCT/NCDT/DPCS
|
2019-09-25 20:24:50 +10:00 |
Connor McLaughlin
|
b9b286e93d
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GPU: Fix shader compile error on Intel
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2019-09-25 20:24:19 +10:00 |
Connor McLaughlin
|
c18597c3bf
|
GTE: Implement unverified MVMVA
|
2019-09-25 15:58:33 +10:00 |
Connor McLaughlin
|
3df7b22c37
|
GTE: Fix NCDS
|
2019-09-25 15:40:08 +10:00 |
Connor McLaughlin
|
607cd4d3e4
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CDROM: Stub out Setfilter
|
2019-09-25 00:44:41 +10:00 |
Connor McLaughlin
|
9359d0778e
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Clean up memory access handlers, reduce template specializations
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2019-09-25 00:36:24 +10:00 |
Connor McLaughlin
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4aca52cdf4
|
CPU: Silence some debug spam
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2019-09-24 23:56:30 +10:00 |
Connor McLaughlin
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6aa36c2ead
|
SPU: Hook up DMA reads/writes to RAM
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2019-09-24 23:55:57 +10:00 |
Connor McLaughlin
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575a3b36f5
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CDROM: Store the image path/current lba as part of the save state
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2019-09-24 23:55:34 +10:00 |
Connor McLaughlin
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1276241622
|
SPU: Create stub needed for DMA to work
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2019-09-24 23:44:38 +10:00 |
Connor McLaughlin
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7a413b4031
|
CDROM: Proper handling of request register
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2019-09-24 21:39:38 +10:00 |
Connor McLaughlin
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4bb8fb211d
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DMA: Delay transfer/interrupt
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2019-09-24 21:39:13 +10:00 |
Connor McLaughlin
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4cc83e2228
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DMA: Implement interrupts
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2019-09-24 19:43:10 +10:00 |
Connor McLaughlin
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db777fdabb
|
CDROM: Various fixes
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2019-09-24 01:33:18 +10:00 |
Connor McLaughlin
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1f13c4ad2c
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Pad: Fix long transmit delay breaking other things
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2019-09-24 01:31:17 +10:00 |
Connor McLaughlin
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d65c9b3592
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CDROM: Read timing and demute command, seek on ReadN
|
2019-09-23 23:31:51 +10:00 |
Connor McLaughlin
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20f14688ca
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System: Support loading expansion ROMs
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2019-09-23 01:38:21 +10:00 |
Connor McLaughlin
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5d1c12c9ad
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Pad: Fix timing issues w/ BIOS
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2019-09-23 01:25:58 +10:00 |
Connor McLaughlin
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734d1a7ee1
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InterruptController: Masked interrupts are still set in the status register
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2019-09-23 01:24:36 +10:00 |
Connor McLaughlin
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fbd7fcec48
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GTE: Implement NCDS (but incorrectly)
|
2019-09-22 21:41:11 +10:00 |
Connor McLaughlin
|
f2d62fcce0
|
CDROM: Hack timings to get further with booting
|
2019-09-22 21:40:44 +10:00 |
Connor McLaughlin
|
c772047715
|
GTE: Add AVSZ3/AVSZ4
|
2019-09-22 20:38:11 +10:00 |
Connor McLaughlin
|
005b06ae0c
|
GTE: More implementation work, Reg+NCLIP+STR tests passing
|
2019-09-22 17:33:11 +10:00 |
Connor McLaughlin
|
3fb08a72a4
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CDROM: Hack around missing pregap in images
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2019-09-22 02:32:45 +10:00 |
Connor McLaughlin
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948ac50020
|
CPU: Refactoring, implement LWC/SWC
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2019-09-22 02:06:47 +10:00 |
Connor McLaughlin
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2875a22987
|
CDROM: Reads appear to be functioning
|
2019-09-22 01:12:16 +10:00 |
Connor McLaughlin
|
c988af453c
|
Refactor timing to allow sync/updates in the middle of a slice
|
2019-09-21 01:24:33 +10:00 |
Connor McLaughlin
|
ad316162f3
|
Basic timer implementation
|
2019-09-20 23:40:19 +10:00 |
Connor McLaughlin
|
ad652c47ed
|
Basic CD image loading
|
2019-09-20 20:14:00 +10:00 |
Connor McLaughlin
|
53e755aa68
|
Pad: Save state support
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2019-09-20 19:21:45 +10:00 |
Connor McLaughlin
|
8cd75a4937
|
PAD: Basic support for digital controllers
|
2019-09-20 16:47:41 +10:00 |
Connor McLaughlin
|
d84bffead1
|
GPU: Implement transparency mode
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2019-09-19 00:55:06 +10:00 |
Connor McLaughlin
|
23ef1cafbd
|
GPU: Force 16-bit precision when filling VRAM, clear mask bit
|
2019-09-18 15:54:57 +10:00 |
Connor McLaughlin
|
d8150c996b
|
GPU: Support dumping copies out to file
|
2019-09-18 15:43:25 +10:00 |
Connor McLaughlin
|
e40ac7cee1
|
dep: Add stb_image_write
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2019-09-18 15:43:03 +10:00 |
Connor McLaughlin
|
4d624946d6
|
GPU: Texpage attribute can change texture mode too
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2019-09-18 15:24:29 +10:00 |
Connor McLaughlin
|
4d4ab898c0
|
GPU: Flush rendering before VRAM->VRAM copies
|
2019-09-18 15:15:03 +10:00 |
Connor McLaughlin
|
2c07db6dd5
|
GPU: Flush rendering before VRAM reads
|
2019-09-18 15:14:31 +10:00 |
Connor McLaughlin
|
4d38213f23
|
GPU: Implement VRAM-to-VRAM copies
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2019-09-18 00:58:30 +10:00 |
Connor McLaughlin
|
ff83f15abe
|
dep: Add missing file
|
2019-09-18 00:30:26 +10:00 |
Connor McLaughlin
|
0a8bce8936
|
GPU: Hook up vblank interrupt
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2019-09-18 00:22:41 +10:00 |
Connor McLaughlin
|
a84b3d7a2b
|
CPU: Fix interrupts in branch delay slots messing up PC
|
2019-09-18 00:22:17 +10:00 |
Connor McLaughlin
|
4025d6e4a6
|
GTE: Stub and register read/write function
|
2019-09-17 23:38:04 +10:00 |
Connor McLaughlin
|
6df8d42480
|
CDROM: Add missing fields to save state
|
2019-09-17 23:04:00 +10:00 |
Connor McLaughlin
|
e3c6035152
|
CDROM: Implement get version and getstat commands
|
2019-09-17 22:18:58 +10:00 |
Connor McLaughlin
|
b951f27381
|
CDROM: Stub implementation
|
2019-09-17 21:07:56 +10:00 |
Connor McLaughlin
|
a0e7dff37c
|
common: Add a FIFOQueue helper class
|
2019-09-17 19:22:23 +10:00 |
Connor McLaughlin
|
2128a2984b
|
Add interrupt controller emulation
|
2019-09-17 16:26:00 +10:00 |
Connor McLaughlin
|
c615e007c0
|
GPU: Serialization for CRTC state
|
2019-09-17 14:40:23 +10:00 |