Connor McLaughlin
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4bb8fb211d
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DMA: Delay transfer/interrupt
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2019-09-24 21:39:13 +10:00 |
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Connor McLaughlin
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4cc83e2228
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DMA: Implement interrupts
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2019-09-24 19:43:10 +10:00 |
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Connor McLaughlin
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db777fdabb
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CDROM: Various fixes
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2019-09-24 01:33:18 +10:00 |
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Connor McLaughlin
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1f13c4ad2c
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Pad: Fix long transmit delay breaking other things
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2019-09-24 01:31:17 +10:00 |
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Connor McLaughlin
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d65c9b3592
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CDROM: Read timing and demute command, seek on ReadN
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2019-09-23 23:31:51 +10:00 |
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Connor McLaughlin
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20f14688ca
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System: Support loading expansion ROMs
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2019-09-23 01:38:21 +10:00 |
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Connor McLaughlin
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5d1c12c9ad
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Pad: Fix timing issues w/ BIOS
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2019-09-23 01:25:58 +10:00 |
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Connor McLaughlin
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734d1a7ee1
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InterruptController: Masked interrupts are still set in the status register
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2019-09-23 01:24:36 +10:00 |
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Connor McLaughlin
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fbd7fcec48
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GTE: Implement NCDS (but incorrectly)
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2019-09-22 21:41:11 +10:00 |
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Connor McLaughlin
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f2d62fcce0
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CDROM: Hack timings to get further with booting
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2019-09-22 21:40:44 +10:00 |
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Connor McLaughlin
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c772047715
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GTE: Add AVSZ3/AVSZ4
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2019-09-22 20:38:11 +10:00 |
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Connor McLaughlin
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005b06ae0c
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GTE: More implementation work, Reg+NCLIP+STR tests passing
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2019-09-22 17:33:11 +10:00 |
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Connor McLaughlin
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3fb08a72a4
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CDROM: Hack around missing pregap in images
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2019-09-22 02:32:45 +10:00 |
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Connor McLaughlin
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948ac50020
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CPU: Refactoring, implement LWC/SWC
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2019-09-22 02:06:47 +10:00 |
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Connor McLaughlin
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2875a22987
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CDROM: Reads appear to be functioning
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2019-09-22 01:12:16 +10:00 |
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Connor McLaughlin
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c988af453c
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Refactor timing to allow sync/updates in the middle of a slice
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2019-09-21 01:24:33 +10:00 |
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Connor McLaughlin
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ad316162f3
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Basic timer implementation
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2019-09-20 23:40:19 +10:00 |
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Connor McLaughlin
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ad652c47ed
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Basic CD image loading
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2019-09-20 20:14:00 +10:00 |
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Connor McLaughlin
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53e755aa68
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Pad: Save state support
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2019-09-20 19:21:45 +10:00 |
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Connor McLaughlin
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8cd75a4937
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PAD: Basic support for digital controllers
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2019-09-20 16:47:41 +10:00 |
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Connor McLaughlin
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d84bffead1
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GPU: Implement transparency mode
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2019-09-19 00:55:06 +10:00 |
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Connor McLaughlin
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23ef1cafbd
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GPU: Force 16-bit precision when filling VRAM, clear mask bit
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2019-09-18 15:54:57 +10:00 |
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Connor McLaughlin
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d8150c996b
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GPU: Support dumping copies out to file
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2019-09-18 15:43:25 +10:00 |
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Connor McLaughlin
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e40ac7cee1
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dep: Add stb_image_write
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2019-09-18 15:43:03 +10:00 |
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Connor McLaughlin
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4d624946d6
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GPU: Texpage attribute can change texture mode too
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2019-09-18 15:24:29 +10:00 |
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Connor McLaughlin
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4d4ab898c0
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GPU: Flush rendering before VRAM->VRAM copies
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2019-09-18 15:15:03 +10:00 |
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Connor McLaughlin
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2c07db6dd5
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GPU: Flush rendering before VRAM reads
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2019-09-18 15:14:31 +10:00 |
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Connor McLaughlin
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4d38213f23
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GPU: Implement VRAM-to-VRAM copies
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2019-09-18 00:58:30 +10:00 |
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Connor McLaughlin
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ff83f15abe
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dep: Add missing file
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2019-09-18 00:30:26 +10:00 |
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Connor McLaughlin
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0a8bce8936
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GPU: Hook up vblank interrupt
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2019-09-18 00:22:41 +10:00 |
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Connor McLaughlin
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a84b3d7a2b
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CPU: Fix interrupts in branch delay slots messing up PC
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2019-09-18 00:22:17 +10:00 |
|
Connor McLaughlin
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4025d6e4a6
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GTE: Stub and register read/write function
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2019-09-17 23:38:04 +10:00 |
|
Connor McLaughlin
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6df8d42480
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CDROM: Add missing fields to save state
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2019-09-17 23:04:00 +10:00 |
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Connor McLaughlin
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e3c6035152
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CDROM: Implement get version and getstat commands
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2019-09-17 22:18:58 +10:00 |
|
Connor McLaughlin
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b951f27381
|
CDROM: Stub implementation
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2019-09-17 21:07:56 +10:00 |
|
Connor McLaughlin
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a0e7dff37c
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common: Add a FIFOQueue helper class
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2019-09-17 19:22:23 +10:00 |
|
Connor McLaughlin
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2128a2984b
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Add interrupt controller emulation
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2019-09-17 16:26:00 +10:00 |
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Connor McLaughlin
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c615e007c0
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GPU: Serialization for CRTC state
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2019-09-17 14:40:23 +10:00 |
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Connor McLaughlin
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f47688b61f
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System: Basic timings for GPU scanout
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2019-09-17 14:25:25 +10:00 |
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Connor McLaughlin
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9475c281bd
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Build: Set /MP on projects which are missing it
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2019-09-17 14:25:17 +10:00 |
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Connor McLaughlin
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540f282213
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CPU: Fix incorrect exception vector for break
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2019-09-15 12:43:54 +10:00 |
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Connor McLaughlin
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5babc076f5
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Bitfield: Fix incorrect shift in operator<<=
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2019-09-15 12:42:43 +10:00 |
|
Connor McLaughlin
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d58dbe04c0
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CPU: Fix load delay register reads for same register in delay slot
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2019-09-15 12:16:51 +10:00 |
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Connor McLaughlin
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1bb794dd39
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GPU: Use max vertex count based on buffer size
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2019-09-15 01:18:58 +10:00 |
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Connor McLaughlin
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a58b687352
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GPU: Cap batch sizes at 1024 vertices, flush if exceeded
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2019-09-15 01:13:23 +10:00 |
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Connor McLaughlin
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4ca3b4b570
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CPU: Fix alignment exception on register indirect branch
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2019-09-15 01:13:11 +10:00 |
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Connor McLaughlin
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bea727bbe4
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CPU: Fix BGEZAL with rs == ra
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2019-09-15 01:02:35 +10:00 |
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Connor McLaughlin
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273f010d17
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GPU: Use degenerate triangles to split strips and batch them
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2019-09-15 00:17:43 +10:00 |
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Connor McLaughlin
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1c8e326624
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GPU: Fix off-by-one in rectangle rendering
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2019-09-14 23:50:34 +10:00 |
|
Connor McLaughlin
|
77b15d156d
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System: Periodically flush GPU
Needs real timings...
|
2019-09-14 23:50:24 +10:00 |