alyosha-tas
|
3ac053c33d
|
Update 6502 reset
|
2017-03-08 12:19:31 -05:00 |
|
alyosha-tas
|
2526f8c7b9
|
Update CP1610
|
2017-03-05 18:44:34 -05:00 |
|
alyosha-tas
|
a36b7093e3
|
Intellivision implement System Bus memory domain
|
2017-02-09 12:53:55 -05:00 |
|
adelikat
|
eb1f477f9d
|
Intellivision - turn off logging
|
2017-02-08 17:26:30 -06:00 |
|
alyosha-tas
|
aa44cf6f02
|
Update CP1610.Execute.cs
|
2016-12-26 10:07:19 -05:00 |
|
alyosha-tas
|
46586a7df9
|
Update CP1610.Execute.cs
FInally find the bug that Fixes Pac Man (and Ms Pac Man as well)
|
2016-12-24 22:28:58 -05:00 |
|
alyosha-tas
|
f5491bf86f
|
Update CP1610.Execute.cs
|
2016-12-24 15:01:00 -05:00 |
|
alyosha-tas
|
68c3d2abb1
|
Intellivision Fix overflow flag bug
|
2016-12-24 13:03:12 -05:00 |
|
alyosha-tas
|
f542a438ed
|
Update CP1610.Execute.cs
|
2016-12-24 10:53:30 -05:00 |
|
alyosha-tas
|
6f4c5bc135
|
Update CP1610.Execute.cs
|
2016-12-21 21:42:14 -05:00 |
|
adelikat
|
eda79c2212
|
Make an interface for CodeDataLog, and move CodeDataLog to Base Implementations
|
2016-12-16 11:33:02 -06:00 |
|
J.D. Purcell
|
206ea9887b
|
Text savestate fixes.
|
2016-12-14 18:35:03 -05:00 |
|
alyosha-tas
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33843265f8
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Update CP1610 to include Halts from SR2
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2016-12-13 16:47:21 -05:00 |
|
alyosha-tas
|
ba149320c5
|
INtellivision fill out save states
|
2016-12-07 10:55:25 -05:00 |
|
adelikat
|
e9d1af2b0c
|
Intellivision - stubs for savestate logic
|
2016-12-04 08:25:28 -06:00 |
|
alyosha-tas
|
af03ac3eb7
|
CP1610 Add registers to tracer
|
2016-11-14 21:17:24 -05:00 |
|
alyosha-tas
|
fbd630b594
|
Update CP1610.Execute.cs
|
2016-11-14 20:44:36 -05:00 |
|
alyosha-tas
|
c230609656
|
Cp1610 trace logger
WIP
|
2016-11-12 12:58:10 -05:00 |
|
adelikat
|
e44493d9fb
|
Intellivision - wire up trace logger to the core. Currently does nothing since the TraceCallback in CP1610 needs to be wired up in the object in the right places
|
2016-11-11 16:17:35 -06:00 |
|
alyosha-tas
|
9cb9941fb2
|
CP1610 updates for intellivision
|
2016-11-11 16:48:50 -05:00 |
|
Ben Russell
|
c07e8b0a79
|
Z80 - instruction timing fixes
|
2016-11-09 14:06:56 +13:00 |
|
alyosha-tas
|
3fa2828d5b
|
Accuracy improvement to z80
properly set interrupt enable after the NEXT instruction
|
2016-11-03 20:50:47 -04:00 |
|
feos
|
9d594e013b
|
genesis disasm: snip implied regs for movem
|
2016-08-16 22:07:32 +03:00 |
|
feos
|
76eaea3619
|
tracer unification for cores: spacing, headers, etc
|
2016-08-16 01:39:26 +03:00 |
|
feos
|
888d7fed6a
|
tracer: set some padding
|
2016-08-14 22:59:07 +03:00 |
|
alyosha-tas
|
1c9d814e15
|
Add files via upload
|
2016-06-24 15:02:50 -04:00 |
|
Tony Konzel
|
d518db2d14
|
6502: RTS IncPc micro-op should perform a read at PC and discard the result.
|
2016-06-22 15:09:57 -05:00 |
|
alyosha-tas
|
55feae8bf6
|
clean up and minor fixes
|
2016-06-16 11:29:08 -04:00 |
|
alyosha-tas
|
b7c8755b14
|
Fill in some undocumented opcodes
now passes instr_misc/instr_misc (the only test I could find that even concerned itself with these opcodes)
|
2016-06-15 22:33:15 -04:00 |
|
nattthebear
|
111648cf98
|
Break a bunch of memory domain stuff with pointless refactoring
|
2016-04-13 19:50:06 -04:00 |
|
Tony Konzel
|
05914e1490
|
Merge pull request #599 from TASVideos/c64-via-timer-fixes
C64 via timer fixes (and more)
|
2016-03-15 10:08:17 -05:00 |
|
Anthony Konzel
|
aa83c33c58
|
6502: All non-writes are affected by RDY.
|
2016-03-09 20:12:49 -06:00 |
|
feos
|
90b4ccfcb9
|
genesis disasm: use # prefix for moveq, addq and subq too.
|
2016-03-08 14:03:49 +03:00 |
|
adelikat
|
2975d699ef
|
Traceer - header for NesHawk and PCE
|
2016-02-28 08:28:00 -05:00 |
|
adelikat
|
d477bc1fb6
|
nice Trace header for SMS, and Coleco
|
2016-02-28 08:07:02 -05:00 |
|
Anthony Konzel
|
ac9a4ef777
|
Apply C64 core update patch.
|
2016-02-22 17:50:11 -06:00 |
|
feos
|
c41c24cd85
|
tracer: use .log extention (allows extension based user syntax highlight)
genesis disasm: prefix immediate values with #.
|
2016-02-22 14:18:46 +03:00 |
|
adelikat
|
f5e679fa0d
|
Refactor ITraceable to work on TraceInfo objects that separate Disassembly and Register information. Make Tracelogger two columns.
|
2016-02-21 17:34:42 -05:00 |
|
feos
|
63e7a07e0d
|
debugger: return our own string format for genesis.
|
2016-02-21 16:04:39 +03:00 |
|
feos
|
0c32b48f29
|
debugger:
- don't post pc and raw bytes to genesis disasm string
- make some fonts monospace
- pad reg values properly
- give enough space for big reg names
|
2016-02-21 15:19:56 +03:00 |
|
pjgat09
|
b8ac99992e
|
M6502: Added an R to the State output to indicate when the RDY signal is false.
|
2016-02-13 17:15:14 -05:00 |
|
zeromus
|
91d070094d
|
6502 cpu core: make JAM/KIL actually do something like the right thing
|
2015-12-31 11:43:38 -06:00 |
|
adelikat
|
538f0160d2
|
Z80 - don't assume FetchMemory exists
|
2015-12-20 11:22:24 -05:00 |
|
Hathor86
|
f70a2c8c6c
|
Merge from TASVideo
|
2015-11-01 22:01:19 +01:00 |
|
zeromus
|
642f965685
|
CDL - preliminary SMS support (only one mapper)
|
2015-10-30 00:00:57 -05:00 |
|
zeromus
|
70e0954f28
|
CDL - major refactor complete. muuuuch better.
|
2015-10-28 03:51:53 -05:00 |
|
zeromus
|
fbe010a18d
|
CDL reorg
|
2015-10-26 19:24:20 -05:00 |
|
zeromus
|
bef877365c
|
make CDL generic, and prep for GB CDL
|
2015-10-26 19:15:21 -05:00 |
|
Kabuto
|
f7c15bfd0f
|
Fixed indentation and TODOs
|
2015-09-28 20:53:19 +02:00 |
|
Kabuto
|
1e9564a337
|
C64 core: tape loading added, lots of bugfixes and improvements
|
2015-09-28 01:30:58 +02:00 |