2019-03-30 21:09:04 +00:00
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using System;
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2019-04-06 20:16:53 +00:00
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using BizHawk.Common.NumberExtensions;
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2019-03-30 21:09:04 +00:00
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namespace BizHawk.Emulation.Common.Components.MC6809
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{
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public partial class MC6809
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{
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// this contains the vectors of instrcution operations
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// NOTE: This list is NOT confirmed accurate for each individual cycle
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private void NOP_()
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{
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PopulateCURINSTR(IDLE);
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2019-04-07 20:57:24 +00:00
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IRQS = 1;
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2019-03-30 21:09:04 +00:00
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}
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private void ILLEGAL()
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{
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2019-04-08 23:57:21 +00:00
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//throw new Exception("Encountered illegal instruction");
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PopulateCURINSTR(IDLE);
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IRQS = 1;
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2019-03-30 21:09:04 +00:00
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}
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private void SYNC_()
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{
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2019-04-06 20:16:53 +00:00
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PopulateCURINSTR(IDLE,
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SYNC);
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2019-04-07 20:57:24 +00:00
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2019-04-08 23:57:21 +00:00
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IRQS = -1;
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2019-03-30 21:09:04 +00:00
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}
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2019-04-06 15:06:23 +00:00
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private void REG_OP(ushort oper, ushort src)
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{
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PopulateCURINSTR(oper, src);
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2019-04-07 20:57:24 +00:00
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IRQS = 1;
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2019-04-06 15:06:23 +00:00
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}
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2019-03-30 21:09:04 +00:00
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private void DIRECT_MEM(ushort oper)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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SET_ADDR, ADDR, DP, ALU,
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2019-04-02 00:00:54 +00:00
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RD, ALU, ADDR,
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2019-03-30 21:09:04 +00:00
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oper, ALU,
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2019-04-02 00:00:54 +00:00
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WR, ADDR, ALU);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-03-30 21:09:04 +00:00
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}
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2019-04-04 00:22:23 +00:00
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private void DIRECT_ST_4(ushort dest)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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2019-07-10 19:42:01 +00:00
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ST_8, dest,
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2019-04-04 00:22:23 +00:00
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WR, ADDR, dest);
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2019-04-07 20:57:24 +00:00
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IRQS = 3;
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2019-04-04 00:22:23 +00:00
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}
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private void DIRECT_MEM_4(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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2019-04-06 15:06:23 +00:00
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IDLE,
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RD_INC_OP, ALU, ADDR, oper, dest, ALU);
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2019-04-07 20:57:24 +00:00
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IRQS = 3;
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2019-04-04 00:22:23 +00:00
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}
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2019-03-31 13:27:51 +00:00
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private void EXT_MEM(ushort oper)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC, ALU2, PC,
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SET_ADDR, ADDR, ALU, ALU2,
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2019-04-02 00:00:54 +00:00
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RD, ALU, ADDR,
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2019-03-31 13:27:51 +00:00
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oper, ALU,
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2019-04-02 00:00:54 +00:00
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WR, ADDR, ALU);
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2019-04-07 20:57:24 +00:00
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IRQS = 6;
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2019-03-31 13:27:51 +00:00
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}
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2019-04-06 15:06:23 +00:00
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private void EXT_REG(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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RD, ALU, ADDR,
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oper, dest, ALU);
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2019-04-07 20:57:24 +00:00
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IRQS = 4;
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2019-04-06 15:06:23 +00:00
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}
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private void EXT_ST(ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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2019-07-10 19:42:01 +00:00
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ST_8, dest,
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2019-04-06 15:06:23 +00:00
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WR, ADDR, dest);
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2019-04-07 20:57:24 +00:00
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IRQS = 4;
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2019-04-06 15:06:23 +00:00
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}
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2019-03-30 21:09:04 +00:00
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private void REG_OP_IMD_CC(ushort oper)
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{
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Regs[ALU2] = Regs[CC];
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PopulateCURINSTR(RD_INC_OP, ALU, PC, oper, ALU2, ALU,
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TR, CC, ALU2);
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2019-04-07 20:57:24 +00:00
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IRQS = 2;
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2019-03-30 21:09:04 +00:00
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}
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2019-04-04 00:22:23 +00:00
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private void REG_OP_IMD(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, oper, dest, ALU);
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2019-04-07 20:57:24 +00:00
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IRQS = 1;
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2019-04-04 00:22:23 +00:00
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}
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private void IMD_OP_D(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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oper, ADDR);
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2019-04-07 20:57:24 +00:00
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IRQS = 3;
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2019-04-04 00:22:23 +00:00
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}
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private void DIR_OP_D(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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RD_INC, ALU, ADDR,
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RD, ALU2, ADDR,
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SET_ADDR, ADDR, ALU, ALU2,
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oper, ADDR);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-04-04 00:22:23 +00:00
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}
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2019-04-06 15:06:23 +00:00
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private void EXT_OP_D(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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RD_INC, ALU, ADDR,
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RD, ALU2, ADDR,
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SET_ADDR, ADDR, ALU, ALU2,
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oper, ADDR);
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2019-04-07 20:57:24 +00:00
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IRQS = 6;
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2019-04-06 15:06:23 +00:00
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}
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private void REG_OP_LD_16D()
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{
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PopulateCURINSTR(RD_INC, A, PC,
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2019-06-01 16:25:30 +00:00
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RD_INC_OP, B, PC, LD_16, ADDR, A, B);
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2019-04-07 20:57:24 +00:00
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IRQS = 2;
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2019-04-06 15:06:23 +00:00
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}
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private void DIR_OP_LD_16D()
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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IDLE,
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RD_INC, A, ADDR,
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2019-06-01 16:25:30 +00:00
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RD_INC_OP, B, ADDR, LD_16, ADDR, A, B);
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2019-04-07 20:57:24 +00:00
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IRQS = 4;
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2019-04-06 15:06:23 +00:00
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}
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private void DIR_OP_ST_16D()
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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2019-07-10 19:42:01 +00:00
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ST_16, Dr,
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WR_LO_INC, ADDR, A,
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2019-04-06 15:06:23 +00:00
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WR, ADDR, B);
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2019-04-07 20:57:24 +00:00
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IRQS = 4;
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2019-04-06 15:06:23 +00:00
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}
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2019-04-04 00:22:23 +00:00
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private void DIR_CMP_16(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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RD_INC, ALU, ADDR,
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RD, ALU2, ADDR,
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SET_ADDR, ADDR, ALU, ALU2,
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oper, dest, ADDR);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-04-04 00:22:23 +00:00
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}
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2019-04-06 20:16:53 +00:00
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private void IMD_CMP_16(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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oper, dest, ADDR);
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2019-04-07 20:57:24 +00:00
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IRQS = 3;
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2019-04-06 20:16:53 +00:00
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}
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2019-04-04 00:22:23 +00:00
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private void REG_OP_LD_16(ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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2019-06-01 16:25:30 +00:00
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RD_INC_OP, ALU2, PC, LD_16, dest, ALU, ALU2);
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2019-04-07 20:57:24 +00:00
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IRQS = 2;
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2019-04-04 00:22:23 +00:00
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}
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2019-04-06 15:06:23 +00:00
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private void DIR_OP_LD_16(ushort dest)
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2019-04-04 00:22:23 +00:00
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{
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2019-04-06 15:06:23 +00:00
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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IDLE,
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RD_INC, ALU, ADDR,
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2019-06-01 16:25:30 +00:00
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RD_INC_OP, ALU2, ADDR, LD_16, dest, ALU, ALU2);
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2019-04-07 20:57:24 +00:00
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IRQS = 4;
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2019-04-06 15:06:23 +00:00
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}
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private void DIR_OP_ST_16(ushort src)
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{
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PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
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2019-07-10 19:42:01 +00:00
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ST_16, src,
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2019-04-06 15:06:23 +00:00
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WR_HI_INC, ADDR, src,
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WR_DEC_LO, ADDR, src);
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2019-04-07 20:57:24 +00:00
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IRQS = 4;
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2019-04-06 15:06:23 +00:00
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}
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private void EXT_OP_LD_16(ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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IDLE,
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RD_INC, ALU, ADDR,
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2019-06-01 16:25:30 +00:00
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RD_INC_OP, ALU2, ADDR, LD_16, dest, ALU, ALU2);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-04-06 15:06:23 +00:00
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}
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private void EXT_OP_ST_16(ushort src)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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2019-07-10 19:42:01 +00:00
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ST_16, src,
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2019-04-06 15:06:23 +00:00
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WR_HI_INC, ADDR, src,
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WR_DEC_LO, ADDR, src);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-04-06 15:06:23 +00:00
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}
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private void EXT_OP_LD_16D()
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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IDLE,
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RD_INC, A, ADDR,
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2019-06-01 16:25:30 +00:00
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RD_INC_OP, B, ADDR, LD_16, ADDR, A, B);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-04-06 15:06:23 +00:00
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}
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private void EXT_OP_ST_16D()
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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2019-07-10 19:42:01 +00:00
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ST_16, Dr,
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WR_LO_INC, ADDR, A,
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2019-04-06 15:06:23 +00:00
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WR, ADDR, B);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-04-06 15:06:23 +00:00
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}
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private void EXT_CMP_16(ushort oper, ushort dest)
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
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RD_INC, ALU, ADDR,
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RD, ALU2, ADDR,
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SET_ADDR, ADDR, ALU, ALU2,
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oper, dest, ADDR);
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2019-04-07 20:57:24 +00:00
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IRQS = 6;
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2019-04-04 00:22:23 +00:00
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}
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2019-03-30 21:09:04 +00:00
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private void EXG_()
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{
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2019-04-08 23:57:21 +00:00
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PopulateCURINSTR(RD_INC, ALU, PC,
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2019-03-30 21:09:04 +00:00
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EXG, ALU,
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IDLE,
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IDLE,
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IDLE,
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IDLE,
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IDLE);
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2019-04-07 20:57:24 +00:00
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IRQS = 7;
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2019-03-30 21:09:04 +00:00
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}
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private void TFR_()
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{
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2019-04-08 23:57:21 +00:00
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PopulateCURINSTR(RD_INC, ALU, PC,
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2019-03-30 21:09:04 +00:00
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TFR, ALU,
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IDLE,
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IDLE,
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IDLE);
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2019-04-07 20:57:24 +00:00
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IRQS = 5;
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2019-03-30 21:09:04 +00:00
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}
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private void JMP_DIR_()
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{
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PopulateCURINSTR(RD_INC, ALU, PC,
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SET_ADDR, PC, DP, ALU);
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2019-04-07 20:57:24 +00:00
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|
IRQS = 2;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
|
2019-03-31 13:27:51 +00:00
|
|
|
private void JMP_EXT_()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
RD_INC, ALU2, PC,
|
|
|
|
SET_ADDR, PC, ALU, ALU2);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 3;
|
2019-03-31 13:27:51 +00:00
|
|
|
}
|
|
|
|
|
2019-04-06 15:06:23 +00:00
|
|
|
private void JSR_()
|
|
|
|
{
|
2019-07-07 12:22:01 +00:00
|
|
|
PopulateCURINSTR(RD_INC_OP, ALU, PC, SET_ADDR, ADDR, DP, ALU,
|
|
|
|
TR, ALU, PC,
|
2019-04-08 23:57:21 +00:00
|
|
|
DEC16, SP,
|
2019-04-06 15:06:23 +00:00
|
|
|
TR, PC, ADDR,
|
2019-07-07 12:22:01 +00:00
|
|
|
WR_DEC_LO, SP, ALU,
|
|
|
|
WR_HI, SP, ALU);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 6;
|
2019-04-06 15:06:23 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private void JSR_EXT()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
2019-04-08 23:57:21 +00:00
|
|
|
RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2,
|
|
|
|
TR, ALU, PC,
|
|
|
|
DEC16, SP,
|
2019-04-06 15:06:23 +00:00
|
|
|
TR, PC, ADDR,
|
2019-04-08 23:57:21 +00:00
|
|
|
WR_DEC_LO, SP, ALU,
|
|
|
|
WR_HI, SP, ALU);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 7;
|
2019-04-06 15:06:23 +00:00
|
|
|
}
|
|
|
|
|
2019-03-30 21:09:04 +00:00
|
|
|
private void LBR_(bool cond)
|
|
|
|
{
|
|
|
|
if (cond)
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
RD_INC, ALU2, PC,
|
|
|
|
SET_ADDR, ADDR, ALU, ALU2,
|
|
|
|
ADD16BR, PC, ADDR);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 4;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
RD_INC, ALU2, PC,
|
2019-06-17 13:06:37 +00:00
|
|
|
SET_ADDR, ADDR, ALU, ALU2);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 3;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
private void BR_(bool cond)
|
|
|
|
{
|
|
|
|
if (cond)
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
ADD8BR, PC, ALU);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 2;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
IDLE);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 2;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-04-04 00:22:23 +00:00
|
|
|
private void BSR_()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
TR, ADDR, PC,
|
2019-04-08 23:57:21 +00:00
|
|
|
ADD8BR, PC, ALU,
|
2019-04-04 00:22:23 +00:00
|
|
|
DEC16, SP,
|
|
|
|
WR_DEC_LO, SP, ADDR,
|
|
|
|
WR_HI, SP, ADDR);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 6;
|
2019-04-04 00:22:23 +00:00
|
|
|
}
|
|
|
|
|
2019-03-30 21:09:04 +00:00
|
|
|
private void LBSR_()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
RD_INC, ALU2, PC,
|
|
|
|
SET_ADDR, ADDR, ALU, ALU2,
|
2019-04-08 23:57:21 +00:00
|
|
|
TR, ALU, PC,
|
2019-03-30 21:09:04 +00:00
|
|
|
ADD16BR, PC, ADDR,
|
|
|
|
DEC16, SP,
|
2019-04-08 23:57:21 +00:00
|
|
|
WR_DEC_LO, SP, ALU,
|
|
|
|
WR_HI, SP, ALU);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 8;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private void PAGE_2()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(OP_PG_2);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
IRQS = -1;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private void PAGE_3()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(OP_PG_3);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
IRQS = -1;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
|
2019-03-31 13:27:51 +00:00
|
|
|
private void ABX_()
|
2019-03-30 21:09:04 +00:00
|
|
|
{
|
2019-03-31 13:27:51 +00:00
|
|
|
PopulateCURINSTR(ABX,
|
|
|
|
IDLE);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 2;
|
2019-03-31 13:27:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private void MUL_()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(MUL,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE,
|
|
|
|
IDLE);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 10;
|
2019-03-31 13:27:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private void RTS()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(IDLE,
|
|
|
|
RD_INC, ALU, SP,
|
|
|
|
RD_INC, ALU2, SP,
|
|
|
|
SET_ADDR, PC, ALU, ALU2);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 4;
|
2019-03-31 13:27:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
private void RTI()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(IDLE,
|
|
|
|
RD_INC_OP, CC, SP, JPE,
|
|
|
|
RD_INC, A, SP,
|
|
|
|
RD_INC, B, SP,
|
|
|
|
RD_INC, DP, SP,
|
|
|
|
RD_INC, ALU, SP,
|
|
|
|
RD_INC_OP, ALU2, SP, SET_ADDR, X, ALU, ALU2,
|
|
|
|
RD_INC, ALU, SP,
|
|
|
|
RD_INC_OP, ALU2, SP, SET_ADDR, Y, ALU, ALU2,
|
|
|
|
RD_INC, ALU, SP,
|
|
|
|
RD_INC_OP, ALU2, SP, SET_ADDR, US, ALU, ALU2,
|
2019-04-07 20:57:24 +00:00
|
|
|
RD_INC, ALU, SP,
|
2019-07-06 00:25:03 +00:00
|
|
|
RD_INC_OP, ALU2, SP, SET_ADDR, PC, ALU, ALU2);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 14;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
|
2019-04-02 00:00:54 +00:00
|
|
|
private void PSH(ushort src)
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
IDLE,
|
2019-06-15 22:39:00 +00:00
|
|
|
DEC16, src,
|
2019-04-02 00:00:54 +00:00
|
|
|
PSH_n, src);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
IRQS = -1;
|
2019-04-02 00:00:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Post byte info is in ALU
|
|
|
|
// mask out bits until the end
|
|
|
|
private void PSH_n_BLD(ushort src)
|
|
|
|
{
|
|
|
|
if (Regs[ALU].Bit(7))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO, src, PC,
|
|
|
|
WR_DEC_HI_OP, src, PC, PSH_n, src);
|
|
|
|
|
|
|
|
Regs[ALU] &= 0x7F;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(6))
|
|
|
|
{
|
|
|
|
if (src == US)
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO, src, SP,
|
|
|
|
WR_DEC_HI_OP, src, SP, PSH_n, src);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO, src, US,
|
|
|
|
WR_DEC_HI_OP, src, US, PSH_n, src);
|
|
|
|
}
|
|
|
|
|
|
|
|
Regs[ALU] &= 0x3F;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(5))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO, src, Y,
|
|
|
|
WR_DEC_HI_OP, src, Y, PSH_n, src);
|
|
|
|
|
|
|
|
Regs[ALU] &= 0x1F;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(4))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO, src, X,
|
|
|
|
WR_DEC_HI_OP, src, X, PSH_n, src);
|
|
|
|
|
|
|
|
Regs[ALU] &= 0xF;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(3))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO_OP, src, DP, PSH_n, src);
|
|
|
|
|
|
|
|
Regs[ALU] &= 0x7;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(2))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO_OP, src, B, PSH_n, src);
|
|
|
|
|
|
|
|
Regs[ALU] &= 0x3;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(1))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO_OP, src, A, PSH_n, src);
|
|
|
|
|
|
|
|
Regs[ALU] &= 0x1;
|
|
|
|
}
|
|
|
|
else if (Regs[ALU].Bit(0))
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(WR_DEC_LO_OP, src, CC, PSH_n, src);
|
2019-04-08 23:57:21 +00:00
|
|
|
|
|
|
|
Regs[ALU] = 0;
|
2019-04-02 00:00:54 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Regs[src] += 1; // we decremented an extra time overall, regardless of what was run
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = irq_pntr + 1;
|
2019-04-02 00:00:54 +00:00
|
|
|
}
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
instr_pntr = 0;
|
2019-04-02 00:00:54 +00:00
|
|
|
}
|
2019-03-30 21:09:04 +00:00
|
|
|
|
2019-04-03 00:25:48 +00:00
|
|
|
private void PUL(ushort src)
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC, ALU, PC,
|
|
|
|
IDLE,
|
2019-04-08 23:57:21 +00:00
|
|
|
PUL_n, src);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
IRQS = -1;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// Post byte info is in ALU
|
|
|
|
// mask out bits until the end
|
|
|
|
private void PUL_n_BLD(ushort src)
|
2019-03-30 21:09:04 +00:00
|
|
|
{
|
2019-04-08 23:57:21 +00:00
|
|
|
if (Regs[ALU].Bit(0))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC_OP, CC, src, PUL_n, src);
|
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0xFE;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(1))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC_OP, A, src, PUL_n, src);
|
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0xFC;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(2))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC_OP, B, src, PUL_n, src);
|
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0xF8;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(3))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC_OP, DP, src, PUL_n, src);
|
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0xF0;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(4))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
2019-06-01 16:25:30 +00:00
|
|
|
PopulateCURINSTR(RD_INC, ALU2, src,
|
2019-04-03 00:25:48 +00:00
|
|
|
RD_INC_OP, ADDR, src, SET_ADDR_PUL, X, src);
|
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0xE0;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(5))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
2019-06-01 16:25:30 +00:00
|
|
|
PopulateCURINSTR(RD_INC, ALU2, src,
|
2019-04-03 00:25:48 +00:00
|
|
|
RD_INC_OP, ADDR, src, SET_ADDR_PUL, Y, src);
|
2019-04-02 00:00:54 +00:00
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0xC0;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(6))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
|
|
|
if (src == US)
|
|
|
|
{
|
2019-06-01 16:25:30 +00:00
|
|
|
PopulateCURINSTR(RD_INC, ALU2, src,
|
2019-04-03 00:25:48 +00:00
|
|
|
RD_INC_OP, ADDR, src, SET_ADDR_PUL, SP, src);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-06-01 16:25:30 +00:00
|
|
|
PopulateCURINSTR(RD_INC, ALU2, src,
|
2019-04-03 00:25:48 +00:00
|
|
|
RD_INC_OP, ADDR, src, SET_ADDR_PUL, US, src);
|
|
|
|
}
|
|
|
|
|
2019-04-08 23:57:21 +00:00
|
|
|
Regs[ALU] &= 0x80;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-08 23:57:21 +00:00
|
|
|
else if (Regs[ALU].Bit(7))
|
2019-04-03 00:25:48 +00:00
|
|
|
{
|
2019-06-01 16:25:30 +00:00
|
|
|
PopulateCURINSTR(RD_INC, ALU2, src,
|
2019-04-03 00:25:48 +00:00
|
|
|
RD_INC_OP, ADDR, src, SET_ADDR_PUL, PC, src);
|
2019-04-08 23:57:21 +00:00
|
|
|
|
|
|
|
Regs[ALU] = 0;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
// extra end cycle
|
2019-04-07 20:57:24 +00:00
|
|
|
PopulateCURINSTR(IDLE);
|
|
|
|
|
|
|
|
IRQS = irq_pntr + 2;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
instr_pntr = 0;
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
|
2019-04-03 00:25:48 +00:00
|
|
|
private void SWI1()
|
|
|
|
{
|
|
|
|
Regs[ADDR] = 0xFFFA;
|
|
|
|
PopulateCURINSTR(SET_E,
|
|
|
|
DEC16, SP,
|
|
|
|
WR_DEC_LO, SP, PC,
|
|
|
|
WR_DEC_HI, SP, PC,
|
|
|
|
WR_DEC_LO, SP, US,
|
|
|
|
WR_DEC_HI, SP, US,
|
|
|
|
WR_DEC_LO, SP, Y,
|
|
|
|
WR_DEC_HI, SP, Y,
|
|
|
|
WR_DEC_LO, SP, X,
|
|
|
|
WR_DEC_HI, SP, X,
|
|
|
|
WR_DEC_LO, SP, DP,
|
|
|
|
WR_DEC_LO, SP, B,
|
|
|
|
WR_DEC_LO, SP, A,
|
|
|
|
WR, SP, CC,
|
|
|
|
SET_F_I,
|
|
|
|
RD_INC, ALU, ADDR,
|
|
|
|
RD_INC, ALU2, ADDR,
|
2019-04-07 20:57:24 +00:00
|
|
|
SET_ADDR, PC, ALU, ALU2);
|
|
|
|
|
|
|
|
IRQS = 18;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
|
|
|
|
2019-04-06 20:16:53 +00:00
|
|
|
private void SWI2_3(ushort pick)
|
|
|
|
{
|
|
|
|
Regs[ADDR] = (ushort)((pick == 3) ? 0xFFF2 : 0xFFF4);
|
|
|
|
PopulateCURINSTR(SET_E,
|
|
|
|
DEC16, SP,
|
|
|
|
WR_DEC_LO, SP, PC,
|
|
|
|
WR_DEC_HI, SP, PC,
|
|
|
|
WR_DEC_LO, SP, US,
|
|
|
|
WR_DEC_HI, SP, US,
|
|
|
|
WR_DEC_LO, SP, Y,
|
|
|
|
WR_DEC_HI, SP, Y,
|
|
|
|
WR_DEC_LO, SP, X,
|
|
|
|
WR_DEC_HI, SP, X,
|
|
|
|
WR_DEC_LO, SP, DP,
|
|
|
|
WR_DEC_LO, SP, B,
|
|
|
|
WR_DEC_LO, SP, A,
|
|
|
|
WR, SP, CC,
|
|
|
|
IDLE,
|
|
|
|
RD_INC, ALU, ADDR,
|
|
|
|
RD_INC, ALU2, ADDR,
|
2019-04-07 20:57:24 +00:00
|
|
|
SET_ADDR, PC, ALU, ALU2);
|
|
|
|
|
|
|
|
IRQS = 18;
|
2019-04-06 20:16:53 +00:00
|
|
|
}
|
|
|
|
|
2019-04-03 00:25:48 +00:00
|
|
|
private void CWAI_()
|
|
|
|
{
|
|
|
|
PopulateCURINSTR(RD_INC_OP, ALU, PC, ANDCC, ALU,
|
|
|
|
SET_E,
|
|
|
|
DEC16, SP,
|
|
|
|
WR_DEC_LO, SP, PC,
|
|
|
|
WR_DEC_HI, SP, PC,
|
|
|
|
WR_DEC_LO, SP, US,
|
|
|
|
WR_DEC_HI, SP, US,
|
|
|
|
WR_DEC_LO, SP, Y,
|
|
|
|
WR_DEC_HI, SP, Y,
|
|
|
|
WR_DEC_LO, SP, X,
|
|
|
|
WR_DEC_HI, SP, X,
|
|
|
|
WR_DEC_LO, SP, DP,
|
|
|
|
WR_DEC_LO, SP, B,
|
|
|
|
WR_DEC_LO, SP, A,
|
|
|
|
WR, SP, CC,
|
|
|
|
CWAI);
|
2019-04-07 20:57:24 +00:00
|
|
|
|
|
|
|
IRQS = 16;
|
2019-04-03 00:25:48 +00:00
|
|
|
}
|
2019-03-30 21:09:04 +00:00
|
|
|
}
|
|
|
|
}
|